Adding a new target of HW development kit using [Samsung Exynos i S111](https://www.samsung.com/semiconductor/minisite/exynos/products/iot/exynos-i-s111/) module to Mbed-OS.
This will widen the HW choices of Mbed-OS enabled NB-IoT, GNSS and Security (eFuse, AES, SHA-2, PKA, Secure Storage, Security Sub-System, [PUF](https://en.wikipedia.org/wiki/Physical_unclonable_function)) modules.
Target Name: S5JS100
Co-authored-by: Ivan Galkin <ivan.galkin@samsung.com>
Co-authored-by: Seokwon Lee <swon.lee@samsung.com>
Co-authored-by: Zhizhe Zhu <zhizhe.zhu@samsung.com>
Co-authored-by: Xinyi Zhao <xinyi.zhao@samsung.com>
Make an exception for this target and enable lp-ticker when LSE is not available.
This exception is added because of with disabled lp-ticker (and BLE feature) we have the following linker error with ARM compiler:
[Error] @0,0: L6218E: Undefined symbol hciCmdAlloc (referred from BUILD/tests/MTB_UBLOX_ODIN_W2/ARM/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/TOOLCHAIN_ARM/libublox-odin-w2-driver.ar(hci_vendor_cmd.o)).
[Error] @0,0: L6218E: Undefined symbol hciCmdSend (referred from BUILD/tests/MTB_UBLOX_ODIN_W2/ARM/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/TOOLCHAIN_ARM/libublox-odin-w2-driver.ar(hci_vendor_cmd.o)).
It looks like the folloiwng library must be updated:
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/TARGET_MODULE_UBLOX_ODIN_W2/sdk/TOOLCHAIN_ARM/libublox-odin-w2-driver.ar
According to the documentation of STM32F437VG76 MCU:
The LSI RC acts as an low-power clock source that can be kept running in Stop and
Standby mode for the independent watchdog (IWDG) and Auto-wakeup unit (AWU). The
clock frequency is around 32 kHz. For more details, refer to the electrical characteristics
section of the datasheets.
It seems that typical LSI frequency is 32 kHz, but it may vary from 17 to 47 kHz!
This means that lp-timer test may fail on the same board because lp-ticker frequency is unstable.
Support secure/non-secure combined build for PSA target:
1. In secure post-build, deliver built secure image to TARGET_NU_PREBUILD_SECURE
directory.
2. In non-secure post-build, merge non-secure image with secure image saved in
TARGET_NU_PREBUILD_SECURE directory.
3. In non-secure post-build, user can also drop secure image saved in
TARGET_NU_PREBUILD_SECURE directory and provide its own by adding the line below
in mbed_app.json:
"target.extra_labels_remove": ["NU_PREBUILD_SECURE"]
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
- By default, Mbed OS build tools use standard C library for all supported toolchains.
It is possible to use smaller C libraries by overriding the "target.default_lib" option
with "small". This option is only currently supported for the GCC_ARM toolchain.
This override config option is now extended in the build tool for ARM toolchain.
- Add configuration option to specify libraries supported for each toolchain per targets.
- Move __aeabi_assert function from rtos to retarget code so it’s available for bare metal.
- Use 2 memory region model for ARM toolchain scatter file for the following targets:
NUCLEO_F207ZG, STM32F411xE, STM32F429xI, NUCLEO_L073RZ, STM32F303xE
- Add a warning message in the build tools to deprecate uARM toolchain.
- NewLib-Nano C library is not supporting floating-point and printf with %hhd,%hhu,%hhX,%lld,%llu,%llX
format specifier so skipping those green tea test cases.
Ticless on STM32 F4 boards causes SPI issue with following PR:
# 11682 Make FPGA tests to pass on CI targets (SPI, analogIn, PWM)
In asynch mode, using interrupts, SPI hardware detect an RX overrun.
Our understanding is that lpticker wrapper latency
causes issue similar to #8714 and #9785,
specially with SPI asynch which use interrupts.
These targets below just support PRNG, not real TRNG. They cannot annouce TRNG.
- NUMAKER_PFM_NUC472
- NUMAKER_PFM_M487
- NUMAKER_IOT_M487
On targets without TRNG, to run mbedtls applications which require entropy source,
there are two alternatives to TRNG:
- Custom entropy source:
Define MBEDTLS_ENTROPY_HARDWARE_ALT and provide custom mbedtls_hardware_poll(...)
- NV seed:
1. Define MBEDTLS_ENTROPY_NV_SEED
2. Define MBEDTLS_PLATFORM_NV_SEED_READ_MACRO/MBEDTLS_PLATFORM_NV_SEED_WRITE_MACRO and provide custom mbedtls_nv_seed_read(...)/mbedtls_nv_seed_write(...).
3. Don't define MBEDTLS_PSA_INJECT_ENTROPY. Meet mbedtls_psa_inject_entropy(...) undefined and then provide custom one, which must be compatible with mbedtls_nv_seed_read(...)/mbedtls_nv_seed_write(...) above.
4. For development, simulating partial provision process, inject entropy seed via mbedtls_psa_inject_entropy(...) pre-main.
The proposed review fixes by Jerome, cherry-picked in.
(cherry picked from commit fb15f023a9b7b679301b45eaa160ae8cb2e1f23c)
Signed-off-by: Janne Kiiskila <janne.kiiskila@arm.com>
- Enable FLASHIAP for all H7 boards
- Use "TDB_INTERNAL" for all H7 boards
- Define specific internal_base_address only for DISCO_H747I_CM7
(default address is the end of FLASH which is correct for other H7 boards)
- Correct GetSectorBase function with Dual Bank information
Recent measurements have shown that the total wake-up latency can be more
than the 3ms initially set. It was measured as 3,7ms on DISCO_L475VG_IOT01A
target and 3,1ms on NUCLEO_L073RZ target. So set it to 4ms to be on the
safe side.
In this new memory partition, secure program is most simplified and non-secure program can make most use of memory for its large application like Pelion:
- Flash (512KiB in total): 64KiB for secure and 448KiB for nonsecure.
- SRAM (96KiB in total): 8KiB for secure and 88KiB for nonsecure.
Besides, to make secure program fit into 8KiB:
- Decrease boot stack size to 0x600 bytes
- Remove serial support
This is to meet platform name 'NU_PFM_M2351' registered in mbed-os-tools. This tool
uses the platform name as a key to search platform related properties in targets.json.
For example, the property 'forced_reset_timeout' is critical for Greentea test.
Notes:
- CRC and TRNG are disabled on this board since the MCU on this board does not have the required hardware.
- QSPI and QSPIF are temporarily removed due to issues related to supporting the new S25FS512S flash chip we have on this board. These will be enabled as soon as we can get the issues resolved.
https://github.com/ARMmbed/mbed-os/issues/11722
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I -> for CM7 core
* DISCO_H747I_CM4 -> for CM4 core
Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)
Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.
Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
In order to flash CM4, one can use STM32 CubeProgrammer tool.
Earlier changes introduced a change to default Arm C6, which does not compile the micro library which is based on Mbed 2. This change fixes the compiler version for NRF51_MICROBIT devices.
Reasons to remove TRNG support:
1. M252 just has 32KiB SRAM and cannot afford mbedtls application.
2. Implementing TRNG HAL with PRNG H/W has security concern.
On Nuvoton targets, lp_ticker_set_interrupt(...) needs around 3 lp-ticker
ticks to take effect. It may miss when current tick and match tick are very
close (see hal/LowPowerTickerWrapper.cpp). Enlarge LPTICKER_DELAY_TICKS to
4 from 3 to address this boundary case.
Without this override, mpu hal will require 5 mpu regions which exceed 4 mpu
regions supported by M252 (see hal/mpu/mbed_mpu_v8m.c). In this scenario,
we will hit assert error but we actually meet stack overrun first due to just
0x400 bytes for emitting error message. The issue doesn’t occur on other
targets such as M487 because it has 8 mpu regions.
static_memory_defines controls the macro MBED_RAM_START AND MBED_RAM_SIZE
when nrf52840 to use softdevice, it need MBED_RAM_START to set the true application ram start
default static_memory_defines is true, so just remove NRF52840 and NRF52832's set
NOTE1: USB UART is partitioned for non-secure world. Secure world still can share
it with limit that its interrupt cannot use in secure world.
NOTE2: In secure world, USB UART is only for Greentea and STDIO. Developers shouldn't
use it for other purposes.
Support secure/non-secure combined build for non-PSA target:
1. In secure post-build, deliver built secure image to TARGET_NU_PREBUILD_SECURE
directory which is to combine later.
2. In non-secure post-build, merge non-secure image with secure image saved in
TARGET_NU_PREBUILD_SECURE directory.
3. In non-secure post-build, user can also drop pre-built secure image saved in
TARGET_NU_PREBUILD_SECURE directory and provide its own by adding the line below
in mbed_app.json:
"target.extra_labels_remove": ["NU_PREBUILD_SECURE"]
1. Create a private target name NU_PFM_M2351_CM which stands for the
NuMaker-PFM-M2351 board and is to be extended.
2. NU_PFM_M2351_NPSA_S/NS target names for non-PSA secure/non-secure targets
respectively.
3. The original target name NUMAKER_PFM_M2351 is recycled and cannot be used.
Use NU_PFM_M2351_S/NS for non-PSA secure/non-secure targets instead.
NOTE: Target name doesn't follow the rule below because online database has
limit of max 20 chars:
NUMAKER_PFM_M2351_PSA/NOPSA_S/NS
Instead, it has the rule:
NU_PFM_M2351_[NPSA_]S/NS
NU_PFM_M2351_S/NS for PSA targets. This is to be consistent with current
PSA target naming. So the resolved target names are:
NU_PFM_M2351_S : PSA secure target
NU_PFM_M2351_NS : PSA non-secure target
NU_PFM_M2351_NPSA_S : Non-PSA secure target
NU_PFM_M2351_NPSA_NS : Non-PSA non-secure target
Removed private TODO file.
Fixed cmsis.h so that renaming of CS and DIR_H is not necessary any more.
Leave pinmap.h unchanged although it should include stdint.h
Moved stdint.h to PinNames.h instead, where it is also used.
Reworked system startup (clock configuration) to be more flexible
(different clock sources for MCLK and SMCLK, configurable clock dividers).
Fixed Copyright headers
Changed default clock settings for MSP432 Launchpad to
MCLK 48 MHz (HFXT) and SMCLK 24 MHz (HFXT)
Remove mbed_rtx.h
Added common mbed_rtx.h file (merge with lastest master)
Added support for IAR toolchain
Fixed some astyle problems.
Added support for ARM C5/C6 toolchains
Small changes to us_ticker implementation after port testing.
Changed default clock configuration to DCO (MCLK 48MHz, SMCLK 24MHz).
De-configured the LFXT crysal, because this made the system_reset() test to time out.
Removed MPU from device_has list. Changed clock source to HFXT.
Reworked startup_msp432p401r.c -> now only one startup file for all compilers.
Changed all linker scripts to delete VECTORS stuff (not needed).
Moved position of MSP432 in targets.json so TI stuff is in one block.
This test requires total latency (tot = h/w + s/w) (wakeup from deepsleep) be
under 1ms. To check the issue, measure total latency on Nuvoton targets:
TARGET EXP(us) EXP+TOL(us) ACT(us)
NANO130 42000 43000 42939
NUC472 42000 43000 42236
M453 42000 43000 43274
M487 42000 43000 42877
M2351 42000 43000 43213
Checking h/w spec, h/w latency (wakeup time from normal power-down mode) on
M487/M2351 is just 1us (n/a on other targets). S/W latency plays the major
part here.
S/W latency relies on system performance. On Nuvoton targets, 'LPTICKER_DELAY_TICKS'
possibly complicates the test. Anyway, to pass the test, add extra 1ms latency
(deep-sleep-latency) in targets.json for Nuvoton targets.
On Nuvoton targets, lp_ticker_set_interrupt(...) needs around 3 lp-ticker
ticks to take effect. It may miss when current tick and match tick are very
close (see hal/LowPowerTickerWrapper.cpp). Enlarge LPTICKER_DELAY_TICKS to
4 from 3 to address this boundary case.
Enables code examples/end user applications to override if necessary
Add BSP_DESIGN_MODUS component by default to all PSOC6 boards. Applications can remove this if necessary.
static_memory_defines controls the macro MBED_RAM_START AND MBED_RAM_SIZE
when nrf52832 to use softdevice, it need MBED_RAM_START to set the true application ram start
For STM32 platforms that embed an OSPI IP, we're offering
a QSPI fallback support with this commit.
When OSPI is supported in mbed, we can consider adding full
OSPI support
This allows to specify which hal version to use for each family.
It can also be used to modify the thread stack size.
Signed-off-by: Vincent Veron <vincent.veron@st.com>
This port is based on :
* CurryGuy ethernet branch :
https://github.com/CurryGuy/mbed-os/tree/feature-stm32h7-emac
* STM32 Cube example :
Applications/LwIP/LwIP_HTTP_Server_Netconn_RTOS example
Signed-off-by: Vincent Veron <vincent.veron@st.com>
M451 series can classify by M45xD/M45xC and M45xG/M45xE. To support this
classification:
1. Create TARGET_M45xD_M45xC and TARGET_M45xG_M45xE targets.
2. Mark NUMAKER_PFM_M453 belongs to TARGET_M45xG_M45xE by 'extra_labels_add'
in targets.json.
3. Fix pin name table according to the classification.
4. Fix pinmap table according to the classification.
This test requires total latency (tot = h/w + s/w) (wakeup from deepsleep) be
under 1ms. To check the issue, measure total latency on Nuvoton targets:
TARGET EXP(us) EXP+TOL(us) ACT(us)
NANO130 42000 43000 42939
NUC472 42000 43000 42236
M453 42000 43000 43274
M487 42000 43000 42877
M2351 42000 43000 43213
Checking h/w spec, h/w latency (wakeup time from normal power-down mode) on
M487/M2351 is just 1us (n/a on other targets). S/W latency plays the major
part here.
S/W latency relies on system performance. On Nuvoton targets, 'LPTICKER_DELAY_TICKS'
possibly complicates the test. Anyway, to pass the test, add extra 1ms latency
(deep-sleep-latency) in targets.json for Nuvoton targets.
Since QSPi is not yet supported by base TARGET_PSOC6,
there is no need to remove the device label from
FUTURE targets that inherit from TARGET_PSOC6.
This will need to be reverted back once the QSPI support
is implemented for Cypress PSOC6 targets.
According to comment in the implementation this target supports the
hardware flow control on UART1 peripheral.
This patch fixes build errors after adding DEVICE_SERIAL_FC guards to
hal/serial_api.h.
On Nuvoton targets, lp_ticker_set_interrupt(...) needs around 3 lp-ticker
ticks to take effect. It may miss when current tick and match tick are very
close (see hal/LowPowerTickerWrapper.cpp). Enlarge LPTICKER_DELAY_TICKS to
4 from 3 to address this boundary case.
Replace the prebuilt CM0+ HEX images with C files that provide the
variable cy_m0p_image placed to the combined ELF image with linker
script. This simplifies build flow of PSoC 6 application and improves
compatibility with IDE export targets. It is still possible to use
the custom prebuilt HEX images for PSA targets that remove CM0P_SLEEP
label and specify the `hex_filename` in targets.json.
Linker scripts are compatible with both scenarios.
Fix device management client compilation on MTB_STM_S2LP
Fixes:
./mbed-cloud-client/mbed-client-pal/Source/Port/Reference-Impl/OS_Specific/mbedOS/ROT/pal_plat_rot.cpp:67:5: error: 'DeviceKey' was not declared in this scope
DeviceKey &devkey = DeviceKey::get_instance();
-Enable MBED_SPLIT_HEAP for K64F and K66F
-Allow GCC_ARM toolchain to utilize remaining 64K memory area
-Make ARM toolchain to start memory filling from 64K region to leave
more space to bigger 192K region.
Watchdog is hardware driver. It interacts with HAL - provides wrapper to interact with the peripheral.
Provides basic functionality: start/stop, get timeout/max timeout.
It is automatically kicked by a timer, according to the timeout set in ctor.
For L0/L4/H7/F7/WB targets that have tickless enabled, remove the tickless from
us ticker and the delay ticks as the C++ wrapper layer is being removed
and replaced by the low layer handling.
For now, the few F4 targets with LPTIM are left with previous configuration
as test results are showing a few instabilities not yet understood.
As the timer code became more generic, coping with initialization on
demand, and variable width and speed us_ticker_api implementations,
wait_us has gradually gotten slower and slower.
Some platforms have reportedly seen overhead of wait_us() increase from
10µs to 30µs. These changes should fully reverse that drop, and even
make it better than ever.
Add fast paths for platforms that provide compile-time information about
us_ticker. Speed and code size is improved further if:
* Timer has >= 2^32 microsecond range, or better still is 32-bit 1MHz.
* Platform implements us_ticker_read() as a macro
* Timer is initialised at boot, rather than first use
The latter initialisation option is the default for STM, as this has
always been the case.
The build tool uses the sector size found in the CMSIS Pack to determine if
the size that can be specified by `target.restrict_size` is enough to fit
all the parts of a given binary. See `target.restrict_size` documentation
in the Mbed OS manual for more information.
The sector size found in the CMSIS Pack is overriden to allow the build
tool to accurately make the decision.
The target's sectors in the CMSIS Pack are defined in 32KB pages.
However, you can erase pages at the 512 byte level.
This commit changes defined sector erase size to 512 bytes instead of
32 Kilobytes.
Time drifting test cases use serial communication with the host and are unstable on CI.
Skip time-drifting test cases if SKIP_TIME_DRIFT_TESTS macro is defined.
The idea for the future is to use FPGA test shield for timing tests instead of host scripts.
Also remove `__ARM_FM` macro which in most cases was used to disable time drifting tests. In other cases replace `__ARM_FM` with `TARGET_ARM_FM` which is more suitable.
This allows Cypress to deliver middleware libraries with
precompiled libraries for SoftFP ahd HardFP, separated by
component-specific sub-directories:
COMPONENT_SOFTFP/TOOLCHAIN_GCC_ARM/libcy_capsense.a
COMPONENT_HARDFP/TOOLCHAIN_GCC_ARM/libcy_capsense.a
- mbed_watchdog_mgr has interface name mbed_wdog_manager_start(),mbed_wdog_manager_stop(),mbed_wdog_manager_kick()
- HwWatchdog is going to attach with LowPowerTIcker for periodic callback functionality
- mbed_wdog_manager_start() will either get start either by BL/RTOS Aps,it reads the timeout value specified via macro and macro gets defined in target.json file.
- mbed_wdog_manager_start() internally configure below HAL hw watchdog with timeout specified via target.json
- mbed_wdog_manager_start() internally divide the timeout(specified in target.json) by the 2 and attach LowPowerTicker with periodic callback of hw_kick()
- mbed_wdog_manager_start() internally create one instance of sw watchdog class,to access the static list data structure of sw watchdog class
- mbed_wdog_manager_kick() function periodically get called and refresh the hw watchdog to avoid watchdog reset
- converted C++ code into C based APIs
- added boolean to control watchdog start and stop
- Added detach from ticker on stop API
Anna Bridge
Mahesh Mahadevan
jeromecoutant
Andrew Chong
PARKJIHOON
Rajkumar Kanagaraj
Przemyslaw Stekiel
Martin Kojtal
Chun-Chieh Li
Janne Kiiskila
d-kato
Hugues Kamba
thegecko
cyliangtw
Antti Kauppila
toyowata
Alexandre Bourdiol
Michael Gurevich
petroborys
Chris Trowbridge
Veijo Pesonen
Kyle Kearney
Ryan Morse
midd
Giampaolo Mancini
amq
Wajahat Abbas
Laurent Meunier
Roman Okhrimenko
Rohan Fletcher
George Psimenos
Graham Hammond
Ben Cooke
Qinghao Shi
James Wang
mahanthgouda
Kostiantyn Tkachov
Michal Paszta
Lin Gao
Andreas Terstegge
Hennadiy Kytsun
aqib-ublox
Orest Akymyshyn
Marcelo Salazar
Tony Wu
Vincent Veron
int_szyk
Ganesh Ramachandran
Chris Snow
Martino Facchin
Seppo Takalo
Reda Maher
maclobdell
Neil Tuttle
Arto Kinnunen
Volodymyr Medvid
Volodymyr Medvid
Filip Jagodzinski
itziar
Teemu Takaluoma
Kevin Bracey
Devaraj Ranganna
Jaeden Amero
Lingkai Dong
Ronny Liu
aglass0fmilk