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692 Commits (747e8e1ea1e70777bbfb2afae3463c60ffd78a5b)

Author SHA1 Message Date
Martin Kojtal e01366ce8f Merge pull request #3399 from bcostm/fix_issue_3266 
NUCLEO_F103RB - Add SERIAL_FC feature
 2016-12-09 15:37:57 +01:00
Martin Kojtal e00850dbc9 Merge pull request #3382 from kgills/max32620_serial_readable 
[MAX32620] Fixing serial readable function.
 2016-12-09 15:37:25 +01:00
Martin Kojtal 00696e623f Merge pull request #3378 from NXPmicro/K66_ENET 
K66F: Enable LWIP feature
 2016-12-09 15:36:58 +01:00
Martin Kojtal b13954c6b5 Merge pull request #3377 from LMESTM/fix_L152RE_Rcc_Config 
STM32 NUCLEO-L152RE Update system core clock to 32MHz
 2016-12-09 15:36:07 +01:00
Martin Kojtal a3e41f246e Merge pull request #3369 from adustm/disco_f469_newpins 
Add CAN2 missing pins for connector CN12
 2016-12-09 15:35:07 +01:00
Martin Kojtal 04f940de2d Merge pull request #3324 from LMESTM/dev_i2c_common_code 
Dev i2c common code
 2016-12-09 15:30:00 +01:00
Martin Kojtal 163667165e Merge pull request #3312 from NXPmicro/SPI_ASYNCH_API 
K64F: SPI Asynch API implementation
 2016-12-09 15:15:54 +01:00
jeromecoutant 4ea65df99d STM32F3 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 14:56:52 +01:00
jeromecoutant 008a12327c STM32F2 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 14:52:51 +01:00
jeromecoutant 0e404c2b48 STM32F1 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
 2016-12-09 14:48:26 +01:00
jeromecoutant 3734269326 STM32L4 : correct ST HAL API call 
- ll_utils: compilation issue
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 13:58:22 +01:00
jeromecoutant 3ab5dce41d STM32L1 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
 2016-12-09 11:32:08 +01:00
jeromecoutant db9dcb8b40 STM32F7 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 09:58:54 +01:00
jeromecoutant 6aef5333bd STM32F0 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- ADC: init parameter was not allowed by ST HAL API
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 09:44:54 +01:00
ccli8 8c0948d605 [NUC472/M453] Integrate with Travis CI 
1. Add targets into build_travis.py and tests.py.
2. Add target SPI pins into SPI SD test samples.
3. Rename target TOOLCHAIN_GCC_ARM/retarget.c to avoid name collision of compiled retarget.o with platform/retargets.cpp.
 2016-12-09 13:46:38 +08:00
Sam Lin b2f8de8294 Repair the Transmit mailbox (0,1,2) empty interrupt Flag not clear BUG 2016-12-09 10:44:28 +08:00
jeromecoutant 12d2795871 STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 17:03:25 +01:00
bcostm 810a980cb7 Add SERIAL_FC in targets.json/device_has field for NUCLEO_F103RB 2016-12-08 16:45:30 +01:00
bcostm 88988b688b Add external declaration of PinMap_UART_RTS/CTS[] const tables 2016-12-08 16:43:26 +01:00
jeromecoutant 64e92a54de STM32L4 : refactor stm32l4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 16:15:47 +01:00
bcostm db8f966a2c Correct A3, A4, A5 pins definitions 2016-12-08 15:57:05 +01:00
bcostm 6787c14d97 Add platform in other python and json files 2016-12-08 15:57:05 +01:00
bcostm 9ce9d1a9e7 Correct SDIO_UART pins configuration 2016-12-08 15:57:05 +01:00
bcostm 49755981dd Add this platform in mbed_rtx.h file 2016-12-08 15:57:05 +01:00
bcostm 5b2946ded9 Correct system clock configuration 2016-12-08 15:57:05 +01:00
bcostm 1796e8cd9a Update hal_tick files 2016-12-08 15:57:05 +01:00
bcostm 19828d8dd5 Add startup and linker files for ARM_STD, ARM_MICRO, IAR 2016-12-08 15:57:05 +01:00
bcostm 2ccbd27baf Add GCC_ARM files and fix errors during GCC build 2016-12-08 15:57:05 +01:00
bcostm f1c6b0f842 Add cmsis, hal_tick, system files 2016-12-08 15:57:05 +01:00
bcostm 3b1fb796c3 Add first pin, port and objects files 2016-12-08 15:57:05 +01:00
jeromecoutant 9dc5cd1266 STM32F7 : refactor stm32f7xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 15:54:38 +01:00
Kevin Gillespie a0243cd852 [MAX32620] Fixing serial readable function. 2016-12-07 10:23:26 -06:00
jeromecoutant fa8529dea3 STM32F4 : refactor stm32f4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-07 15:31:41 +01:00
jeromecoutant d30c34c5d1 STM32F3 : map ST HAL assert into MBED assert 2016-12-07 15:09:55 +01:00
jeromecoutant 06ffb4cf8a STM32F2 : map ST HAL assert into MBED assert 2016-12-07 14:52:24 +01:00
jeromecoutant f0156306ac STM32F0 : map ST HAL assert into MBED assert 2016-12-07 14:13:19 +01:00
jeromecoutant b606267641 STM32F1 : map ST HAL assert into MBED assert 2016-12-07 14:08:06 +01:00
andreas.larsson b5b3bede31 Added tmpisr = regs->ISR; at the end of the while loop to re-evaluate the ISR value 2016-12-07 12:22:31 +01:00
Mahadevan Mahesh 428e8b23c1 K66F: Enable LWIP feature 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-06 12:37:02 -06:00
Laurent MEUNIER 8e11541a74 STM32 NUCLEO-L152RE Update system core clock to 32MHz 
Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz

And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz

This allows to take full benefit of the CPU capability.
 2016-12-06 11:45:19 +01:00
adustm 3fdbe85b00 Add CAN2 missing pins for connector CN12 2016-12-05 18:24:30 +01:00
Martin Kojtal 507956d658 Merge pull request #3317 from jeromecoutant/PR_F429 
NUCLEO_F429ZI has integrated LSE
 2016-12-05 16:53:09 +00:00
TsungtaWu 7d4befa01b DELTA_DFBM_NQ620 default configuration (#3298) 
* Change default SRC setting and add mbed_sdk_init() for DELTA_DFBM_NQ620

Change SRC setting to RC as default to match with hardware config.
mbed_sdk_init() is added for internal debug purpose (experimental)

* remove the redundant #define

Those #define never used.
 2016-12-05 16:43:07 +00:00
Mahadevan Mahesh d5fca6dab0 K64F DSPI Driver: Fix errors where DSPI state is incorrectly kept busy 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-05 10:06:14 -06:00
Mahadevan Mahesh 5eb92ea1db K64F SPI Update: Implement Asynch API's for SPI 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-05 10:06:08 -06:00
ccli8 7f4881fbb2 [NUC472/M453] Support USB device 2016-12-05 15:12:15 +08:00
Martin Kojtal 7338280f71 Merge pull request #3318 from radhika-raghavendran/master 
Register map changes for RevG
 2016-12-02 15:49:12 +01:00
Martin Kojtal bd499daae8 Merge pull request #3304 from jeromecoutant/PR_L476 
STM32L476: no HSE is present in NUCLEO and DISCO boards
 2016-12-02 15:48:38 +01:00
Martin Kojtal 1c2c121741 Merge pull request #3303 from adustm/stm_fix_interrupt_in 
Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor
 2016-12-02 15:47:50 +01:00
Martin Kojtal ab2e869a24 Merge pull request #3157 from SiliconLabs/SiliconLabs-EFR32 
[Silicon Labs] Adding support for EFR32MG1 wireless SoC
 2016-12-02 15:46:35 +01:00
Martin Kojtal 4f314beeee Merge pull request #3309 from OpenNuvoton/nuvoton 
[NUC472/M453] Fix CI failed tests
 2016-12-02 15:33:52 +01:00
Martin Kojtal a2963668f7 Merge pull request #3345 from bcostm/fix_suspend_tick 
STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions
 2016-12-02 15:28:12 +01:00
Laurent MEUNIER 29b32b84b3 STM32 I2C - 1MHZ frequency is allowed 
So make the assert to cover all possible values
Also assert applies only for I2C_IP_VERSION_V2.
Also in case of I2C_IP_VERSION_V1, the HAL makes the proper
checks and can dynamically scale the frequency in case of
intermediate value.
 2016-12-01 15:20:11 +01:00
Martin Kojtal c8c01f0c5c Merge pull request #3322 from jeromecoutant/PR_DISCO_L0 
DISCO_L053C8 doesn't support LSE
 2016-12-01 13:52:16 +00:00
0xc0170 bcdb86675a ublox eva nina - fix line endings 
Fixes #3346
 2016-12-01 11:19:42 +00:00
tomoyuki yamanaka cea27724d7 Fix frequency function of CAN driver. 
Until now, when the frequency function of CAN driver was executed, signal no output, and the frequency could not be changed.
Since there was an error in the frequency changing procedure I modified it.
 2016-12-01 11:41:20 +09:00
jeromecoutant 7adb7a54de NUCLEO_F429ZI has integrated LSE 2016-11-30 14:43:01 +01:00
bcostm 18dc6f4f81 Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions to make LPT tests pass. 2016-11-30 11:31:25 +01:00
jeromecoutant 29771cb891 DISCO_L053C8 doesn't support LSE 2016-11-30 09:02:06 +01:00
jeromecoutant 448f501d4a STM32L476: comments update 2016-11-30 08:52:49 +01:00
jeromecoutant 757944ee24 STM32L476: no HSE is present in NUCLEO and DISCO boards 2016-11-30 08:51:18 +01:00
Laurent MEUNIER 0505a5274d [STM32] enable I2C ASYNCH 
the I2C_ASYNCH feature is  added to all STM32 except
F1 family for now. Will be added when HAL update is done.
 2016-11-30 08:25:44 +01:00
Laurent MEUNIER 3fad50287c [STM32] Make most of the I2C code into a common file 
Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.

The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.

F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive 
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER a0722b1086 [STM32] HAL F2: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 85a2f7ac49 [STM32] HAL L1: I2C fix btf / rxne cases 
This is an alignement to F4 HAL as the same IP is used.
Next official HAL delivery update hall will include the same alignement.
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 77364f9fe2 [STM32] HAL L0: I2C / DMA updates 
This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
 2016-11-30 08:23:13 +01:00
Martin Kojtal c57427f77f Merge pull request #3321 from jeromecoutant/PR_L432KC 
no HSE available by default for NUCLEO_L432KC
 2016-11-29 18:25:17 +01:00
Martin Kojtal 519b500d4c Merge pull request #3320 from bcostm/fix_vref_label 
STM32 - Add ADC_VREF label
 2016-11-29 18:24:52 +01:00
Martin Kojtal bd994b3f41 Merge pull request #3302 from bcostm/fix_issue_1685 
STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels
 2016-11-29 18:21:14 +01:00
Martin Kojtal d4e23e1048 Merge pull request #3291 from mazgch/patch-1 
Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q
 2016-11-29 18:19:41 +01:00
Martin Kojtal f89bf84beb Merge pull request #3289 from TomoYamanaka/master 
Bug fix of initial value of interrupt edge in "gpio_irq_init" function.
 2016-11-29 18:18:17 +01:00
Martin Kojtal a8ebfaa058 Merge pull request #3288 from LMESTM/dev_spi_asynch_l0l1 
Dev spi asynch l0l1
 2016-11-29 18:17:06 +01:00
Martin Kojtal 42f4843b97 Merge pull request #3241 from NXPmicro/Add_KW41_Support 
Add support for FRDM-KW41
 2016-11-29 18:11:59 +01:00
Martin Kojtal bb2d03f34b Merge pull request #3213 from bcostm/factorize_ticker 
STM32: Refactor us_ticker.c + hal_tick.c files
 2016-11-29 18:10:45 +01:00
Martin Kojtal 93c08f340a Merge pull request #3062 from jamike/TARGET_STM_USBDEVICE_FS 
TARGET_STM :USB device FS
 2016-11-29 18:07:11 +01:00
Radhika 3d23ec0904 Formatting changes as per guidelines 2016-11-29 16:58:33 +05:30
ccli8 e1995dbe79 [NUC472/M453] Fix spi_master_transfer failed as bit width is 32 2016-11-25 15:32:25 +08:00
jeromecoutant a933032a58 no HSE available by default for NUCLEO_L432KC 2016-11-24 11:33:43 +01:00
bcostm 92d39e2390 Add ADC_VREF label 2016-11-24 10:30:23 +01:00
andreas.larsson 9abb7c3777 Updated ARM binary 2016-11-23 17:39:28 +01:00
andreas.larsson 4648ec606b Added updated drivers for GCC, IAR 2016-11-23 15:18:17 +01:00
andreas.larsson c2d09bd6a2 Fixed wrong start params to cbMAIN_startWlan 2016-11-23 11:38:35 +01:00
ccli8 137053343e [M453] Fix button naming error 2016-11-23 14:35:09 +08:00
Martin Kojtal d60f424a7e Merge pull request #3256 from NXPmicro/Include_stddef 
Kinetis SDK: Include stddef.h to fix build errors seen when including…
 2016-11-22 22:20:29 +00:00
Martin Kojtal 905a173a7a Merge pull request #3268 from NXPmicro/Coding_Convention_Changes 
Coding convention changes
 2016-11-22 22:18:41 +00:00
bcostm a3baf2d7bf Add more comment on the modified line 2016-11-22 11:03:44 +01:00
ccli8 d24c71fad9 [NUC472/M453] Correct return of i2c_byte_write() on NAK 2016-11-22 13:45:01 +08:00
ccli8 57a22cd4ab [NUC472/M453] Fix CI I2C EEPROM failed 2016-11-22 09:56:54 +08:00
ccli8 f4890f68f1 [NUC472] Remove SPI MOSI1 and MISO1 pins from pinmap 
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
 2016-11-22 09:56:54 +08:00
ccli8 6c1fca60a5 [M453] Remove SPI MOSI1 and MISO1 pins from pinmap 
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
 2016-11-22 09:56:54 +08:00
ccli8 e1acb06d05 [NUC472] Rename variable name in analog-in 2016-11-22 09:56:53 +08:00
ccli8 bb1617c5f8 [M453] Fix EADC module is initialized multiple times 
Also fix EADC module name EADC is hardcoded.
 2016-11-22 09:56:53 +08:00
ccli8 35b2ad5a2c [NUC472] Fix CI tests-api-analogin failed 
1. Fix UNO pins A5-A7 don't support analog-in by replacing ADC with EADC to implement analog-in HAL.
2. Update CLK driver to fix EADC clock divider setting error. Also fix CLK_Idle() together.
 2016-11-22 09:56:53 +08:00
ccli8 fe883d42ab [M453] Fix CI tests-api-analogin failed 
1. Fix ADC convert finish check error.
2. Set ADC Vref to internal by default.
 2016-11-22 09:56:53 +08:00
ccli8 e0f97e5c80 [NUC472/M453] Support separate enable of GPIO IRQ de-bounce 2016-11-22 09:56:53 +08:00
ccli8 657d90db2c [NUC472/M453] Fix I2C issues 
1. Fix error on return of i2c_byte_write().
2. Fix error in zero-length transfer corner case.
 2016-11-22 09:56:53 +08:00
Martin Kojtal 7f44dee6d1 Merge pull request #3278 from bcostm/nucleo-f103rb_ctsrts_pins 
NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control
 2016-11-21 23:22:41 +00:00
Martin Kojtal a987cc0bee Merge pull request #3271 from ARMmbed/odin_wifi_default_on 
WiFi: Make WiFi default networking interface on Odin board
 2016-11-21 23:19:02 +00:00
adustm 0219b64af4 fix #2956. Add HAL_DeInit function if gpio_irq destructor 
This allows ci-test-shield tests-api-interruptin to pass
 2016-11-21 15:55:15 +01:00
bcostm 2ae748910b STM32F4 - Clear VBATE and TSVREFE bits before configuring ADC channels 2016-11-21 13:07:26 +01:00
Michael Ammann 76cfccb716 Update PinNames.h 2016-11-21 08:07:58 +01:00
Michael Ammann 5cf34fac8e Add files via upload 2016-11-18 17:17:28 +01:00
Michael Ammann 83379979a2 Create device.h 2016-11-18 17:17:15 +01:00
Michael Ammann 1b59ec0376 Update targets.json 2016-11-18 17:15:08 +01:00
tomoyuki yamanaka b7c901c8e7 Bug fix of initial value of interrupt edge in "gpio_irq_init" function. 
Renesas modified the  initial value of interrupt edge in "gpio_irq_init" function.
The value was "both egde(rise and fall)".So we modified it to "low revel".
 2016-11-18 21:03:00 +09:00
Steven Cooreman 245e2e2e2d Revert "[EFR32] Adding hardware acceleration for mbed TLS" 
This reverts commit c0301b15d2.
 2016-11-18 11:05:36 +01:00
Steven Cooreman ef690f734f Fix broken file 2016-11-18 11:03:38 +01:00
Steven Cooreman ed905b7cc8 Revert "[EFR32] Move the mbedTLS hardware acceleration code to EFR32 family" 
This reverts commit a0f62b1e4f.
 2016-11-18 11:00:57 +01:00
Steven Cooreman ad773716ff [EFR32] Move Nanostack driver to Nanostack folder 
mbed compile doesn't support two different FEATURE_X folders being merged, so we'll have to move our nanostack driver into the Nanostack folder for the time being.
 2016-11-18 10:58:36 +01:00
Laurent MEUNIER 40b0402484 [stm32] Enable SPI_ASYNCH for L0 and L1 families 2016-11-18 09:59:53 +01:00
Laurent MEUNIER e2613d5058 stm32 spi : IRQ handler light optimization 
This commit contains a few optimizations to get a better performance
in SPI Asynch mode
 2016-11-18 09:59:53 +01:00
Laurent MEUNIER 79af576051 stm32 spi - IRQ management 
Disable IRQ when transfer is finished.
Also clear pending IRQ after they have been disabled.
 2016-11-18 09:59:53 +01:00
Laurent MEUNIER 64a037cc8d STM32L0 - update spi HAL driver 
This is a temporary update waiting for the next official release
 2016-11-18 09:59:53 +01:00
Laurent MEUNIER 65db01f457 STM32L1 - update spi HAL driver 
This is a temporary update waiting for the next official release
 2016-11-18 09:59:53 +01:00
Laurent MEUNIER 7cdaba8474 [stm32] remove unused module member in spi_s struct 2016-11-18 09:59:53 +01:00
Radhika 08ae38b3a0 Register map changes for RevG 2016-11-18 13:41:53 +05:30
bcostm 6f12eca4a6 NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control 2016-11-17 10:15:21 +01:00
Martin Kojtal 5cea44c755 Merge pull request #3252 from pan-/fix_nrf51_rtc 
[NORDIC - NRF51 - MBED 2] Fix non handled RTC IRQ
 2016-11-16 17:43:31 +00:00
Martin Kojtal 6eb33e5f3c Merge pull request #3251 from LMESTM/dev_stm32l0_cube_v1.7.0 
Dev stm32l0 cube v1.7.0
 2016-11-16 17:43:16 +00:00
Martin Kojtal 5750f31d6d Merge pull request #3238 from LMESTM/dev_i2c_stm32f4hal 
Dev i2c stm32f4hal
 2016-11-16 17:42:12 +00:00
Bartek Szatkowski 20b7f05721 WiFi: Make WiFi default networking interface on Odin board 
That disables Ethernet by default and makes sure the Ethernet tests are
not failing when it's disabled.
 2016-11-16 12:00:09 +00:00
Mahadevan Mahesh b78e552d35 Kinetis SDK: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 14:23:29 -06:00
Mahadevan Mahesh 93aca0bbf2 K22F: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 14:10:54 -06:00
Mahadevan Mahesh 05382afa37 K64F: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 14:10:48 -06:00
Mahadevan Mahesh 26146e8929 KW24D: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 14:04:13 -06:00
Mahadevan Mahesh 5356246fbc KL82Z: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 14:04:07 -06:00
Mahadevan Mahesh 31d6bb914a KL43Z: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 14:04:01 -06:00
Mahadevan Mahesh 279925e161 KL27Z: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 14:03:55 -06:00
Mahadevan Mahesh 682df90b2e K82F: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 12:32:03 -06:00
Mahadevan Mahesh 652c81ce76 K66F: Coding convention fixes 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 12:31:55 -06:00
Mahadevan Mahesh 15d64c9aec Add support for FRDM-KW41 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-15 08:13:03 -06:00
Sam Grove ad35eafe93 Merge pull request #3253 from micromint/master 
Fix default polarity on LPC43XX PWM driver
 2016-11-14 21:53:03 -06:00
Sam Grove e875dbc90d Merge pull request #3237 from javierpedrido/master 
Added back USART 6 pins
 2016-11-14 21:46:59 -06:00
Sam Grove 31c81131df Merge pull request #3233 from brimston3/fix_k20_pwmclk 
K20xx Calculate PWM clock relative to bus clock
 2016-11-14 21:44:51 -06:00
Sam Grove c131a27dcf Merge pull request #3231 from monkiineko/master 
STM32F3: DISCO_F303VC - Add missing UART and ADC pin muxing options
 2016-11-14 21:44:32 -06:00
Sam Grove cb930e7482 Merge pull request #3243 from bridadan/fix-make-exporters 
Fix make exporters compilation
 2016-11-14 10:59:20 -06:00
bcostm da23ef135e Update license + date (same license as in mbed.h file) 2016-11-14 10:01:07 +01:00
bcostm 2006e458fd Typo corrections (functions declaration) 2016-11-14 09:56:54 +01:00
bcostm 777692cc16 Timer 16bit: Remove volatile variables. This solved many fails with MBED_24 test. 2016-11-14 09:31:14 +01:00
bcostm f8e18cdde4 Change TimMasterHandle variable declaration + typo corrections 2016-11-14 09:31:14 +01:00
bcostm cc24e5b7f9 Add initialization of timer instance in all functions 2016-11-14 09:31:14 +01:00
bcostm 6baec10d29 Rename files (remove stm_ prefix) 2016-11-14 09:31:14 +01:00
bcostm 589500642a STM32L0 - Add patch done previously on these devices. This solves MBED_24 test. 2016-11-14 09:31:14 +01:00
bcostm a2e686b82c Add volatile on one variable (alignment with 16bit file) 2016-11-14 09:31:14 +01:00
bcostm 896293d5be Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-11-14 09:31:14 +01:00
bcostm 3baaa7630b STM32L1 - Don't use RepetitionCounter field in timer init 2016-11-14 09:31:14 +01:00
bcostm 0524811c75 STM32xx - Remove hal_tick.c files and update hal_tick.h with new macro 2016-11-14 09:31:14 +01:00
bcostm ba8b33adc5 Minor changes 2016-11-14 09:31:14 +01:00
bcostm c3b8943f66 STM32L0 - Remove special treatment for reading the counter 2016-11-14 09:31:14 +01:00
bcostm ae858b4323 STM32F0/F1/L0 - Update TIM_MST_GET_PCLK_FREQ macro 2016-11-14 09:31:14 +01:00
bcostm 16239f5ed5 STM32L0 - Remove devices hal_tick.c files 2016-11-14 09:31:14 +01:00
bcostm 2488daf112 STM21L0 - Remove devices hal_tick.c file and update hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm a43e5b8a48 STM32F1 - Remove devices hal-tick files and update hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm 68915b7c27 STM32F0 - Add the timer type used (16b or 32b) + periph clock in hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm 4c7176fc2f Replace all devices hal_tick files with a common 16b and 32b version 2016-11-14 09:31:14 +01:00
bcostm bb10409954 Replace all devices us_ticker files with a common 16b and 32b file 2016-11-14 09:31:14 +01:00
Mahadevan Mahesh d635ef6ba0 Kinetis SDK: Include stddef.h to fix build errors seen when including SDK header files 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-10 13:22:13 -06:00
Anna Bridge f6f872a858 Merge pull request #3159 from radhika-raghavendran/master 
User trim values for NCS36510
 2016-11-10 17:06:54 +00:00
Anna Bridge 805af00b87 Merge pull request #3194 from NXPmicro/Update_K64_SDK_Drivers 
Update K64 sdk drivers
 2016-11-10 17:05:02 +00:00
Anna Bridge baec7b3aec Merge pull request #3198 from jeromecoutant/PR_F410_ASYNC 
NUCLEO_F410RB: Add I2C_ASYNCH capability
 2016-11-10 17:04:28 +00:00
Anna Bridge 67e03ee065 Merge pull request #3211 from OpenNuvoton/nuvoton 
[NUC472/M453] Support single UART shared by multiple serial objects and other updates
 2016-11-10 17:03:42 +00:00
Anna Bridge a553b23250 Merge pull request #3217 from jeromecoutant/PR_F469_ASYNC 
Add I2C_ASYNCH capability for DISCO_F469NI
 2016-11-10 17:02:54 +00:00
micromint aede0fc6f3 Fix default polarity on LPC43XX PWM driver 2016-11-10 13:00:34 -04:00
Vincent Coubard 9649637e42 [NORDIC - NRF51 - MBED 2] Fix a bug related to the RTC interrupt enabled. 
Enable the interrupt for the OS tick when the OS tick is enabled rather than
all the time. Otherwise, the interrupt will be triggered bu never handled.
 2016-11-10 16:47:25 +00:00
Laurent MEUNIER e293e07749 stm32f4 make comment more explicit 
As reported during review, this was not understandable as it is.
the get_i2c_obj allows to get a pointer to i2c_s struct from the
handle pointer. This therefore makes a hard-coded assumption
about the struct itself
 2016-11-10 17:30:04 +01:00
Laurent MEUNIER fa9d147f69 Update Serial following L0 HAL update 2016-11-10 11:03:46 +01:00
Laurent MEUNIER ab0a8ad508 STM32L0: Cube update V1.5.0 to v1.7.0 
Including HAL and CMSIS udpate
 2016-11-10 11:03:46 +01:00
Sam Grove 7963e8e7c1 Merge pull request #3160 from peter-harliman/wrong_index_lpc43xx_tx_end_ring 
Fix wrong index at LPC43xx tx end ring assignment
 2016-11-09 15:22:14 -06:00
Brian Daniels f6e79cb111 Fixing invalid comment notation in assembly file 2016-11-09 12:09:09 -06:00
Brian Daniels 52dc7c5423 Renames all prebuilt binaries to be prefixed with 'lib' 
This fixes an issue with make_iar, since IAR requires all libraries that
are linked to be prefixed with 'lib'.
 2016-11-09 11:08:01 -06:00
Laurent MEUNIER b491165eac [STM32F4] Add few prints for I2C debug 2016-11-09 18:03:04 +01:00
Laurent MEUNIER a65bacc032 [STM32F4] Master receive sequential - fix for HAL I2C 
in case of 2 consecutives calls to HAL_I2C_Master_Sequential_Receive_IT
with the Xfer mode I2C_FIRST_AND_LAST_FRAME, the second trasnfer does
not start at all.

It seems this is because the previous state is maintained as I2C_STATE_MASTER_BUSY_RX
and therefore the START condition will not be generated
 2016-11-09 18:03:02 +01:00
Laurent MEUNIER a50dc77c60 STM32: I2C: Change the master sync implementation to use ITs 
With this new implementation, as in slave implementaiton, we use the
interrupts instead of accessing to registers continuously.

This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
 2016-11-09 18:02:59 +01:00
Laurent MEUNIER ec95aa5701 STM32: I2C: Reset I2C in case of errors to recover 
This is to avoid an IP / bus deadlock.

This requires to store scl and sda in order to call the init function.
 2016-11-09 18:02:57 +01:00
Laurent MEUNIER 42d89b0665 STM32: I2C: Update Timeout computation 
The timeout values are based on for loops and therefore should depend
on the core frequency and the I2C interface frequency.

This patch introduces this computation and base the timeout on the time
it should take to send a byte over the I2C interface. When sending a
number of bytes, this value can also be used.

In the loops, the timeout should also be decreased before the while
condition so that its value is 0 in case the timeout elapsed and this
can be treated as an error.
 2016-11-09 18:02:54 +01:00
Michel Jaouen 06ebe4fab4 TARGET_STM32F4: USB with STM HAL for 
NUCLEO_F401RE, NUCLEO_F429ZI, NUCLEO_F446ZE, DISCO_F407VG, NUCLEO_F411RE
 2016-11-09 17:24:23 +01:00
Laurent MEUNIER 79504a6a38 STM32: I2C: Change the slave API implementation to use ITs 
With this new implementation, the slave use the Interrupt
to be notified of a request from master, instead of
accessing to registers continuously.

This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
 2016-11-09 17:22:28 +01:00
Laurent MEUNIER d71537bb00 STM32: I2C: use irq helper function 2016-11-09 17:22:28 +01:00
Laurent MEUNIER c2060e34a3 STM32: I2C: Add-up irq handlers 
With this commit we define I2C irq handlers that can be used by the driver
in sync mode. This also provides a mecanism for enabling and/or disabling
these handlers

Those handlers will be superseded by MBED ones in case of async mode usage.
 2016-11-09 17:22:28 +01:00
Laurent MEUNIER 490437ae29 STM32: I2C: Move up get_i2c_obj 
so that it can be used as well in sync mode
 2016-11-09 17:22:28 +01:00
Laurent MEUNIER 0bee69023c STM32: I2C: Don't use global init variables 
No need to store the init status of each IP.
Init can be called again in case we try to recover.
 2016-11-09 17:22:28 +01:00
Laurent MEUNIER 2b53dfc453 STM32: I2C: configure slave address with HAL API 
Instead of direct registers access, let's use HAL API.
This makes the code more generic accross STM32 families.
 2016-11-09 17:22:28 +01:00
javierpedrido b7882d6e9b Added back USART 6 pins 2016-11-09 12:14:35 -03:00
Radhika d637f6d3ad Modified user trim default values. 2016-11-09 17:12:35 +05:30
Michel Jaouen 182c311fbd TARGET_STM : USB FS STM HAL changes 2016-11-09 12:08:45 +01:00
Michel Jaouen 9c4e7173a5 DISCO_L476VG : align memory mapping with ARM 2016-11-09 12:08:41 +01:00
Michel Jaouen c2032c0442 DISCO_L476VG: modify clock for USB support 2016-11-09 12:08:36 +01:00
Andrew Domaszek 8482aafa2a Calculate PWM clock relative to bus clock 2016-11-08 23:42:59 -05:00
Bradley Scott 6d3f03c73d STM32F3: DISCO_F303VC - Add missing ADC pin muxing options 
Corrects the incorrect PA_5 ADC channel mapping, and removes the
non-existent PB_11 ADC channel mapping.
 2016-11-08 17:07:15 -05:00
Bradley Scott 130fddc467 STM32F3: DISCO_F303VC - Add missing UART pin muxing options 2016-11-08 17:04:21 -05:00
Steven Cooreman b6ff439aed [EFR32] Make RTX using ARMCC aware of reserved stack and heap 2016-11-08 18:32:50 +01:00
Steven Cooreman dc71c664db [EFR32] Fix linker script for ARMCC 
Updated available RAM size and increased reserved heap to 4K
 2016-11-08 18:32:09 +01:00
Steven Cooreman 0f1101eec2 [EFR32] Prevent compiling Nanostack driver without Nanostack 2016-11-08 15:42:00 +01:00
Radhika 63f5c9781d Configuration of user trim moved to targets.json 2016-11-08 17:29:32 +05:30
Martin Kojtal 96e1d5bd73 Merge pull request #3221 from andreaslarssonublox/ublox_odin_w2_drivers_update 
u-blox odin w2 drivers update
 2016-11-08 10:24:53 +00:00
Steven Cooreman 0f20cd11a9 [EFR32] fix typo in targets.json 2016-11-08 10:49:02 +01:00
andreas.larsson 31a7cd017e Tab -> spaces 2016-11-07 21:59:27 +01:00
andreas.larsson baf519f4c5 Updated ublox ODIN-W2 binaries 2016-11-07 19:11:39 +01:00
Sam Grove e011341f04 Merge pull request #3176 from RidaJichi/master 
Modifying micro:bit pin names to mirror micro:bit edge connector
 2016-11-07 10:25:53 -06:00
Sam Grove 89da16e4f0 Merge pull request #3127 from TomoYamanaka/master 
Fixed the issue about push/pop of VFP register.
 2016-11-07 10:25:34 -06:00
Andreas Larsson fde39602b9 Fixed dynamic message queue for scan results 2016-11-07 15:52:59 +01:00
Andreas Larsson a4f09b5fdb Added cbMAIN_dispatchEventQueue 2016-11-07 15:52:58 +01:00
andreas.larsson 32dfe73b09 Added missing checks for wifi_link_out when allocating packets 2016-11-07 15:52:57 +01:00
andreas.larsson fd7c9cc13a Added copying of the wifi_link_out buffer since the buffer might change after call chain has ended. 2016-11-07 15:52:56 +01:00
Martin Kojtal 7eaf32baa0 Merge pull request #3075 from geky/nsapi-error-size-types-2 
nsapi - Add standardized return types for size and errors
 2016-11-07 11:13:40 +00:00
jeromecoutant 5271f89c82 Add I2C_ASYNCH capability for DISCO_F469NI 2016-11-07 11:45:46 +01:00
ccli8 4ae76be2ce [NUC472/M453] Reduce (interrupt) stack size from 4 KB to 2 KB 2016-11-07 12:28:20 +08:00
ccli8 c557842d68 [NUC472] Reduce (interrupt) stack size from 12 KB to 4 KB 2016-11-07 10:59:42 +08:00
ccli8 2922de8dff [NUC472/M453] Remove dead code in device.h 2016-11-07 10:59:42 +08:00
ccli8 e09d9a15f5 [NUC472/M453] Support UART H/W module shared by multiple serial S/W objects 
1. With GCC_ARM and uARM, some greentea tests fail due to no support for this.
2. Bind UART H/W module to correct serial S/W object for interrupt.
 2016-11-07 10:59:42 +08:00
Niklas Hauser 1c2a7d8842 Added the commit: Access MCG and SIM through secure access 
This is needed for uvisor

Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-04 14:59:12 -05:00
jeromecoutant 36740a1fdf NUCLEO_F410RB: Add I2C_ASYNCH capability 
It has disappeeared with https://github.com/ARMmbed/mbed-os/pull/2765
 2016-11-04 14:08:42 +01:00
Sam Grove 9105f6fbda Merge pull request #3186 from MultiTechSystems/mdot-spi-pins 
MultiTech mDot - add back SPI3 pins
 2016-11-03 18:47:50 -05:00
Sam Grove 0ace7955b0 Merge pull request #3104 from OpenNuvoton/nuvoton 
[NuMaker] Support CAN and fix PWM CLK error
 2016-11-03 18:46:58 -05:00
Mahadevan Mahesh 931da516a9 K64F: Update to the latest SDK drivers 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-11-03 07:07:49 -05:00
Sam Grove d6df34619e Merge pull request #3184 from jankii01/K64F-trng-ret 
#3183 Compiler warning in trng_api.c with K64F
 2016-11-03 02:23:00 -05:00
Sam Grove 1f783f69fa Merge pull request #3177 from ashok-rao/new_mcu_K22512_fixing_PR_3136 
New mcu k22512 fixing pr 3136
 2016-11-03 02:21:31 -05:00
Sam Grove ee992b0a7a Merge pull request #3151 from NXPmicro/Add_K82_Support 
Add support for FRDM-K82F
 2016-11-03 02:16:08 -05:00
Sam Grove 6712ed1b71 Merge pull request #3099 from maximmbed/max32625 
MAX32625
 2016-11-03 02:15:43 -05:00
Sam Grove 6d250a98c3 Merge pull request #2969 from nvlsianpu/nrf52_fix_app_priorities 
[nRF52] - switch irq priorities of driver handlers to the lowest level
 2016-11-03 02:11:58 -05:00
Christopher Haster b045c8ba00 nsapi - Adopted standardized return types in the Odin wifi interface 2016-11-02 15:37:34 -05:00
Mike Fiore 6cddb4df8b [MTS_MDOT_F411RE] add back SPI3 pins that shouldn't have been removed 2016-11-02 13:41:04 -05:00
Jeremy Brodt 213a0891dd [MAX32625] Removed progen from target configuration. 2016-11-02 09:58:17 -05:00
Martin Kojtal 06fc7e476a Merge pull request #3173 from sarahmarshy/microbit-support 
[Exporters] Add a device_name to microbit entry in targets.json
 2016-11-02 09:56:00 +00:00
Janne Kiiskilä 258bcab618 Remove the variable ret due to compiler warning: 
Compile [ 94.6%]: trng_api.c
[Warning] trng_api.c@67,9: unused variable 'ret' [-Wunused-variable]

Github issue #3183
 2016-11-02 11:29:20 +02:00
Olaf Hagendorf 49fcc3b627 NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now 
Through some minor extensions it is now possible to use all available alternate functions of a specific gpio pin. These alternatives exist up to now only as commented lines in PeripheralPins.c.
An API change is not necessary for this new functionality, only several pin definitions.

The new definitions now looks like:

    {PA_0,            ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC1_IN0
    {PA_0_ALT0,  ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC2_IN0 // choice: PA_0 with ADC_1
    {PA_0_ALT1,  ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC3_IN0 // choice: PA_0 with ADC_1

PA_0, PA_0_ALT0 or PA_0_ALT1 has to be used as pin names for the usage of the three possible ADC blocks (ADC1, ADC2, ADC3) connected to the pin (PA_0).
 2016-11-01 18:04:55 +01:00
Sam Grove 38a9c84bae Merge pull request #2988 from martinjaeger/master 
Update of can_api.c fixing #2987
 2016-11-01 10:02:37 -05:00
Jeremy Brodt 722e89784c [MAX32625] Prevent serial activity if tx/rx pin is NC. 2016-11-01 09:46:51 -05:00
Jeremy Brodt 0784f0315c [MAX32625MBED] Adding new Maxim Integrated target. 2016-11-01 09:46:51 -05:00
Jeremy Brodt 1e5466a114 [MAX32625NEXPAQ] Adding new Maxim Integrated target. 2016-11-01 09:46:51 -05:00
Ashok Rao 80be092b86 Incorporating Brian Daniel's review comments for PR 3136 2016-11-01 11:47:22 +00:00
Rida Jichi ac17fb7cf8 Modified micro:bit pin names to mirror micro:bit edge connector 
Resolved issue: https://github.com/ARMmbed/mbed-os/issues/2713

Removed pins p{0..30} definitions
Defined pins P{0..20} as per micro:bit DAL's mappings:
(https://github.com/lancaster-university/microbit-dal/blob/master/inc/drivers/MicroBitPin.h)

Developers can now use the pin names as they appear on the mbed micro:bit pinout
in https://developer.mbed.org/platforms/Microbit/#pinout

Change-Id: I72b81dbe23b11d5ef215583adb211f364b4a5e91
 2016-11-01 09:20:24 +00:00
Rida Jichi 3a1af14803 Replaced p{0..30} with P0_{0..30} in the NRF51822 api's 
Change-Id: I0e080a30717ee0bcfa2db3f134acb08be851d767
 2016-11-01 09:00:34 +00:00
Rida Jichi f1bcde8f45 Ensured all NORDIC platforms define P0_{0..30} to match existing p{0..30} in PinNames.h 
Change-Id: I8d7ff6fe5ff5377f7ec8d3bc790dde0b0627f072
 2016-11-01 08:57:38 +00:00
cyliangtw a044a65996 fixed misaligned lines in can_api.c of NUC472 & M453 2016-11-01 11:44:44 +08:00
cyliangtw da8fd8b5b7 remove dead code in can_api.c of NUC472 & M453 2016-11-01 11:29:09 +08:00
Sarah Marsh b3bc7f2529 Add a device_name to microbit entry in targets.json 2016-10-31 18:01:58 -05:00
Martin Jäger eb95c14fa6 Fixing some typos 2016-10-30 16:49:49 +01:00
Steven Cooreman a0f62b1e4f [EFR32] Move the mbedTLS hardware acceleration code to EFR32 family 2016-10-28 11:11:58 -07:00
Peter Harliman Liem b3e5c97244 Fix wrong index at LPC43xx tx end ring assignment 
NUM_TX_FRAG should be used instead of NUM_RX_FRAG
 2016-10-28 22:48:37 +08:00
cyliangtw 33cfe1f599 remove dead code in device.h of NUC472 & M453 2016-10-28 18:39:56 +08:00
Radhika eaf7265aa6 User trim added. 
Astyle and pylint run on code.
 2016-10-28 15:02:52 +05:30
Martin Kojtal 4a4d09f6d1 Merge pull request #3074 from jamike/TARGET_STM_INIT_GCC_ALIGNEMENT 
Target STM - init gcc alignement
 2016-10-28 11:04:50 +02:00
Martin Kojtal 6eac2b008a Merge pull request #3009 from pradeep-gr/master 
TRNG enabled. TRNG APIs implemented. REV A/B/C/D flags removed. Warnings removed
 2016-10-28 10:13:50 +02:00
Steven Cooreman 01446f347f [EFR32] Initial radio driver 
First check-in of the EFR32 radio driver for Nanostack
 2016-10-27 23:29:31 -07:00
Steven Cooreman c0301b15d2 [EFR32] Adding hardware acceleration for mbed TLS 
Initial check-in of hardware acceleration support on EFR32 for mbed TLS (AES, SHA and ECC).
 2016-10-27 23:28:25 -07:00
Steven Cooreman 035c08dcfd [EFR32] Add initial support for EFR32 
Adding target definitions and the HAL implementation for EFR32 Mighty Gecko
 2016-10-27 23:26:27 -07:00
Steven Cooreman 214d1be2a9 [EFM32] Move board controller pin setting to config system 2016-10-27 23:22:11 -07:00
Steven Cooreman 5a885137f0 [EFM32] Move board controller pin setting to config system 2016-10-27 23:21:39 -07:00