mirror of https://github.com/ARMmbed/mbed-os.git
Register map changes for RevG
parent
aeabcc9472
commit
08ae38b3a0
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@ -65,23 +65,24 @@ typedef struct {
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__I uint32_t CBCo1; /**< Bits[63:32] of the 128-bit CBC result */
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__I uint32_t CBCo2; /**< Bits[95:64] of the 128-bit CBC result */
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__I uint32_t CBCo3; /**< Bits[127:96] of the 128-bit CBC result */
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union {
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struct {
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__O uint32_t START:1; /**< start the encryption : 0 = no-effect , 1 = enable */
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__O uint32_t ACC_CLR:1; /**< Clear the CBC accumulator : 0 = no-effect 1 = clears the CBC accumulator */
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__O uint32_t INT_CLEAR:1; /**< interrupt clear : 0 = no-effect 1 = clear the interrupt */
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__O uint32_t KEY_LENGTH:1; /**< Key Length: 0 = 128 Bit Encryption 1 = 256 Bit Encryption */
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} BITS;
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__O uint32_t WORD;
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} CTL;
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union {
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struct {
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__IO uint32_t CBC_MODE:1; /**< counter mode : 0 = counter mode , 1 = CBC mode */
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__IO uint32_t BYPASS:1; /**< encryption : 0 = Normal Mode , 1 = Bypasss any encryption */
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__IO uint32_t INT_EN:1; /**< interrupt mask : 0 = disabled 1 = enabled */
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} BITS;
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__IO uint32_t WORD;
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} MODE;
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union {
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struct {
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__IO uint32_t START:1; /**< start the encryption : 0 = no-effect , 1 = enable */
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__IO uint32_t ACC_CLR:1; /**< Clear the CBC accumulator : 0 = no-effect 1 = clears the CBC accumulator */
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__IO uint32_t INT_CLEAR:1; /**< interrupt clear : 0 = no-effect 1 = clear the interrupt */
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} BITS;
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__IO uint32_t WORD;
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} CTL;
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union {
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struct {
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__IO uint32_t CBC_MODE:1; /**< counter mode : 0 = counter mode , 1 = CBC mode */
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__IO uint32_t BYPASS:1; /**< encryption : 0 = Normal Mode , 1 = Bypasss any encryption */
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__IO uint32_t INT_EN:1; /**< interrupt mask : 0 = disabled 1 = enabled */
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__IO uint32_t KEY_LENGTH:1; /**< Key Length: 0 = 128 Bit Encryption 1 = 256 Bit Encryption */
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} BITS;
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__IO uint32_t WORD;
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} MODE;
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union {
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struct {
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__I uint32_t COMPLETE:1;/**< status : 0 = not complete , 1 = complete */
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@ -64,7 +64,8 @@ void analogin_init(analogin_t *obj, PinName pin)
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obj->adcReg = (AdcReg_pt)adc;
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obj->pin = pin;
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obj->pinFlag = 1;
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obj->ADC_Offset_Value = TRIMREG->ADC_OFFSET_TRIM;
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switch (pin) {
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case A0:
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adc_pin=0;
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@ -183,7 +184,14 @@ uint16_t analogin_read_u16(analogin_t *obj)
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while((uint32_t)(obj->adcReg->STATUS)!=(uint32_t)1) {
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}
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adcData =(uint16_t)(obj->adcReg->DATA);
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CLOCK_DISABLE(CLOCK_ADC);
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/* Offset the ADC data with trim value */
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if (obj->ADC_Offset_Value != 0xFFFFFFFF) {
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if(adcData >= obj->ADC_Offset_Value) {
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adcData -= obj->ADC_Offset_Value;
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}
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}
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return(adcData);
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}
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@ -37,7 +37,7 @@
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#include "ncs36510Init.h"
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void fPmuInit(void);
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uint32_t ADC_Trim_Offset;
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/**
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* @brief
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* Hardware trimming function
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@ -94,8 +94,6 @@ boolean fTrim()
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RFANATRIMREG->TX_VCO_TRIM_LUT1 = TRIMREG->TX_VCO_LUT1.WORD;;
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RFANATRIMREG->TX_VCO_TRIM_LUT2 = TRIMREG->TX_VCO_LUT2.WORD;;
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ADC_Trim_Offset = TRIMREG->ADC_OFFSET_TRIM;
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status = True;
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} else {
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@ -111,6 +111,7 @@ struct analogin_s {
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AdcReg_pt adcReg;
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PinName pin;
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uint8_t pinFlag;
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uint32_t ADC_Offset_Value;
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};
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struct pwmout_s {
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@ -45,24 +45,21 @@
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/** Power management Control HW Structure Overlay */
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typedef struct {
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__IO uint32_t DUTYCYCLE;
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union {
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struct {
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__O uint32_t ENABLE :8; /**< Write any value to enable PWM output */
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__I uint32_t PAD :1; /** < Pad */
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__I uint32_t ENABLE_STATE :1; /**< Current state of pwmEnable configuration bit. ‘1’ PWM output is enabled. ‘0’ PWN output is disabled. */
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__I uint32_t OUTPUT_STATE :1; /**< Current state of PWM output */
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} BITS;
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__IO uint32_t WORD;
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} PWM_ENABLE;
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__O uint32_t DUTYCYCLE;
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__O uint32_t PWM_ENABLE;
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__O uint32_t PWM_DISABLE;
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union {
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struct {
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__O uint32_t ENABLE :8; /**< Write any value to select enable the 4-bit prescaler */
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__I uint32_t STATE:1; /**< Current state of the prescaler. ‘1’ the prescaler is enabled. ‘0’ the prescaler is disabled. */
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} BITS;
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__IO uint32_t WORD;
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} PRESCALE_ENABLE;
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__O uint32_t PRESCALE_ENABLE;
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__O uint32_t PRESCALE_DISABLE;
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union
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{
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struct
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{
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__I uint32_t CUR_DUTY_CYCLE_VALUE : 8; /** Curent value of duty Cycle */
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__I uint32_t CUR_PRE_SCALER_STATE : 1; /** Current state of the prescaler. ‘1’ the prescaler is enabled. ‘0’ the prescaler is disabled. */
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__I uint32_t CUR_PWM_ENABLE_STATE : 1; /** Current state of the PWM. ‘1’ the PWM is enabled. ‘0’ the PWM is disabled. */
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__I uint32_t CUR_PWM_OUTPUT_STATE : 1; /** Current state of PWM output */
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}BITS;
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__I uint32_t WORD;
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}READ_CONFIG_STATUS;
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} PwmReg_t, *PwmReg_pt;
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#endif /* PWM_MAP_H_ */
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@ -61,7 +61,7 @@ void pwmout_init(pwmout_t *obj, PinName pin)
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obj->pwmReg->DUTYCYCLE = 0x80;
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/* Write the PWM output enable register 0x4000B004, to 1 */
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obj->pwmReg->PWM_ENABLE.WORD = 0x1;
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obj->pwmReg->PWM_ENABLE = 0x1;
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obj->pwmReg->PRESCALE_DISABLE = 0x1;
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@ -190,7 +190,7 @@ void pwmout_pulsewidth_us(pwmout_t *obj, int us)
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}
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/* If pulsewidth is less than 128uSec, set the prescaler to 4096
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* by enabling prescale register 0x4000B00C to 1 */
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obj->pwmReg->PRESCALE_ENABLE.WORD = 0x1;
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obj->pwmReg->PRESCALE_ENABLE = 0x1;
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/* Calculate the duty cycle based on the width of the pulse */
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/* ((255 * us) / 128) + 1 = duty cycle */
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