By default, FLASH_SIZE should be read from HW.
In case this is not the case, we define it here, as the size of FLASH
that is available to the application running on M4.
the flash is shared and split between cortex-M4 that
runs (mbed-os) application and the cortex-M0+ that
runs the BLE firmware.
The 512K allocated to the application was a
conservative that can now be updated.
With recent up-to-date BLE firmware flashed @ 0x080CB000,
there should be 812K available to application.
But there are boards out there that don't have an up-to-date
firmware, so we're keeping an intermediate, safer,
application size of 768K.
Reimplement atomic code in inline assembly. This can improve
optimisation, and avoids potential architectural problems with using
LDREX/STREX intrinsics.
API further extended:
* Bitwise operations (fetch_and/fetch_or/fetch_xor)
* fetch_add and fetch_sub (like incr/decr, but returning old value -
aligning with C++11)
* compare_exchange_weak
* Explicit memory order specification
* Basic freestanding template overloads for C++
This gives our existing C implementation essentially all the functionality
needed by C++11.
An actual Atomic<T> template based upon these C functions could follow.
To have the flexibilty in application; to use any of the section
(data/bss/heap) without updating linker script in every use case,
following decisions are made:
1. Fixed size and small sections moved to SRAM2 (32K)
Vectors
Crash data
Remaining section - RW / ZI
2. Large memory space should be used for variable sections
RW/ZI
Heap - (Minimum - 0x12000)
Stack - At bottom
Please note the heap address of the both the banks must not be contigious else
GCC considers it to be single memory bank and does allocation across the banks,
which might result into hard-fault
To have the flexibilty in application; to use any of the section
(data/bss/heap) without updating linker script in every use case,
following decisions are made:
1. Fixed size and small sections moved to SRAM2 (32K)
Vectors
Crash data
Stack
Remaining section - Heap memory
2. Large memory space should be used for variable sections
Data
BSS
Heap - Remaining section
Heap is moved to the end of both sections as GCC allocates till 4K boundary,
if end of heap is not aligned to 4K, that chunk of memory will go unutilized
Internal channels use is enabling ADC "internal path" which needs
to be disabled after measurement.
Same applied here for WB family as was done for others in #10143.
Typically the RTC clock is configured by RTC driver itself.
RNG on the other hand is shared with M0+ core and it is expected that
M4 turns it on at boot time.
When doing so, do not disbale GPIO clocks as they may be used by other
drivers !
As a result, debug will be disabled by default, but can be enabled by
either modifying code or selecting MBED debug profile.
Review HSE clock initialization to match with latest CUBE firmware.
Also there is no need to set the full clock tree again after deep sleep exit.
With this change we get a stable deep sleep mode (when allowed by CORDIO stack).
There is no need to add FIRST attribute to MAPPING_TABLE as the default
ordering is alphabetical order.
With this change, we don't have any warning with MBED2 and the sections
are properly ordered anyway in BLE cases.
In case of mbed2, BLE feature is not built.
As there is a MAPPING_TABLE in BLE feature which is not compiled in case
of mbed2, the linker reported the below error
[ERROR] "C:/Data/Workspace/mbed/BUILD/test/NUCLEO_WB55RG/ARM/MBED_2/
.link_script.sct", line 65 (column 6): Error: L6236E:
No section matches selector - no section to be FIRST/LAST.
Solution is to check whether BLE is enabled.
These files are not BLE specific, but also needed for some clock setting
for instance.
In order to compile an MBED2 application, we need to move the files.
- move hw_conf.h file to targets/TARGET_STM/TARGET_STM32WB directory as
this is used also out of BLE feature.
- create a dedicated hal_deepsleep function as the behavior in WB is a lot
different from other existing STM32 targets
- update clock tree configuration to directly clock the entire tree @ 32MHz
out of HSE. This is needed as we want to let the M0 core running without
any change on M0-side of clocks when M4 enters /exits deep sleep.
The cache must be refreshed when we erase or program flash memory.
It fix 2 issues :
Fix#9934Fix#6380
This solution was initially proposed in #6380.
Signed-off-by: Vincent Veron <vincent.veron@st.com>
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
When activating an endpoint assign new data rather than ORing
data to it. This ensures that values set from the previous use
do not effect the current configuration.
Update the patch "Create HAL_PCD_EP_Abort" to fix bugs.
This patch adds the low level functions USB_EPStopXfer, USB_EPSetNak,
USB_EPClearNak and the high level function HAL_PCD_EP_Abort so that
transfers can be stopped.
The functions USB_EPSetNak and USB_EPClearNak allow nak to be enabled
or disabled for an endpoint, preventing or allowing further transfers.
The function USB_EPStopXfer stops pending reads and writes started by
USB_EPStartXfer along with clearing and masking any interrupts enabled
by USB_EPStartXfer.
The function HAL_PCD_EP_Abort aborts any transfers on the given
endpoint. When this function completes the transfer interrupt
is guarenteed not to fire for this endpoint. Furthermore, the size
of data transferred during an aborted read can be found by calling
the function HAL_PCD_EP_GetRxCount.
Other notes on this Change:
1.
Prior to this patch the interrupt USB_OTG_DOEPINT_EPDISD was not
handled. When an OUT endpoint was disabled this interrupt occurred
causing the CPU to get stuck repeatedly handling this interrupt. This
is because this interrupt was unmasked but nothing cleared this
interrupt. This patch also adds code to handle and clear this
interrupt to prevent a lockup.
2.
Stopping a transfer on an OUT endpoint requires global nak OUT to
be in effect. Even with this being done, having entries in the rx fifo
prevented an OUT endpoint from being disabled. This behavior is not
mentioned in the Reference Manual.
Reverting this feature till IAR 8.x is stable and supported in Mbed OS
for few releases
1. Revert "Add Dynamic heap support to IAR"
This reverts commit 8ee29bbfa2.
2. Revert "Splited RAM section not compatible with dynamic HEAP."
This reverts commit a645bb2a6b.
3. Revert "Add Dynamic heap support to IAR"
This reverts commit 891e1f261b.
Two new block properties available in linker configuration files:
"expanding size" and "minimum size" for IAR 8.11.2 and above
Sample:
define block HEAP with expanding size, minimum size = 16K, alignment = 8 {};
This block will expand to consume all remaining available space in
the range where it is placed. If several such blocks end up in the same
range, they will share the remaining space.
Cannot place a block with expanding size inside another block with
expanding size, inside a block with maximum size, or inside an overlay.
Two new block properties available in linker configuration files:
"expanding size" and "minimum size" for IAR 8.11.2 and above
Sample:
define block HEAP with expanding size, minimum size = 16K, alignment = 8 {};
This block will expand to consume all remaining available space in
the range where it is placed. If several such blocks end up in the same
range, they will share the remaining space.
Cannot place a block with expanding size inside another block with
expanding size, inside a block with maximum size, or inside an overlay.
Martin Kojtal
Malavika Sajikumar
Anna Bridge
jeromecoutant
Laurent Meunier
aqin
M. Rahimi
Guillermo Alonso
mudassar-ublox
Lin Gao
Kevin Bracey
Juho Eskeli
Deepika
Marcus Chang
Vincent Veron
Cruz Monrreal
Ashok Rao
bcostm
jk
ecoromka
Jan Jongboom
Sarah Marsh
Michael Coulter
Wajahat Abbas
Jarno Lamsa
Russ Butler
Russ Butler
Michel Jaouen