mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #9766 from deepikabhavnani/uarm_fixes
Update Toolchain Arm Micro scatter filespull/9965/head
Martin Kojtal
GitHub
commit
f559d03ae2
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@ -907,13 +907,14 @@ extern "C" long PREFIX(_flen)(FILEHANDLE fh)
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// Do not compile this code for TFM secure target
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#if !defined(COMPONENT_SPE) || !defined(TARGET_TFM)
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#if !defined(__MICROLIB)
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#if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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__asm(".global __use_two_region_memory\n\t");
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__asm(".global __use_no_semihosting\n\t");
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#else
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#pragma import(__use_two_region_memory)
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#endif
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#endif
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#if !defined(HEAP_START)
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// Heap here is considered starting after ZI ends to Stack start
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@ -938,12 +939,14 @@ extern "C" MBED_WEAK __value_in_regs struct __initial_stackheap _mbed_user_setup
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return r;
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}
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#if !defined(__MICROLIB)
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extern "C" __value_in_regs struct __argc_argv $Super$$__rt_lib_init(unsigned heapbase, unsigned heaptop);
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extern "C" __value_in_regs struct __argc_argv $Sub$$__rt_lib_init(unsigned heapbase, unsigned heaptop)
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{
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return $Super$$__rt_lib_init((unsigned)HEAP_START, (unsigned)HEAP_LIMIT);
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}
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#endif
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extern "C" __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3)
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{
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@ -16,18 +16,16 @@
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*/
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#include <stdlib.h>
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#include <string.h>
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#include <stdint.h>
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#include "mbed_boot.h"
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#include "mbed_assert.h"
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/* Symbols that are typically defined in startup_<mcu>.S */
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extern uint32_t __initial_sp[];
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extern uint32_t __heap_base[];
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extern uint32_t __heap_limit[];
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[];
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extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[];
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#if !defined(ISR_STACK_SIZE)
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#define ISR_STACK_SIZE ((uint32_t)1024)
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#endif
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[];
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extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[];
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/*
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* mbed entry point for the MICROLIB toolchain
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@ -41,12 +39,11 @@ void _main_init(void) __attribute__((section(".ARM.Collect$$$$000000FF")));
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void _main_init(void)
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{
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/* microlib only supports the two region memory model */
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mbed_stack_isr_start = (unsigned char *) Image$$ARM_LIB_STACK$$ZI$$Base;
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mbed_stack_isr_size = (uint32_t) Image$$ARM_LIB_STACK$$ZI$$Length;
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mbed_heap_start = (unsigned char *)__heap_base;
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mbed_heap_size = (uint32_t)__heap_base - (uint32_t)__heap_limit;
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mbed_stack_isr_start = (unsigned char *)((uint32_t)__initial_sp - ISR_STACK_SIZE);
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mbed_stack_isr_size = ISR_STACK_SIZE;
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mbed_heap_start = (unsigned char *) Image$$ARM_LIB_HEAP$$ZI$$Base;
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mbed_heap_size = (uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length;
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mbed_init();
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mbed_rtos_start();
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@ -1,19 +1,50 @@
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#! armcc -E
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;SAMD21G18A
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;256KB FLASH (0x40000) @ 0x000000000
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;2KB RAM (0x8000) @ 0x20000000
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; 256KB FLASH (0x40000) @ 0x000000000
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x00000000
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#endif
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; SAMD21G18A: 256KB FLASH (0x40000)
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x40000
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#endif
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; 32KB RAM (0x8000) @ 0x20000000
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x8000
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#endif
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;SAMD21G18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
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LR_IROM1 0x00000000 0x40000 { ; load region size_region
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ER_IROM1 0x00000000 0x40000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment
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RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data
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.ANY (+RW +ZI)
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}
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; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment
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#define VECTOR_SIZE 0xB8
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}
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -1,19 +1,50 @@
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#! armcc -E
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;SAMD21J18A
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;256KB FLASH (0x40000) @ 0x000000000
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;2KB RAM (0x8000) @ 0x20000000
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; 256KB FLASH (0x40000) @ 0x000000000
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x00000000
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#endif
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; SAMD21J18A: 256KB FLASH (0x40000)
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x40000
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#endif
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; 32KB RAM (0x8000) @ 0x20000000
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x8000
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#endif
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;SAMD21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
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LR_IROM1 0x00000000 0x40000 { ; load region size_region
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ER_IROM1 0x00000000 0x40000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment
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RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data
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.ANY (+RW +ZI)
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}
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; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment
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#define VECTOR_SIZE 0xB8
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}
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -1,29 +1,50 @@
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;
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SAML21J18A
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;
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256KB FLASH (0x40000) @ 0x000000000
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;
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2KB RAM (0x8000) @ 0x20000000
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#! armcc -E
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;SAMD21J18A
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; 256KB FLASH (0x40000) @ 0x000000000
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x00000000
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#endif
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; SAMD21J18A: 256KB FLASH (0x40000)
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x40000
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#endif
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; 32KB RAM (0x8000) @ 0x20000000
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x8000
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#endif
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;
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SAML21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
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LR_IROM1 0x00000000 0x40000 { ;
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load region size_region
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ER_IROM1 0x00000000 0x40000 { ;
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load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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;
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[RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment
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RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8)
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{
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;
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RW data
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.ANY (+RW +ZI)
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}
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; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment
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#define VECTOR_SIZE 0xB8
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}
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -1,19 +1,50 @@
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#! armcc -E
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;SAMR21G18A
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;256KB FLASH (0x40000) @ 0x000000000
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;2KB RAM (0x8000) @ 0x20000000
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; 256KB FLASH (0x40000) @ 0x000000000
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x00000000
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#endif
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; SAMR21G18A: 256KB FLASH (0x40000)
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x40000
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#endif
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; 32KB RAM (0x8000) @ 0x20000000
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x20000000
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x8000
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#endif
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;SAMR21G18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
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LR_IROM1 0x00000000 0x40000 { ; load region size_region
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ER_IROM1 0x00000000 0x40000 { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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; [RAM] Vector table dynamic copy: 44 vectors * 4 bytes = (0xB0) - alignment
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RW_IRAM1 (0x20000000+0xB0) (0x8000-0xB0) { ; RW data
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.ANY (+RW +ZI)
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}
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; [RAM] Vector table dynamic copy: 44 vectors * 4 bytes = (0xB0) - alignment
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#define VECTOR_SIZE 0xB0
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}
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
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.ANY (+RO)
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}
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -1,12 +1,46 @@
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LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
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ER_IROM1 0x00000000 0x8000 { ; load address = execution address
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#! armcc -E
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#if !defined(MBED_APP_START)
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#define MBED_APP_START 0x00000000
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#endif
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#if !defined(MBED_APP_SIZE)
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#define MBED_APP_SIZE 0x8000
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#endif
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#if !defined(MBED_RAM_START)
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#define MBED_RAM_START 0x1FFFF000
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#endif
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#if !defined(MBED_RAM_SIZE)
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#define MBED_RAM_SIZE 0x1000
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#endif
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
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#define VECTOR_SIZE 0xC0
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#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
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LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
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|
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*.o (RESET, +First)
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*(InRoot$$Sections)
|
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.ANY (+RO)
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||||
}
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||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
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; 0x1000 - 0xC0 = 0xF40
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RW_IRAM1 0x1FFFFCC0 0xF40 {
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RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
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.ANY (+RW +ZI)
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}
|
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
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}
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}
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@ -11,25 +11,9 @@
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; *
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; *****************************************************************************/
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Stack_Size EQU 0x00000400
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AREA STACK, NOINIT, READWRITE, ALIGN=3
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EXPORT __initial_sp
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Stack_Mem SPACE Stack_Size
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__initial_sp EQU 0x20000C00 ; Top of RAM
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Heap_Size EQU 0x00000000
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AREA HEAP, NOINIT, READWRITE, ALIGN=3
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EXPORT __heap_base
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EXPORT __heap_limit
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__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
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__heap_limit
|
||||
|
||||
PRESERVE8
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THUMB
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||||
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||||
|
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|
|||
|
|
@ -1,14 +1,46 @@
|
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#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
|
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#if !defined(MBED_APP_START)
|
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#define MBED_APP_START 0x00000000
|
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#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 1FFFF000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 0x4000 - 0xC0 = 0x3F40
|
||||
RW_IRAM1 0x1FFFF0C0 0x3F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -12,29 +12,9 @@
|
|||
; *****************************************************************************/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20003000 ; Top of RAM
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,14 +1,46 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 1FFFF000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 0x4000 - 0xC0 = 0x3F40
|
||||
RW_IRAM1 0x1FFFF0C0 0x3F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,24 +4,46 @@
|
|||
; *****
|
||||
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#define MBED_APP_SIZE 0x00020000
|
||||
#endif
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00008000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
|
||||
#define VECTOR_SIZE 0x150
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
|
||||
RW_IRAM1 (0x20000000+0x150) (0x8000-0x150) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,31 +35,9 @@
|
|||
;OF SUCH DAMAGE.
|
||||
;*/
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20008000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -4,24 +4,46 @@
|
|||
; *****
|
||||
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x100000
|
||||
#define MBED_APP_SIZE 0x100000
|
||||
#endif
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00018000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
|
||||
#define VECTOR_SIZE 0x150
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150)
|
||||
RW_IRAM1 (0x20000000+0x150) (0x18000-0x150) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -34,31 +34,9 @@
|
|||
;OF SUCH DAMAGE.
|
||||
;*/
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20010000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -4,23 +4,46 @@
|
|||
; *****
|
||||
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x200000
|
||||
#define MBED_APP_SIZE 0x00200000
|
||||
#endif
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (3*1024K)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00020000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned)
|
||||
#define VECTOR_SIZE 0x1B0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned)
|
||||
RW_IRAM1 (0x20000000+0x1B0) (0x20000-0x1B0) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -36,31 +36,10 @@
|
|||
;OF SUCH DAMAGE.
|
||||
;*/
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000800
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20020000
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
@ -432,27 +411,6 @@ IPA_IRQHandler
|
|||
|
||||
; user Initial Stack & Heap
|
||||
|
||||
IF :DEF:__MICROLIB
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
ELSE
|
||||
|
||||
IMPORT __use_two_region_memory
|
||||
EXPORT __user_initial_stackheap
|
||||
|
||||
__user_initial_stackheap PROC
|
||||
LDR R0, = Heap_Mem
|
||||
LDR R1, =(Stack_Mem + Stack_Size)
|
||||
LDR R2, = (Heap_Mem + Heap_Size)
|
||||
LDR R3, = Stack_Mem
|
||||
BX LR
|
||||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
ENDIF
|
||||
|
||||
END
|
||||
|
|
|
|||
|
|
@ -1,43 +1,53 @@
|
|||
#! armcc -E
|
||||
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x00040000
|
||||
#define MBED_APP_SIZE 0x00040000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00008000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
LR_IROM1 MBED_APP_START {
|
||||
ER_IROM1 MBED_APP_START { ; load address = execution address
|
||||
#define VECTOR_SIZE (4*(16 + 64))
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*(RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
|
||||
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
|
||||
|
||||
ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE {
|
||||
}
|
||||
|
||||
|
||||
/* VTOR[TBLOFF] alignment requires:
|
||||
*
|
||||
* 1. Minumum 32-word
|
||||
* 2. Rounding up to the next power of two of table size
|
||||
*/
|
||||
ER_IRAMVEC AlignExpr(+0, 512) EMPTY (4*(16 + 64)) { ; Reserve for vectors
|
||||
ER_IRAMVEC AlignExpr(+0, 512) EMPTY VECTOR_SIZE { ; Reserve for vectors
|
||||
}
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
}
|
||||
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 256 KB APROM
|
||||
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000) ; 32 KB SRAM
|
||||
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 32 KB SRAM
|
||||
|
||||
|
|
|
|||
|
|
@ -1,30 +1,41 @@
|
|||
#! armcc -E
|
||||
|
||||
; 512 KB APROM
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x00080000
|
||||
#define MBED_APP_SIZE 0x00080000
|
||||
#endif
|
||||
|
||||
; 160 KB SRAM
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00028000
|
||||
#endif
|
||||
|
||||
|
||||
#define SPIM_CCM_START 0x20020000
|
||||
#define SPIM_CCM_END 0x20028000
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
#define VECTOR_SIZE (4*(16 + 96))
|
||||
|
||||
#define SPIM_CCM_START 0x20020000
|
||||
#define SPIM_CCM_END 0x20028000
|
||||
|
||||
|
||||
LR_IROM1 MBED_APP_START {
|
||||
ER_IROM1 MBED_APP_START { ; load address = execution address
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*(RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
|
||||
ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE {
|
||||
}
|
||||
|
||||
/* VTOR[TBLOFF] alignment requires:
|
||||
|
|
@ -32,18 +43,18 @@ LR_IROM1 MBED_APP_START {
|
|||
* 1. Minumum 32-word
|
||||
* 2. Rounding up to the next power of two of table size
|
||||
*/
|
||||
ER_IRAMVEC AlignExpr(+0, 512) EMPTY (4*(16 + 96)) { ; Reserve for vectors
|
||||
ER_IRAMVEC AlignExpr(+0, 512) EMPTY VECTOR_SIZE { ; Reserve for vectors
|
||||
}
|
||||
|
||||
RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage
|
||||
|
||||
RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage
|
||||
}
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x28000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
}
|
||||
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM
|
||||
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20028000) ; 160 KB SRAM
|
||||
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 160 KB SRAM
|
||||
|
|
|
|||
|
|
@ -1,27 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
; 512 KB APROM
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x00020000
|
||||
#endif
|
||||
|
||||
; 16 KB SRAM (internal)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
LR_IROM1 0x00000000 {
|
||||
ER_IROM1 0x00000000 { ; load address = execution address
|
||||
; Does not support vector table relocation
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*(RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
|
||||
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
|
||||
|
||||
ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE {
|
||||
}
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x4000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
; Extern SRAM for HEAP
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
}
|
||||
ScatterAssert(LoadLimit(LR_IROM1) <= 0x00020000) ; 128 KB APROM
|
||||
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20004000) ; 16 KB SRAM
|
||||
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 128 KB APROM
|
||||
ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 16 KB SRAM (internal)
|
||||
|
||||
|
|
|
|||
|
|
@ -1,26 +1,42 @@
|
|||
#! armcc -E
|
||||
|
||||
; 512 KB APROM
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x00080000
|
||||
#define MBED_APP_SIZE 0x00080000
|
||||
#endif
|
||||
|
||||
; 64 KB SRAM (internal)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00010000
|
||||
#endif
|
||||
|
||||
|
||||
; 1 MB SRAM (external)
|
||||
#define MBED_RAM1_START 0x60000000
|
||||
#define MBED_RAM1_SIZE 0x00100000
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
LR_IROM1 MBED_APP_START {
|
||||
ER_IROM1 MBED_APP_START { ; load address = execution address
|
||||
#define VECTOR_SIZE (4*(16 + 142))
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*(RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
|
||||
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
|
||||
|
||||
ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE {
|
||||
}
|
||||
|
||||
/* VTOR[TBLOFF] alignment requires:
|
||||
|
|
@ -28,23 +44,22 @@ LR_IROM1 MBED_APP_START {
|
|||
* 1. Minumum 32-word
|
||||
* 2. Rounding up to the next power of two of table size
|
||||
*/
|
||||
ER_IRAMVEC AlignExpr(+0, 1024) EMPTY (4*(16 + 142)) { ; Reserve for vectors
|
||||
ER_IRAMVEC AlignExpr(+0, 1024) EMPTY VECTOR_SIZE { ; Reserve for vectors
|
||||
}
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
|
||||
; Too large to place into internal SRAM. So place into external SRAM instead.
|
||||
ER_XRAM1 0x60000000 {
|
||||
ER_XRAM1 MBED_RAM1_START {
|
||||
*sal-stack-lwip* (+ZI)
|
||||
}
|
||||
|
||||
; Extern SRAM for HEAP
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) {
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM1_START + MBED_RAM1_SIZE - AlignExpr(ImageLimit(ER_XRAM1), 16)) {
|
||||
}
|
||||
}
|
||||
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM
|
||||
ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)
|
||||
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000) ; 1 MB SRAM (external)
|
||||
|
||||
ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 64 KB SRAM (internal)
|
||||
ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM1_START + MBED_RAM1_SIZE)) ; 1 MB SRAM (external)
|
||||
|
|
|
|||
|
|
@ -1,26 +1,38 @@
|
|||
#! armcc -E
|
||||
|
||||
; 512 KB APROM
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x00080000
|
||||
#define MBED_APP_SIZE 0x00080000
|
||||
#endif
|
||||
|
||||
; 64 KB SRAM (internal)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00010000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
LR_IROM1 MBED_APP_START {
|
||||
ER_IROM1 MBED_APP_START { ; load address = execution address
|
||||
#define VECTOR_SIZE (4*(16 + 142))
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*(RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
|
||||
ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE {
|
||||
|
||||
ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE {
|
||||
}
|
||||
|
||||
/* VTOR[TBLOFF] alignment requires:
|
||||
|
|
@ -28,17 +40,16 @@ LR_IROM1 MBED_APP_START {
|
|||
* 1. Minumum 32-word
|
||||
* 2. Rounding up to the next power of two of table size
|
||||
*/
|
||||
ER_IRAMVEC AlignExpr(+0, 1024) EMPTY (4*(16 + 142)) { ; Reserve for vectors
|
||||
ER_IRAMVEC AlignExpr(+0, 1024) EMPTY VECTOR_SIZE { ; Reserve for vectors
|
||||
}
|
||||
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
; Extern SRAM for HEAP
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
}
|
||||
ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM
|
||||
ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal)
|
||||
|
||||
ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 64 KB SRAM (internal)
|
||||
|
|
|
|||
|
|
@ -1,13 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
|
||||
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 256k flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x40000
|
||||
#endif
|
||||
|
||||
; 32kB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00008000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100
|
||||
#define VECTOR_SIZE 0x100
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100
|
||||
; 32kB (0x8000) - 0x100 = 0x7F00
|
||||
RW_IRAM1 (0x10000000+0x100) (0x8000-0x100) {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -24,28 +24,9 @@
|
|||
|
||||
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
__initial_sp EQU 0x10008000 ; Top of RAM from LPC1U68
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
@ -238,7 +219,5 @@ USBWAKEUP_IRQHandler
|
|||
; User Initial Stack & Heap
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
END
|
||||
|
|
|
|||
|
|
@ -242,3 +242,4 @@ USBWAKEUP_IRQHandler
|
|||
EXPORT __heap_limit
|
||||
|
||||
END
|
||||
|
||||
|
|
|
|||
|
|
@ -1,17 +1,52 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x8000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 32K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 6KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00001800
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 6KB - 0xC0 = 0x1740
|
||||
RW_IRAM1 0x100000C0 0x1740 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,9 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10001800 ; Top of RAM from LPC11U
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,17 +1,52 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x8000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 32K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 8KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00002000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x100000C0 0x1F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,9 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,17 +1,52 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0xC000 { ; load region size_region (48k)
|
||||
ER_IROM1 0x00000000 0xC000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 48K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0xC000
|
||||
#endif
|
||||
|
||||
; 8KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00002000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x100000C0 0x1F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,9 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,17 +1,52 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x10000 { ; load region size_region (64k)
|
||||
ER_IROM1 0x00000000 0x10000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 64K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
; 8KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00002000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x100000C0 0x1F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,9 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,20 +1,56 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K)
|
||||
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 128K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
; 8KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00002000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x100000C0 0x1F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM
|
||||
.ANY (IOHANDLER_RAM)
|
||||
}
|
||||
|
||||
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,9 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U3x
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,20 +1,56 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K)
|
||||
ER_IROM1 0x00000000 0x20000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 128K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
; 8KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00002000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x100000C0 0x1F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM
|
||||
.ANY (IOHANDLER_RAM)
|
||||
}
|
||||
|
||||
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,10 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U3x
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,20 +1,56 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x10000 { ; load region size_region (64k)
|
||||
ER_IROM1 0x00000000 0x10000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 128K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
; 8KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00002000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x100000C0 0x1F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM
|
||||
.ANY (IOHANDLER_RAM)
|
||||
}
|
||||
|
||||
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,9 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10002000 ; Top of RAM from LPC11U3x
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,17 +1,52 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x8000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 128K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 8KB (0x2000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00001800
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 6KB - 0xC0 = 0x1740
|
||||
RW_IRAM1 0x100000C0 0x1740 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,10 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10001800 ; Top of RAM from LPC11U
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,16 +1,52 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x00000000 0x8000 { ; load address = execution address
|
||||
; 128K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 8KB (0x2000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x2000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 48 vectors * 4 bytes = 0xC0 for remap
|
||||
RW_IRAM1 (0x10000000+0xC0) (0x2000-0xC0) {
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (USBRAM)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,9 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10002000 ; Top of RAM from LPC1114
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,16 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x00000000 0x8000 { ; load address = execution address
|
||||
; 32K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 4KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00001000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 48 vectors * 4 bytes = 0xC0 for remap
|
||||
RW_IRAM1 (0x10000000+0xC0) (0x1000-0xC0) {
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,9 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10001000 ; Top of RAM from LPC1114
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,19 +1,56 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x10000 { ; load region size_region
|
||||
ER_IROM1 0x00000000 0x10000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 128K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
; 8KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00002000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x100000C0 0x1F40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
RW_IRAM2 0x20000000 0x800 { ; RW data
|
||||
|
||||
RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM
|
||||
.ANY (AHBSRAM0)
|
||||
}
|
||||
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
|
||||
|
||||
RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM
|
||||
.ANY (AHBSRAM1)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,25 +18,10 @@
|
|||
; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
|
||||
; *
|
||||
; *****************************************************************************/
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10002000 ; Top of RAM from LPC1347
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,13 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
|
||||
ER_IROM1 0x00000000 0x40000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 256k flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x40000
|
||||
#endif
|
||||
|
||||
; 36kB(0x9000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x02000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00009000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100
|
||||
#define VECTOR_SIZE 0x100
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100
|
||||
; 36kB(0x9000) - 0x100 = 0x8F00
|
||||
RW_IRAM1 (0x02000000+0x100) (0x9000-0x100) {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -22,32 +22,10 @@
|
|||
; *
|
||||
; ******************************************************************************/
|
||||
|
||||
; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000200
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
__initial_sp EQU 0x02009000 ; Top of RAM from LPC1549
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
@ -311,7 +289,5 @@ RTC_WAKE_IRQHandler
|
|||
; User Initial Stack & Heap
|
||||
|
||||
EXPORT __initial_sp
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
END
|
||||
|
|
|
|||
|
|
@ -1,37 +1,69 @@
|
|||
#! armcc -E
|
||||
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 32K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x80000
|
||||
#define MBED_APP_SIZE 0x80000
|
||||
#endif
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
ER_IROM0 MBED_APP_START 0x2FC { ; load address = execution address
|
||||
; 4KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00008000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8
|
||||
#define VECTOR_SIZE 0xC8
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+0x20)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM0 MBED_APP_START 0x2FC { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
.ANY (+RO)
|
||||
}
|
||||
ER_CRP (MBED_APP_START + 0x2FC) FIXED 4 {
|
||||
|
||||
ER_CRP (MBED_APP_START + 0x2FC) FIXED 4 {
|
||||
*.o (.CRPSection)
|
||||
}
|
||||
|
||||
ER_IROM1 (MBED_APP_START + (0x2FC + 4)) FIXED (MBED_APP_SIZE - (0x2FC + 4)) {
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8
|
||||
|
||||
; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18
|
||||
RW_IRAM1 0x100000C8 0x7F18 {
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE-0x20) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
RW_IRAM2 0x2007C000 0x4000 { ; RW data, USB RAM
|
||||
.ANY (AHBSRAM0)
|
||||
}
|
||||
|
||||
RW_IRAM3 0x20080000 0x4000 { ; RW data, ETH RAM
|
||||
.ANY (AHBSRAM1)
|
||||
}
|
||||
|
||||
RW_IRAM4 0x40038000 0x0800 { ; RW data, CAN RAM
|
||||
.ANY (CANRAM)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,25 +19,10 @@
|
|||
; *
|
||||
; *****************************************************************************/
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10008000 ; Top of RAM from LPC1768
|
||||
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,14 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x4000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x4000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 16K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
; 4KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00001000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0xF40
|
||||
RW_IRAM1 0x100000C0 0xF40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,33 +20,9 @@
|
|||
; *****************************************************************************/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000200
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10001000
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,14 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x1000 { ; load region size_region (4k)
|
||||
ER_IROM1 0x00000000 0x1000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 4K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x1000
|
||||
#endif
|
||||
|
||||
; 1KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x400
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 0xC0
|
||||
; 1KB(0x0400) - 0xC0 = 0x340
|
||||
RW_IRAM1 (0x10000000+0xC0) (0x400-0xC0) {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,33 +20,9 @@
|
|||
; *****************************************************************************/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000200
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10000400
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,14 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x4000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x4000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
; 4KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00001000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0xF40
|
||||
RW_IRAM1 0x100000C0 0xF40 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,33 +20,9 @@
|
|||
; *****************************************************************************/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000200
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x10001000
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,14 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x8000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 32K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 4KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x2000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x10000000+0xC0 0x2000-0xC0 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,30 +20,9 @@
|
|||
; *****************************************************************************/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
__initial_sp EQU 0x10002000
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,14 +1,48 @@
|
|||
#! armcc -E
|
||||
|
||||
LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k)
|
||||
ER_IROM1 0x00000000 0x8000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x00000000
|
||||
#endif
|
||||
|
||||
; 32K flash
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 4KB
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x10000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x2000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
|
||||
; 8KB - 0xC0 = 0x1F40
|
||||
RW_IRAM1 0x10000000+0xC0 0x2000-0xC0 {
|
||||
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,30 +20,9 @@
|
|||
; *****************************************************************************/
|
||||
|
||||
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
__initial_sp EQU 0x10002000
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000000
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -37,35 +37,10 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20002000 ; Top of RAM (8 KB for STM32F030R8)
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F030R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
LR_IROM1 0x08000000 0x10000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x10000 { ; load address = execution address
|
||||
; STM32F030R8: 64KB FLASH (0x10000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
; 8KB RAM (0x2000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x2000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -27,35 +27,8 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20002000 ; Top of RAM (8 KB for STM32F030R8)
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -26,20 +27,49 @@
|
|||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
; STM32F030R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000)
|
||||
; STM32F030R8: 64KB FLASH (0x10000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
LR_IROM1 0x08000000 0x10000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x10000 { ; load address = execution address
|
||||
; 8KB RAM (0x2000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x2000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 45 vectors = 180 bytes (0xB4) 8-byte aligned = 0xB8 (0xB4 + 0x4) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0xB8
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 45 vectors = 180 bytes (0xB4) 8-byte aligned = 0xB8 (0xB4 + 0x4) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0xB8) (0x2000-0xB8) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20001000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; 32KB FLASH (0x8000) + 4KB RAM (0x1000)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
LR_IROM1 0x08000000 0x8000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x8000 { ; load address = execution address
|
||||
; 32KB FLASH (0x8000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 4KB RAM (0x1000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x1000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 44 vectors = 176 bytes (0xB0) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0xB0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 44 vectors = 176 bytes (0xB0) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0xB0) (0x1000-0xB0) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20001800 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; 32KB FLASH (0x8000) + 6KB RAM (0x1800)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
LR_IROM1 0x08000000 0x8000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x8000 { ; load address = execution address
|
||||
; 32KB FLASH (0x8000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
; 6KB RAM (0x1800)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x1800
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0xC0) (0x1800-0xC0) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20004000 ; Top of RAM (16KB)
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F070RB: 128KB FLASH (0x20000) + 16KB RAM (0x4000)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
LR_IROM1 0x08000000 0x20000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x20000 { ; load address = execution address
|
||||
; STM32F070RB: 128KB FLASH (0x20000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
; 16KB RAM (0x4000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20004000 ; Top of RAM (16KB)
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F072RB: 128KB FLASH (0x20000) + 16KB RAM (0x4000)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
LR_IROM1 0x08000000 0x20000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x20000 { ; load address = execution address
|
||||
; STM32F072RB: 128KB FLASH (0x20000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
; 16KB RAM (0x4000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20008000 ; Top of RAM (32KB)
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F091RC: 256KB FLASH (0x40000) + 32KB RAM (0x8000)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
LR_IROM1 0x08000000 0x40000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x40000 { ; load address = execution address
|
||||
; 256KB FLASH (0x40000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x40000
|
||||
#endif
|
||||
|
||||
; 32KB RAM (0x8000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x8000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0xC0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 48 vectors = 192 bytes (0xC0) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0xC0) (0x8000-0xC0) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -41,35 +41,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20002000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2016, STMicroelectronics
|
||||
|
|
@ -27,18 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08000000 0x20000 { ; load address = execution address
|
||||
; 128K FLASH (0x20000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
; 320KB SRAM (0x50000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x2000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 77 vectors (16 core + 61 peripheral) * 4 bytes = 308 bytes to reserve (0x134) 8-byte aligned = 0x138
|
||||
#define VECTOR_SIZE 0x138
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 77 vectors (16 core + 61 peripheral) * 4 bytes = 308 bytes to reserve (0x134) 8-byte aligned = 0x138
|
||||
RW_IRAM1 (0x20000000+0x138) (0x2000-0x138) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -41,35 +41,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20005000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2016, STMicroelectronics
|
||||
|
|
@ -27,18 +28,48 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K)
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08000000 0x20000 { ; load address = execution address
|
||||
; 128K FLASH (0x20000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x5000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0
|
||||
#define VECTOR_SIZE 0xF0
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0
|
||||
RW_IRAM1 (0x20000000+0xF0) (0x5000-0xF0) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -47,6 +47,9 @@ LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K)
|
|||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000+0x5000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)-0xF0) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -38,34 +38,7 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20020000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
__initial_sp EQU 0x20020000
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
|
@ -409,7 +382,6 @@ HASH_RNG_IRQHandler
|
|||
ENDP
|
||||
|
||||
ALIGN
|
||||
|
||||
END
|
||||
END
|
||||
|
||||
;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2016, STMicroelectronics
|
||||
|
|
@ -27,16 +28,47 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
LR_IROM1 0x08000000 0x00100000 { ; load region size_region
|
||||
ER_IROM1 0x08000000 0x00100000 { ; load address = execution address
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x100000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x00020000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 97 vectors * 4 bytes = 388 bytes to reserve (0x184) 8-byte aligned = 0x188 (0x184 + 0x4)
|
||||
#define VECTOR_SIZE 0x188
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 97 vectors * 4 bytes = 388 bytes to reserve (0x184) 8-byte aligned = 0x188
|
||||
RW_IRAM1 (0x20000000+0x188) (0x00020000-0x188) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
}
|
||||
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20004000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F302R8: 64KB FLASH + 16KB SRAM
|
||||
LR_IROM1 0x08000000 0x10000 { ; load region size_region
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08000000 0x10000 { ; load address = execution address
|
||||
; STM32F302R8: 64KB FLASH
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
; 16KB SRAM
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x4000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 98 vectors (16 core + 82 peripheral) * 4 bytes = 392 bytes to reserve (0x188)
|
||||
#define VECTOR_SIZE 0x188
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 98 vectors (16 core + 82 peripheral) * 4 bytes = 392 bytes to reserve (0x188)
|
||||
RW_IRAM1 (0x20000000+0x188) (0x4000-0x188) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20003000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F303K8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000)
|
||||
LR_IROM1 0x08000000 0x10000 { ; load region size_region
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08000000 0x10000 { ; load address = execution address
|
||||
; STM32F303K8: 64KB FLASH (0x10000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
12KB SRAM (0x3000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x3000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0x188
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,8 +37,35 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20003000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000200
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x2000A000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F303VC: 256KB FLASH (0x40000) + 40KB SRAM (0xA000)
|
||||
LR_IROM1 0x08000000 0x40000 { ; load region size_region
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08000000 0x40000 { ; load address = execution address
|
||||
; STM32F303VC: 256KB FLASH (0x40000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x40000
|
||||
#endif
|
||||
|
||||
; 40KB SRAM (0xA000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0xA000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0x188
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x188) (0xA000-0x188) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20010000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F303RE: 512KB FLASH (0x80000) + 64KB SRAM (0x10000)
|
||||
LR_IROM1 0x08000000 0x80000 { ; load region size_region
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08000000 0x80000 { ; load address = execution address
|
||||
; STM32F303RE: 512KB FLASH (0x80000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x80000
|
||||
#endif
|
||||
|
||||
;64KB SRAM (0x10000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0x198
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x198) (0x10000-0x198) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20003000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F334x8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000)
|
||||
LR_IROM1 0x08000000 0x10000 { ; load region size_region
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08000000 0x10000 { ; load address = execution address
|
||||
; STM32F334x8: 64KB FLASH (0x10000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x10000
|
||||
#endif
|
||||
|
||||
; 12KB SRAM (0x3000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x3000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0x188
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20020000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -26,22 +27,51 @@
|
|||
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
|
||||
; FIRST 64 KB FLASH FOR BOOTLOADER
|
||||
; REST 448 KB FLASH FOR APPLICATION
|
||||
LR_IROM1 0x08010000 0x70000 { ; load region size_region
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08010000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
|
||||
; STM32F411RE: 512 KB FLASH (0x80000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x70000
|
||||
#endif
|
||||
|
||||
; 128 KB SRAM (0x20000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0x198
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20020000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,21 +28,51 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000)
|
||||
; FIRST 64 KB FLASH FOR BOOTLOADER
|
||||
; REST 448 KB FLASH FOR APPLICATION
|
||||
LR_IROM1 0x08010000 0x70000 { ; load region size_region
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08010000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08010000 0x70000 { ; load address = execution address
|
||||
; STM32F411RE: 512 KB FLASH (0x80000)
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x70000
|
||||
#endif
|
||||
|
||||
; 128 KB SRAM (0x20000)
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0x198
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20020000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
|
|
@ -1,3 +1,4 @@
|
|||
#! armcc -E
|
||||
; Scatter-Loading Description File
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
; Copyright (c) 2014, STMicroelectronics
|
||||
|
|
@ -27,19 +28,49 @@
|
|||
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||
|
||||
; STM32F405RG: 1024KB FLASH + 128KB SRAM
|
||||
LR_IROM1 0x08000000 0x100000 { ; load region size_region
|
||||
#if !defined(MBED_APP_START)
|
||||
#define MBED_APP_START 0x08000000
|
||||
#endif
|
||||
|
||||
ER_IROM1 0x08000000 0x100000 { ; load address = execution address
|
||||
; STM32F405RG: 1024KB FLASH
|
||||
#if !defined(MBED_APP_SIZE)
|
||||
#define MBED_APP_SIZE 0x100000
|
||||
#endif
|
||||
|
||||
; 128KB SRAM
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
#define MBED_RAM_SIZE 0x20000
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(MBED_BOOT_STACK_SIZE)
|
||||
#define MBED_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
#define VECTOR_SIZE 0x188
|
||||
|
||||
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
|
||||
|
||||
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
|
||||
|
||||
ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
|
||||
*.o (RESET, +First)
|
||||
*(InRoot$$Sections)
|
||||
.ANY (+RO)
|
||||
}
|
||||
|
||||
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
|
||||
RW_IRAM1 (0x20000000+0x188) (0x20000-0x188) { ; RW data
|
||||
RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data
|
||||
.ANY (+RW +ZI)
|
||||
}
|
||||
|
||||
}
|
||||
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
|
||||
}
|
||||
|
||||
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -37,35 +37,8 @@
|
|||
;
|
||||
;*******************************************************************************
|
||||
|
||||
; Amount of memory (in bytes) allocated for Stack
|
||||
; Tailor this value to your application needs
|
||||
; <h> Stack Configuration
|
||||
; <o> Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Stack_Size EQU 0x00000400
|
||||
|
||||
AREA STACK, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __initial_sp
|
||||
|
||||
Stack_Mem SPACE Stack_Size
|
||||
__initial_sp EQU 0x20020000 ; Top of RAM
|
||||
|
||||
|
||||
; <h> Heap Configuration
|
||||
; <o> Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
|
||||
; </h>
|
||||
|
||||
Heap_Size EQU 0x00000400
|
||||
|
||||
AREA HEAP, NOINIT, READWRITE, ALIGN=3
|
||||
EXPORT __heap_base
|
||||
EXPORT __heap_limit
|
||||
|
||||
__heap_base
|
||||
Heap_Mem SPACE Heap_Size
|
||||
__heap_limit EQU (__initial_sp - Stack_Size)
|
||||
|
||||
PRESERVE8
|
||||
THUMB
|
||||
|
||||
|
|
|
|||
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Reference in New Issue