diff --git a/platform/mbed_retarget.cpp b/platform/mbed_retarget.cpp index c99cce5672..bc4a9bd2ce 100644 --- a/platform/mbed_retarget.cpp +++ b/platform/mbed_retarget.cpp @@ -907,13 +907,14 @@ extern "C" long PREFIX(_flen)(FILEHANDLE fh) // Do not compile this code for TFM secure target #if !defined(COMPONENT_SPE) || !defined(TARGET_TFM) +#if !defined(__MICROLIB) #if defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050) __asm(".global __use_two_region_memory\n\t"); __asm(".global __use_no_semihosting\n\t"); - #else #pragma import(__use_two_region_memory) #endif +#endif #if !defined(HEAP_START) // Heap here is considered starting after ZI ends to Stack start @@ -938,12 +939,14 @@ extern "C" MBED_WEAK __value_in_regs struct __initial_stackheap _mbed_user_setup return r; } +#if !defined(__MICROLIB) extern "C" __value_in_regs struct __argc_argv $Super$$__rt_lib_init(unsigned heapbase, unsigned heaptop); extern "C" __value_in_regs struct __argc_argv $Sub$$__rt_lib_init(unsigned heapbase, unsigned heaptop) { return $Super$$__rt_lib_init((unsigned)HEAP_START, (unsigned)HEAP_LIMIT); } +#endif extern "C" __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) { diff --git a/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c b/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c index 06373232de..c2ce8ddb19 100644 --- a/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c +++ b/rtos/TARGET_CORTEX/TOOLCHAIN_ARM_MICRO/mbed_boot_arm_micro.c @@ -16,18 +16,16 @@ */ #include #include +#include #include "mbed_boot.h" #include "mbed_assert.h" -/* Symbols that are typically defined in startup_.S */ -extern uint32_t __initial_sp[]; -extern uint32_t __heap_base[]; -extern uint32_t __heap_limit[]; +extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; +extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[]; -#if !defined(ISR_STACK_SIZE) -#define ISR_STACK_SIZE ((uint32_t)1024) -#endif +extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Base[]; +extern uint32_t Image$$ARM_LIB_HEAP$$ZI$$Length[]; /* * mbed entry point for the MICROLIB toolchain @@ -41,12 +39,11 @@ void _main_init(void) __attribute__((section(".ARM.Collect$$$$000000FF"))); void _main_init(void) { /* microlib only supports the two region memory model */ + mbed_stack_isr_start = (unsigned char *) Image$$ARM_LIB_STACK$$ZI$$Base; + mbed_stack_isr_size = (uint32_t) Image$$ARM_LIB_STACK$$ZI$$Length; - mbed_heap_start = (unsigned char *)__heap_base; - mbed_heap_size = (uint32_t)__heap_base - (uint32_t)__heap_limit; - - mbed_stack_isr_start = (unsigned char *)((uint32_t)__initial_sp - ISR_STACK_SIZE); - mbed_stack_isr_size = ISR_STACK_SIZE; + mbed_heap_start = (unsigned char *) Image$$ARM_LIB_HEAP$$ZI$$Base; + mbed_heap_size = (uint32_t) Image$$ARM_LIB_HEAP$$ZI$$Length; mbed_init(); mbed_rtos_start(); diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct index 7fda6ed398..a68af788ce 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21G18A/device/TOOLCHAIN_ARM_MICRO/SAMD21G18A.sct @@ -1,19 +1,50 @@ +#! armcc -E + ;SAMD21G18A -;256KB FLASH (0x40000) @ 0x000000000 -;2KB RAM (0x8000) @ 0x20000000 +; 256KB FLASH (0x40000) @ 0x000000000 +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; SAMD21G18A: 256KB FLASH (0x40000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB RAM (0x8000) @ 0x20000000 +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 +#endif -;SAMD21G18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) -LR_IROM1 0x00000000 0x40000 { ; load region size_region - ER_IROM1 0x00000000 0x40000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif - ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment - RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data - .ANY (+RW +ZI) - } +; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment +#define VECTOR_SIZE 0xB8 -} \ No newline at end of file +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct index 0d7409619f..099b602976 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMD21J18A/device/TOOLCHAIN_ARM_MICRO/SAMD21J18A.sct @@ -1,19 +1,50 @@ +#! armcc -E + ;SAMD21J18A -;256KB FLASH (0x40000) @ 0x000000000 -;2KB RAM (0x8000) @ 0x20000000 +; 256KB FLASH (0x40000) @ 0x000000000 +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; SAMD21J18A: 256KB FLASH (0x40000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB RAM (0x8000) @ 0x20000000 +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 +#endif -;SAMD21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) -LR_IROM1 0x00000000 0x40000 { ; load region size_region - ER_IROM1 0x00000000 0x40000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif - ; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment - RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) { ; RW data - .ANY (+RW +ZI) - } +; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment +#define VECTOR_SIZE 0xB8 -} \ No newline at end of file +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct index f1f0bb48f6..099b602976 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAML21J18A/device/TOOLCHAIN_ARM_MICRO/SAML21J18A.sct @@ -1,29 +1,50 @@ -; -SAML21J18A -; -256KB FLASH (0x40000) @ 0x000000000 -; -2KB RAM (0x8000) @ 0x20000000 +#! armcc -E + +;SAMD21J18A +; 256KB FLASH (0x40000) @ 0x000000000 +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; SAMD21J18A: 256KB FLASH (0x40000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB RAM (0x8000) @ 0x20000000 +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 +#endif -; -SAML21J18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) -LR_IROM1 0x00000000 0x40000 { ; - load region size_region - ER_IROM1 0x00000000 0x40000 { ; - load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif - ; - [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4+0x4) 8-byte alignment - RW_IRAM1 (0x20000000+0xB8) (0x8000-0xB8) - { - ; - RW data - .ANY (+RW +ZI) - } +; [RAM] Vector table dynamic copy: 45 vectors * 4 bytes = (0xB4 +0x4) 8-byte alignment +#define VECTOR_SIZE 0xB8 -} \ No newline at end of file +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_MICRO/SAMR21G18A.sct b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_MICRO/SAMR21G18A.sct index 669d9fe7a7..c2916a0816 100644 --- a/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_MICRO/SAMR21G18A.sct +++ b/targets/TARGET_Atmel/TARGET_SAM_CortexM0P/TARGET_SAMR21G18A/device/TOOLCHAIN_ARM_MICRO/SAMR21G18A.sct @@ -1,19 +1,50 @@ +#! armcc -E + ;SAMR21G18A -;256KB FLASH (0x40000) @ 0x000000000 -;2KB RAM (0x8000) @ 0x20000000 +; 256KB FLASH (0x40000) @ 0x000000000 +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; SAMR21G18A: 256KB FLASH (0x40000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB RAM (0x8000) @ 0x20000000 +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 +#endif -;SAMR21G18A: 256KB FLASH (0x40000) + 32KB RAM (0x8000) -LR_IROM1 0x00000000 0x40000 { ; load region size_region - ER_IROM1 0x00000000 0x40000 { ; load address = execution address - *.o (RESET, +First) - *(InRoot$$Sections) - .ANY (+RO) - } +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif - ; [RAM] Vector table dynamic copy: 44 vectors * 4 bytes = (0xB0) - alignment - RW_IRAM1 (0x20000000+0xB0) (0x8000-0xB0) { ; RW data - .ANY (+RW +ZI) - } +; [RAM] Vector table dynamic copy: 44 vectors * 4 bytes = (0xB0) - alignment +#define VECTOR_SIZE 0xB0 -} \ No newline at end of file +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address + *.o (RESET, +First) + *(InRoot$$Sections) + .ANY (+RO) + } + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_MICRO/MKL05Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_MICRO/MKL05Z4.sct index 1afd9a9dc0..756e2a4267 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_MICRO/MKL05Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_MICRO/MKL05Z4.sct @@ -1,12 +1,46 @@ -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x8000 { ; load address = execution address +#! armcc -E + +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x1FFFF000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x1000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 0x1000 - 0xC0 = 0xF40 - RW_IRAM1 0x1FFFFCC0 0xF40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_MICRO/startup_MKL05Z4.S b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_MICRO/startup_MKL05Z4.S index 0e8a17c571..85977bd50e 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_MICRO/startup_MKL05Z4.S +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_ARM_MICRO/startup_MKL05Z4.S @@ -11,25 +11,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20000C00 ; Top of RAM -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct index 1016068421..b9cd41e885 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct @@ -1,14 +1,46 @@ +#! armcc -E -LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x20000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 1FFFF000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x4000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 0x4000 - 0xC0 = 0x3F40 - RW_IRAM1 0x1FFFF0C0 0x3F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/startup_MKL25Z4.S b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/startup_MKL25Z4.S index e83f4fcbd6..943c0f2aa1 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/startup_MKL25Z4.S +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/startup_MKL25Z4.S @@ -12,29 +12,9 @@ ; *****************************************************************************/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20003000 ; Top of RAM -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_ARM_MICRO/MKL26Z4.sct b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_ARM_MICRO/MKL26Z4.sct index 1016068421..b9cd41e885 100644 --- a/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_ARM_MICRO/MKL26Z4.sct +++ b/targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_ARM_MICRO/MKL26Z4.sct @@ -1,14 +1,46 @@ +#! armcc -E -LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x20000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 1FFFF000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x4000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 0x4000 - 0xC0 = 0x3F40 - RW_IRAM1 0x1FFFF0C0 0x3F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct b/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct index 44243e7961..44128a0c70 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/gd32e103vb.sct @@ -4,24 +4,46 @@ ; ***** #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x20000 + #define MBED_APP_SIZE 0x00020000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00008000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) +#define VECTOR_SIZE 0x150 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) - RW_IRAM1 (0x20000000+0x150) (0x8000-0x150) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S b/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S index 164bd83204..59a4333412 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S +++ b/targets/TARGET_GigaDevice/TARGET_GD32E10X/device/TOOLCHAIN_ARM_MICRO/startup_gd32e10x.S @@ -35,31 +35,9 @@ ;OF SUCH DAMAGE. ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct index 35cb12437b..fe8e5d66fe 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/gd32f307vg.sct @@ -4,24 +4,46 @@ ; ***** #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (1024K) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00018000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) +#define VECTOR_SIZE 0x150 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 84 vectors (16 core + 68 peripheral) * 4 bytes = 336 bytes to reserve (0x150) - RW_IRAM1 (0x20000000+0x150) (0x18000-0x150) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S index b389e1775c..6eeefd2585 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S +++ b/targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_ARM_MICRO/startup_gd32f30x_cl.S @@ -34,31 +34,9 @@ ;OF SUCH DAMAGE. ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20010000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct index 03be6293fe..5e606064c0 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/gd32f450zi.sct @@ -4,23 +4,46 @@ ; ***** #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x00200000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region (3*1024K) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00020000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned) +#define VECTOR_SIZE 0x1B0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 107 vectors (16 core + 91 peripheral) * 4 bytes = 428 bytes to reserve (0x1B0, 8-byte aligned) - RW_IRAM1 (0x20000000+0x1B0) (0x20000-0x1B0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/startup_gd32f450.S b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/startup_gd32f450.S index f111982475..4272c37a93 100644 --- a/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/startup_gd32f450.S +++ b/targets/TARGET_GigaDevice/TARGET_GD32F4XX/device/TOOLCHAIN_ARM_MICRO/startup_gd32f450.S @@ -36,31 +36,10 @@ ;OF SUCH DAMAGE. ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000800 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB @@ -432,27 +411,6 @@ IPA_IRQHandler ; user Initial Stack & Heap - IF :DEF:__MICROLIB - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - - ELSE - - IMPORT __use_two_region_memory - EXPORT __user_initial_stackheap - -__user_initial_stackheap PROC - LDR R0, = Heap_Mem - LDR R1, =(Stack_Mem + Stack_Size) - LDR R2, = (Heap_Mem + Heap_Size) - LDR R3, = Stack_Mem - BX LR - ENDP - - ALIGN - - ENDIF END diff --git a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct index 4986982ab6..0d886c4421 100644 --- a/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct +++ b/targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_ARM_MICRO/M453.sct @@ -1,43 +1,53 @@ #! armcc -E #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00040000 + #define MBED_APP_SIZE 0x00040000 #endif +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00008000 +#endif + + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif -LR_IROM1 MBED_APP_START { - ER_IROM1 MBED_APP_START { ; load address = execution address +#define VECTOR_SIZE (4*(16 + 64)) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - - ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE { + + ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE { } - + /* VTOR[TBLOFF] alignment requires: * * 1. Minumum 32-word * 2. Rounding up to the next power of two of table size */ - ER_IRAMVEC AlignExpr(+0, 512) EMPTY (4*(16 + 64)) { ; Reserve for vectors + ER_IRAMVEC AlignExpr(+0, 512) EMPTY VECTOR_SIZE { ; Reserve for vectors } - - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned + + RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned .ANY (+RW +ZI) } - - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x8000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 256 KB APROM -ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20008000) ; 32 KB SRAM +ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 32 KB SRAM diff --git a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct index 7396955d3b..000fda8cfa 100644 --- a/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct +++ b/targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_ARM_MICRO/M487.sct @@ -1,30 +1,41 @@ #! armcc -E +; 512 KB APROM #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00080000 + #define MBED_APP_SIZE 0x00080000 #endif +; 160 KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00028000 +#endif + + +#define SPIM_CCM_START 0x20020000 +#define SPIM_CCM_END 0x20028000 + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif +#define VECTOR_SIZE (4*(16 + 96)) -#define SPIM_CCM_START 0x20020000 -#define SPIM_CCM_END 0x20028000 - - -LR_IROM1 MBED_APP_START { - ER_IROM1 MBED_APP_START { ; load address = execution address +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE { + ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: @@ -32,18 +43,18 @@ LR_IROM1 MBED_APP_START { * 1. Minumum 32-word * 2. Rounding up to the next power of two of table size */ - ER_IRAMVEC AlignExpr(+0, 512) EMPTY (4*(16 + 96)) { ; Reserve for vectors + ER_IRAMVEC AlignExpr(+0, 512) EMPTY VECTOR_SIZE { ; Reserve for vectors } - - RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage + + RW_m_crash_data AlignExpr(+0, 0x100) EMPTY 0x100 { ; Reserve for crash data storage } - - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned + + RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned .ANY (+RW +ZI) } - - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x28000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM -ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20028000) ; 160 KB SRAM +ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 160 KB SRAM diff --git a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct index 97f76f6675..7c809b9db9 100644 --- a/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct +++ b/targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_ARM_MICRO/NANO130.sct @@ -1,27 +1,48 @@ #! armcc -E +; 512 KB APROM +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00020000 +#endif + +; 16 KB SRAM (internal) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x4000 +#endif + + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif -LR_IROM1 0x00000000 { - ER_IROM1 0x00000000 { ; load address = execution address +; Does not support vector table relocation + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - - ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE { + + ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE { } - - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned + + RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned .ANY (+RW +ZI) } - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x4000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ; Extern SRAM for HEAP + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } -ScatterAssert(LoadLimit(LR_IROM1) <= 0x00020000) ; 128 KB APROM -ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x20004000) ; 16 KB SRAM +ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 128 KB APROM +ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 16 KB SRAM (internal) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct index 599051ecf6..b4f0b9c994 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_SUPPORTED/NUC472.sct @@ -1,26 +1,42 @@ #! armcc -E +; 512 KB APROM #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00080000 + #define MBED_APP_SIZE 0x00080000 #endif +; 64 KB SRAM (internal) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00010000 +#endif + + +; 1 MB SRAM (external) +#define MBED_RAM1_START 0x60000000 +#define MBED_RAM1_SIZE 0x00100000 + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif -LR_IROM1 MBED_APP_START { - ER_IROM1 MBED_APP_START { ; load address = execution address +#define VECTOR_SIZE (4*(16 + 142)) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - - ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE { + + ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: @@ -28,23 +44,22 @@ LR_IROM1 MBED_APP_START { * 1. Minumum 32-word * 2. Rounding up to the next power of two of table size */ - ER_IRAMVEC AlignExpr(+0, 1024) EMPTY (4*(16 + 142)) { ; Reserve for vectors + ER_IRAMVEC AlignExpr(+0, 1024) EMPTY VECTOR_SIZE { ; Reserve for vectors } - - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned + + RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned .ANY (+RW +ZI) } - + ; Too large to place into internal SRAM. So place into external SRAM instead. - ER_XRAM1 0x60000000 { + ER_XRAM1 MBED_RAM1_START { *sal-stack-lwip* (+ZI) } ; Extern SRAM for HEAP - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x60000000 + 0x100000 - AlignExpr(ImageLimit(ER_XRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM1_START + MBED_RAM1_SIZE - AlignExpr(ImageLimit(ER_XRAM1), 16)) { } } ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM -ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal) -ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= 0x60100000) ; 1 MB SRAM (external) - +ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 64 KB SRAM (internal) +ScatterAssert(ImageLimit(ARM_LIB_HEAP) <= (MBED_RAM1_START + MBED_RAM1_SIZE)) ; 1 MB SRAM (external) diff --git a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct index da85bc834d..d2f93743ce 100644 --- a/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct +++ b/targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_ARM_MICRO/TARGET_NU_XRAM_UNSUPPORTED/NUC472.sct @@ -1,26 +1,38 @@ #! armcc -E +; 512 KB APROM #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00080000 + #define MBED_APP_SIZE 0x00080000 #endif +; 64 KB SRAM (internal) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00010000 +#endif + + #if !defined(MBED_BOOT_STACK_SIZE) #define MBED_BOOT_STACK_SIZE 0x400 #endif -LR_IROM1 MBED_APP_START { - ER_IROM1 MBED_APP_START { ; load address = execution address +#define VECTOR_SIZE (4*(16 + 142)) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *(RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - - ARM_LIB_STACK 0x20000000 EMPTY MBED_BOOT_STACK_SIZE { + + ARM_LIB_STACK MBED_RAM_START EMPTY MBED_BOOT_STACK_SIZE { } /* VTOR[TBLOFF] alignment requires: @@ -28,17 +40,16 @@ LR_IROM1 MBED_APP_START { * 1. Minumum 32-word * 2. Rounding up to the next power of two of table size */ - ER_IRAMVEC AlignExpr(+0, 1024) EMPTY (4*(16 + 142)) { ; Reserve for vectors + ER_IRAMVEC AlignExpr(+0, 1024) EMPTY VECTOR_SIZE { ; Reserve for vectors } - RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned + RW_IRAM1 AlignExpr(+0, 16) { ; 16 byte-aligned .ANY (+RW +ZI) } ; Extern SRAM for HEAP - ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000 + 0x10000 - AlignExpr(ImageLimit(RW_IRAM1), 16)) { + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) { } } ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE)) ; 512 KB APROM -ScatterAssert(ImageLimit(RW_IRAM1) <= 0x20010000) ; 64 KB SRAM (internal) - +ScatterAssert(ImageLimit(RW_IRAM1) <= (MBED_RAM_START + MBED_RAM_SIZE)) ; 64 KB SRAM (internal) diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct index 8a9325406a..650199924b 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/LPC11U68.sct @@ -1,13 +1,48 @@ +#! armcc -E -LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) - ER_IROM1 0x00000000 0x40000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 256k flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 32kB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00008000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100 +#define VECTOR_SIZE 0x100 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100 - ; 32kB (0x8000) - 0x100 = 0x7F00 - RW_IRAM1 (0x10000000+0x100) (0x8000-0x100) { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/startup_LPC11U6x.S b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/startup_LPC11U6x.S index 7a331f18c6..7e01a1b70d 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/startup_LPC11U6x.S +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U68/startup_LPC11U6x.S @@ -24,28 +24,9 @@ ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x10008000 ; Top of RAM from LPC1U68 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -238,7 +219,5 @@ USBWAKEUP_IRQHandler ; User Initial Stack & Heap EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit END diff --git a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/startup_LPC11U6x.S b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/startup_LPC11U6x.S index 7a331f18c6..62c9f48c0d 100644 --- a/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/startup_LPC11U6x.S +++ b/targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_ARM_STD/TARGET_LPC11U68/startup_LPC11U6x.S @@ -242,3 +242,4 @@ USBWAKEUP_IRQHandler EXPORT __heap_limit END + diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/LPC11U24.sct index 5a6e12b240..ba5ee39362 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/LPC11U24.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/LPC11U24.sct @@ -1,17 +1,52 @@ +#! armcc -E -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x8000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 32K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 6KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00001800 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 6KB - 0xC0 = 0x1740 - RW_IRAM1 0x100000C0 0x1740 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/startup_LPC11xx.S index 88fa96f8ff..e45f6ffe27 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_301/startup_LPC11xx.S @@ -19,25 +19,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10001800 ; Top of RAM from LPC11U -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/LPC11U24.sct index 093772cc06..343856338f 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/LPC11U24.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/LPC11U24.sct @@ -1,17 +1,52 @@ +#! armcc -E -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x8000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 32K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 8KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00002000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/startup_LPC11xx.S index 0d0cd2f8f7..a28c6123f6 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U24_401/startup_LPC11xx.S @@ -19,25 +19,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10002000 ; Top of RAM from LPC11U -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/LPC11U34.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/LPC11U34.sct index 398efab556..5480385c8e 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/LPC11U34.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/LPC11U34.sct @@ -1,17 +1,52 @@ +#! armcc -E -LR_IROM1 0x00000000 0xC000 { ; load region size_region (48k) - ER_IROM1 0x00000000 0xC000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 48K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0xC000 +#endif + +; 8KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00002000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/startup_LPC11xx.S index 0d0cd2f8f7..a28c6123f6 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U34_421/startup_LPC11xx.S @@ -19,25 +19,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10002000 ; Top of RAM from LPC11U -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/LPC11U35.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/LPC11U35.sct index 99d9a6c20d..ffa68f0335 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/LPC11U35.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/LPC11U35.sct @@ -1,17 +1,52 @@ +#! armcc -E -LR_IROM1 0x00000000 0x10000 { ; load region size_region (64k) - ER_IROM1 0x00000000 0x10000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 64K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif + +; 8KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00002000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/startup_LPC11xx.S index 0d0cd2f8f7..a28c6123f6 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U35_401/startup_LPC11xx.S @@ -19,25 +19,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10002000 ; Top of RAM from LPC11U -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/LPC11U37.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/LPC11U37.sct index 2d8853b914..3364de37dc 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/LPC11U37.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/LPC11U37.sct @@ -1,20 +1,56 @@ +#! armcc -E -LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K) - ER_IROM1 0x00000000 0x20000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 128K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +; 8KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00002000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM .ANY (IOHANDLER_RAM) } + RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/startup_LPC11xx.S index 69b9f35861..e36a8bcc8b 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37H_401/startup_LPC11xx.S @@ -19,25 +19,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10002000 ; Top of RAM from LPC11U3x -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/LPC11U37.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/LPC11U37.sct index 2d8853b914..3364de37dc 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/LPC11U37.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/LPC11U37.sct @@ -1,20 +1,56 @@ +#! armcc -E -LR_IROM1 0x00000000 0x20000 { ; load region size_region (128K) - ER_IROM1 0x00000000 0x20000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 128K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +; 8KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00002000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM .ANY (IOHANDLER_RAM) } + RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/startup_LPC11xx.S index 69b9f35861..3716340551 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11U37_501/startup_LPC11xx.S @@ -19,25 +19,10 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10002000 ; Top of RAM from LPC11U3x -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/LPC11U35.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/LPC11U35.sct index 7a8a1e2451..82029376b5 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/LPC11U35.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/LPC11U35.sct @@ -1,20 +1,56 @@ +#! armcc -E -LR_IROM1 0x00000000 0x10000 { ; load region size_region (64k) - ER_IROM1 0x00000000 0x10000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 128K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif + +; 8KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00002000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM .ANY (IOHANDLER_RAM) } + RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/startup_LPC11xx.S index 10ad58dc06..1736030096 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_MCU_LPC11U35_501/startup_LPC11xx.S @@ -19,25 +19,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10002000 ; Top of RAM from LPC11U3x -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/LPC11U24.sct b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/LPC11U24.sct index 5a6e12b240..c87a6af68c 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/LPC11U24.sct +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/LPC11U24.sct @@ -1,17 +1,52 @@ +#! armcc -E -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x8000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 128K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 8KB (0x2000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00001800 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 6KB - 0xC0 = 0x1740 - RW_IRAM1 0x100000C0 0x1740 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM .ANY (USBRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/startup_LPC11xx.S index 88fa96f8ff..db1cba4d40 100644 --- a/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_ARM_MICRO/TARGET_OC_MBUINO/startup_LPC11xx.S @@ -19,25 +19,10 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10001800 ; Top of RAM from LPC11U -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct index 9fcb33a3e4..28ef91f749 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/LPC11C24.sct @@ -1,16 +1,52 @@ +#! armcc -E -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif - ER_IROM1 0x00000000 0x8000 { ; load address = execution address +; 128K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 8KB (0x2000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x2000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 48 vectors * 4 bytes = 0xC0 for remap - RW_IRAM1 (0x10000000+0xC0) (0x2000-0xC0) { + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + RW_IRAM2 0x20004000 0x800 { ; RW data, USB RAM + .ANY (USBRAM) + } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/startup_LPC11xx.S index 272c4c1ee0..36400bca06 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11CXX/startup_LPC11xx.S @@ -19,25 +19,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10002000 ; Top of RAM from LPC1114 -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct index 44850e6a94..14da559a15 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/LPC1114.sct @@ -1,16 +1,48 @@ +#! armcc -E -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif - ER_IROM1 0x00000000 0x8000 { ; load address = execution address +; 32K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 4KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00001000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 48 vectors * 4 bytes = 0xC0 for remap - RW_IRAM1 (0x10000000+0xC0) (0x1000-0xC0) { + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/startup_LPC11xx.S b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/startup_LPC11xx.S index 2f24b504aa..feb28e70f4 100644 --- a/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/startup_LPC11xx.S +++ b/targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_ARM_MICRO/TARGET_LPC11XX/startup_LPC11xx.S @@ -19,25 +19,9 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10001000 ; Top of RAM from LPC1114 -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/LPC1347.sct b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/LPC1347.sct index 2b47f77f04..48be681ef4 100644 --- a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/LPC1347.sct +++ b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/LPC1347.sct @@ -1,19 +1,56 @@ +#! armcc -E -LR_IROM1 0x00000000 0x10000 { ; load region size_region - ER_IROM1 0x00000000 0x10000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 128K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif + +; 8KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00002000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x100000C0 0x1F40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } - RW_IRAM2 0x20000000 0x800 { ; RW data + + RW_IRAM2 0x20000000 0x800 { ; RW data, I/O Handler RAM .ANY (AHBSRAM0) } - RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM + + RW_IRAM3 0x20004000 0x800 { ; RW data, USB RAM .ANY (AHBSRAM1) } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC13xx.S b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC13xx.S index 49fdbeb407..d46d430816 100644 --- a/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC13xx.S +++ b/targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC13xx.S @@ -18,25 +18,10 @@ ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10002000 ; Top of RAM from LPC1347 -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_ARM_MICRO/LPC15xx.sct b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_ARM_MICRO/LPC15xx.sct index 1f1b09c5b9..4ed6623ce8 100644 --- a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_ARM_MICRO/LPC15xx.sct +++ b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_ARM_MICRO/LPC15xx.sct @@ -1,13 +1,48 @@ +#! armcc -E -LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k) - ER_IROM1 0x00000000 0x40000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 256k flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 36kB(0x9000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x02000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00009000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100 +#define VECTOR_SIZE 0x100 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(16+47 vect * 4 bytes) = 0x100 - ; 36kB(0x9000) - 0x100 = 0x8F00 - RW_IRAM1 (0x02000000+0x100) (0x9000-0x100) { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC15xx.S b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC15xx.S index 0c9e87ff3c..577cbab8d8 100644 --- a/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC15xx.S +++ b/targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_ARM_MICRO/startup_LPC15xx.S @@ -22,32 +22,10 @@ ; * ; ******************************************************************************/ -; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------ - -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000200 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp __initial_sp EQU 0x02009000 ; Top of RAM from LPC1549 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -311,7 +289,5 @@ RTC_WAKE_IRQHandler ; User Initial Stack & Heap EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit END diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/LPC1768.sct b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/LPC1768.sct index 44d51132a1..6f3a989b25 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/LPC1768.sct +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/LPC1768.sct @@ -1,37 +1,69 @@ #! armcc -E #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif +; 32K flash #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x80000 + #define MBED_APP_SIZE 0x80000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM0 MBED_APP_START 0x2FC { ; load address = execution address +; 4KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00008000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8 +#define VECTOR_SIZE 0xC8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+0x20) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM0 MBED_APP_START 0x2FC { ; load address = execution address *.o (RESET, +First) .ANY (+RO) } - ER_CRP (MBED_APP_START + 0x2FC) FIXED 4 { + + ER_CRP (MBED_APP_START + 0x2FC) FIXED 4 { *.o (.CRPSection) } + ER_IROM1 (MBED_APP_START + (0x2FC + 4)) FIXED (MBED_APP_SIZE - (0x2FC + 4)) { - *(InRoot$$Sections) - .ANY (+RO) + *(InRoot$$Sections) + .ANY (+RO) } - ; 8_byte_aligned(49 vect * 4 bytes) = 8_byte_aligned(0xC4) = 0xC8 + ; 32KB (RAM size) - 0xC8 (NIVT) - 32 (topmost 32 bytes used by IAP functions) = 0x7F18 - RW_IRAM1 0x100000C8 0x7F18 { + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE-0x20) { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 0x2007C000 0x4000 { ; RW data, USB RAM .ANY (AHBSRAM0) } + RW_IRAM3 0x20080000 0x4000 { ; RW data, ETH RAM .ANY (AHBSRAM1) } + RW_IRAM4 0x40038000 0x0800 { ; RW data, CAN RAM .ANY (CANRAM) } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/startup_LPC17xx.S b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/startup_LPC17xx.S index 01b19858c3..0b5e53eb0a 100644 --- a/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/startup_LPC17xx.S +++ b/targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_ARM_MICRO/startup_LPC17xx.S @@ -19,25 +19,10 @@ ; * ; *****************************************************************************/ -Stack_Size EQU 0x00000400 - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10008000 ; Top of RAM from LPC1768 -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_ARM_MICRO/LPC812.sct b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_ARM_MICRO/LPC812.sct index 59bde75102..b5cf68bbd5 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_ARM_MICRO/LPC812.sct +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_ARM_MICRO/LPC812.sct @@ -1,14 +1,48 @@ +#! armcc -E -LR_IROM1 0x00000000 0x4000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x4000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 16K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x4000 +#endif + +; 4KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00001000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0xF40 - RW_IRAM1 0x100000C0 0xF40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S index 967a3c4dbf..61323aa741 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S @@ -20,33 +20,9 @@ ; *****************************************************************************/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000200 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10001000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_ARM_MICRO/LPC810.sct b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_ARM_MICRO/LPC810.sct index 84f5f32f5e..b1a842168c 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_ARM_MICRO/LPC810.sct +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_ARM_MICRO/LPC810.sct @@ -1,14 +1,48 @@ +#! armcc -E -LR_IROM1 0x00000000 0x1000 { ; load region size_region (4k) - ER_IROM1 0x00000000 0x1000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 4K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x1000 +#endif + +; 1KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x400 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 0xC0 - ; 1KB(0x0400) - 0xC0 = 0x340 - RW_IRAM1 (0x10000000+0xC0) (0x400-0xC0) { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S index 816264f05b..23256d2e28 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S @@ -20,33 +20,9 @@ ; *****************************************************************************/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000200 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10000400 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_ARM_MICRO/LPC812.sct b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_ARM_MICRO/LPC812.sct index 59bde75102..56c65f3f9e 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_ARM_MICRO/LPC812.sct +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_ARM_MICRO/LPC812.sct @@ -1,14 +1,48 @@ +#! armcc -E -LR_IROM1 0x00000000 0x4000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x4000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x4000 +#endif + +; 4KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00001000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0xF40 - RW_IRAM1 0x100000C0 0xF40 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S index 967a3c4dbf..61323aa741 100644 --- a/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S +++ b/targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S @@ -20,33 +20,9 @@ ; *****************************************************************************/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000200 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x10001000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_ARM_MICRO/LPC824.sct b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_ARM_MICRO/LPC824.sct index 310aa82197..8738dd7043 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_ARM_MICRO/LPC824.sct +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_ARM_MICRO/LPC824.sct @@ -1,14 +1,48 @@ +#! armcc -E -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x8000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 32K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 4KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x2000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x10000000+0xC0 0x2000-0xC0 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S index a90d8d290e..b59bdf7753 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S @@ -20,30 +20,9 @@ ; *****************************************************************************/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x10002000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_ARM_MICRO/LPC824.sct b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_ARM_MICRO/LPC824.sct index 310aa82197..8738dd7043 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_ARM_MICRO/LPC824.sct +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_ARM_MICRO/LPC824.sct @@ -1,14 +1,48 @@ +#! armcc -E -LR_IROM1 0x00000000 0x8000 { ; load region size_region (32k) - ER_IROM1 0x00000000 0x8000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +; 32K flash +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 4KB +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x10000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x2000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0 - ; 8KB - 0xC0 = 0x1F40 - RW_IRAM1 0x10000000+0xC0 0x2000-0xC0 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S index a90d8d290e..b59bdf7753 100644 --- a/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S +++ b/targets/TARGET_NXP/TARGET_LPC82X/TARGET_SSCI824/device/TOOLCHAIN_ARM_MICRO/startup_LPC8xx.S @@ -20,30 +20,9 @@ ; *****************************************************************************/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x10002000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000000 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f051x8.S b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f051x8.S index fedb462f5f..e8f7595f38 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f051x8.S +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f051x8.S @@ -37,35 +37,10 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20002000 ; Top of RAM (8 KB for STM32F030R8) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct index 6470bf465f..7ec91911cd 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F030R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - LR_IROM1 0x08000000 0x10000 { ; load region size_region - ER_IROM1 0x08000000 0x10000 { ; load address = execution address +; STM32F030R8: 64KB FLASH (0x10000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif + +; 8KB RAM (0x2000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x2000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.S b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.S index f83bb9d453..fb2b99dd94 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.S +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f030x8.S @@ -27,35 +27,8 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20002000 ; Top of RAM (8 KB for STM32F030R8) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct index b27a5246bc..e44a9a7d62 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -26,20 +27,49 @@ ; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif -; STM32F030R8: 64KB FLASH (0x10000) + 8KB RAM (0x2000) +; STM32F030R8: 64KB FLASH (0x10000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif - LR_IROM1 0x08000000 0x10000 { ; load region size_region - ER_IROM1 0x08000000 0x10000 { ; load address = execution address +; 8KB RAM (0x2000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x2000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 45 vectors = 180 bytes (0xB4) 8-byte aligned = 0xB8 (0xB4 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0xB8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 45 vectors = 180 bytes (0xB4) 8-byte aligned = 0xB8 (0xB4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0xB8) (0x2000-0xB8) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32f031x6.S b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32f031x6.S index c46d4079c5..ac23206062 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32f031x6.S +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32f031x6.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20001000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct index e8afe05f15..c93e895d47 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; 32KB FLASH (0x8000) + 4KB RAM (0x1000) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - LR_IROM1 0x08000000 0x8000 { ; load region size_region - ER_IROM1 0x08000000 0x8000 { ; load address = execution address +; 32KB FLASH (0x8000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 4KB RAM (0x1000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x1000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 44 vectors = 176 bytes (0xB0) to be reserved in RAM +#define VECTOR_SIZE 0xB0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } -; 44 vectors = 176 bytes (0xB0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xB0) (0x1000-0xB0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32f042x6.S b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32f042x6.S index 588b14a2b1..af9dc49cf5 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32f042x6.S +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32f042x6.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20001800 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct index 1a52debd8a..cda7590dea 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_ARM_MICRO/stm32f0xx.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; 32KB FLASH (0x8000) + 6KB RAM (0x1800) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - LR_IROM1 0x08000000 0x8000 { ; load region size_region - ER_IROM1 0x08000000 0x8000 { ; load address = execution address +; 32KB FLASH (0x8000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 6KB RAM (0x1800) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x1800 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } -; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x1800-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f070xb.S b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f070xb.S index 4c5c3ddb3d..2070432140 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f070xb.S +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f070xb.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20004000 ; Top of RAM (16KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_MICRO/stm32f070xb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_MICRO/stm32f070xb.sct index d6531bd026..7adc14cd92 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_MICRO/stm32f070xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_ARM_MICRO/stm32f070xb.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F070RB: 128KB FLASH (0x20000) + 16KB RAM (0x4000) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - LR_IROM1 0x08000000 0x20000 { ; load region size_region - ER_IROM1 0x08000000 0x20000 { ; load address = execution address +; STM32F070RB: 128KB FLASH (0x20000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +; 16KB RAM (0x4000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x4000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f072xb.S b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f072xb.S index d1a1f2fac6..566b2ac6fc 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f072xb.S +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f072xb.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20004000 ; Top of RAM (16KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_MICRO/stm32f072rb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_MICRO/stm32f072rb.sct index e0e5a5f5aa..5cfd69c7ef 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_MICRO/stm32f072rb.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_ARM_MICRO/stm32f072rb.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F072RB: 128KB FLASH (0x20000) + 16KB RAM (0x4000) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - LR_IROM1 0x08000000 0x20000 { ; load region size_region - ER_IROM1 0x08000000 0x20000 { ; load address = execution address +; STM32F072RB: 128KB FLASH (0x20000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +; 16KB RAM (0x4000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x4000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x4000-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_MICRO/startup_stm32f091xc.S b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_MICRO/startup_stm32f091xc.S index 2df3392971..ca8d709e93 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_MICRO/startup_stm32f091xc.S +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_MICRO/startup_stm32f091xc.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM (32KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_MICRO/stm32f091rc.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_MICRO/stm32f091rc.sct index c0680f17a4..5063b86b1c 100644 --- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_MICRO/stm32f091rc.sct +++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_ARM_MICRO/stm32f091rc.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F091RC: 256KB FLASH (0x40000) + 32KB RAM (0x8000) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - LR_IROM1 0x08000000 0x40000 { ; load region size_region - ER_IROM1 0x08000000 0x40000 { ; load address = execution address +; 256KB FLASH (0x40000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB RAM (0x8000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x8000-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f100xb.S b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f100xb.S index f199deccae..a22be693cd 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f100xb.S +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f100xb.S @@ -41,35 +41,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20002000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_MICRO/stm32f100xb.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_MICRO/stm32f100xb.sct index 1f5e03a267..c6a437e689 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_MICRO/stm32f100xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_DISCO_F100RB/device/TOOLCHAIN_ARM_MICRO/stm32f100xb.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -27,18 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x20000 { ; load address = execution address +; 128K FLASH (0x20000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +; 320KB SRAM (0x50000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x2000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 77 vectors (16 core + 61 peripheral) * 4 bytes = 308 bytes to reserve (0x134) 8-byte aligned = 0x138 +#define VECTOR_SIZE 0x138 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 77 vectors (16 core + 61 peripheral) * 4 bytes = 308 bytes to reserve (0x134) 8-byte aligned = 0x138 - RW_IRAM1 (0x20000000+0x138) (0x2000-0x138) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f103xb.S b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f103xb.S index 0a1703d0b7..408c68b8c2 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f103xb.S +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f103xb.S @@ -41,35 +41,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20005000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_MICRO/stm32f103xb.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_MICRO/stm32f103xb.sct index 16e960ce80..8e4341f88a 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_MICRO/stm32f103xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_MICRO/stm32f103xb.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -27,18 +28,48 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x20000 { ; load address = execution address +; 128K FLASH (0x20000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x5000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0 +#define VECTOR_SIZE 0xF0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 59 vectors (16 core + 43 peripheral) * 4 bytes = 236 bytes to reserve (0xEC) 8-byte aligned = 0xF0 - RW_IRAM1 (0x20000000+0xF0) (0x5000-0xF0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_STD/stm32f103xb.sct b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_STD/stm32f103xb.sct index 095042b3fa..2f1f242d6d 100644 --- a/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_STD/stm32f103xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_ARM_STD/stm32f103xb.sct @@ -47,6 +47,9 @@ LR_IROM1 0x08000000 0x20000 { ; load region size_region (128K) .ANY (+RW +ZI) } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (0x20000000+0x5000-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)-0xF0) { + } + ARM_LIB_STACK (0x20000000+0x5000) EMPTY -Stack_Size { ; stack } } diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f207xx.S b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f207xx.S index 2d470b33d5..8b2c23b3b6 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f207xx.S +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f207xx.S @@ -38,34 +38,7 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size -__initial_sp EQU 0x20020000 ; Top of RAM - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) +__initial_sp EQU 0x20020000 PRESERVE8 THUMB @@ -409,7 +382,6 @@ HASH_RNG_IRQHandler ENDP ALIGN - - END + END ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_MICRO/stm32f207xx.sct b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_MICRO/stm32f207xx.sct index a0588868b4..214e206bf4 100644 --- a/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_MICRO/stm32f207xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_ARM_MICRO/stm32f207xx.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -27,16 +28,47 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -LR_IROM1 0x08000000 0x00100000 { ; load region size_region - ER_IROM1 0x08000000 0x00100000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x100000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00020000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 97 vectors * 4 bytes = 388 bytes to reserve (0x184) 8-byte aligned = 0x188 (0x184 + 0x4) +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 97 vectors * 4 bytes = 388 bytes to reserve (0x184) 8-byte aligned = 0x188 - RW_IRAM1 (0x20000000+0x188) (0x00020000-0x188) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f302x8.S b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f302x8.S index 91f258d91d..958d0df458 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f302x8.S +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f302x8.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20004000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_MICRO/stm32f302x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_MICRO/stm32f302x8.sct index ce98168126..6dac6d6b6f 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_MICRO/stm32f302x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_ARM_MICRO/stm32f302x8.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F302R8: 64KB FLASH + 16KB SRAM -LR_IROM1 0x08000000 0x10000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x10000 { ; load address = execution address +; STM32F302R8: 64KB FLASH +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif + +; 16KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x4000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 98 vectors (16 core + 82 peripheral) * 4 bytes = 392 bytes to reserve (0x188) +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 98 vectors (16 core + 82 peripheral) * 4 bytes = 392 bytes to reserve (0x188) - RW_IRAM1 (0x20000000+0x188) (0x4000-0x188) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303x8.S b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303x8.S index 6c825a9124..f2680b9f35 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303x8.S +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303x8.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20003000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_MICRO/stm32f303x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_MICRO/stm32f303x8.sct index 64a32c381d..a25dbbb503 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_MICRO/stm32f303x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_MICRO/stm32f303x8.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F303K8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000) -LR_IROM1 0x08000000 0x10000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x10000 { ; load address = execution address +; STM32F303K8: 64KB FLASH (0x10000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif + +12KB SRAM (0x3000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x3000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_STD/startup_stm32f303x8.S b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_STD/startup_stm32f303x8.S index f2680b9f35..6c825a9124 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_STD/startup_stm32f303x8.S +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_ARM_STD/startup_stm32f303x8.S @@ -37,8 +37,35 @@ ; ;******************************************************************************* +; Amount of memory (in bytes) allocated for Stack +; Tailor this value to your application needs +; Stack Configuration +; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 + EXPORT __initial_sp + +Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20003000 ; Top of RAM + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 + EXPORT __heap_base + EXPORT __heap_limit + +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit EQU (__initial_sp - Stack_Size) + PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303xc.S b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303xc.S index 65e8ae3427..7ad64b1bd7 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303xc.S +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303xc.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x2000A000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_MICRO/stm32f303xc.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_MICRO/stm32f303xc.sct index 34ec3266f7..668524fd58 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_MICRO/stm32f303xc.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_ARM_MICRO/stm32f303xc.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F303VC: 256KB FLASH (0x40000) + 40KB SRAM (0xA000) -LR_IROM1 0x08000000 0x40000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x40000 { ; load address = execution address +; STM32F303VC: 256KB FLASH (0x40000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 40KB SRAM (0xA000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0xA000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0xA000-0x188) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303xe.S b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303xe.S index 26f0486113..b92ea74bee 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303xe.S +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f303xe.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20010000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_MICRO/stm32f303xe.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_MICRO/stm32f303xe.sct index 678de5100c..44a38af5c8 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_MICRO/stm32f303xe.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_ARM_MICRO/stm32f303xe.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F303RE: 512KB FLASH (0x80000) + 64KB SRAM (0x10000) -LR_IROM1 0x08000000 0x80000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x80000 { ; load address = execution address +; STM32F303RE: 512KB FLASH (0x80000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x80000 +#endif + +;64KB SRAM (0x10000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x10000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x198 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x10000-0x198) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f334x8.S b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f334x8.S index 6cd22aa672..3beaea4f99 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f334x8.S +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32f334x8.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20003000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_MICRO/stm32f334x8.sct b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_MICRO/stm32f334x8.sct index ccc1af155d..c7a8d7e2f2 100644 --- a/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_MICRO/stm32f334x8.sct +++ b/targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_ARM_MICRO/stm32f334x8.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F334x8: 64KB FLASH (0x10000) + 12KB SRAM (0x3000) -LR_IROM1 0x08000000 0x10000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x10000 { ; load address = execution address +; STM32F334x8: 64KB FLASH (0x10000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif + +; 12KB SRAM (0x3000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x3000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x3000-0x188) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S index 94d0963f25..b9142a4689 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct index 491087ba47..4128983644 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -26,22 +27,51 @@ ; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; - -; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) ; FIRST 64 KB FLASH FOR BOOTLOADER ; REST 448 KB FLASH FOR APPLICATION -LR_IROM1 0x08010000 0x70000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08010000 +#endif - ER_IROM1 0x08010000 0x70000 { ; load address = execution address +; STM32F411RE: 512 KB FLASH (0x80000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x70000 +#endif + +; 128 KB SRAM (0x20000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x20000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM +#define VECTOR_SIZE 0x198 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S index 94d0963f25..b9142a4689 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct index 491087ba47..d72f82a9b2 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,21 +28,51 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) ; FIRST 64 KB FLASH FOR BOOTLOADER ; REST 448 KB FLASH FOR APPLICATION -LR_IROM1 0x08010000 0x70000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08010000 +#endif - ER_IROM1 0x08010000 0x70000 { ; load address = execution address +; STM32F411RE: 512 KB FLASH (0x80000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x70000 +#endif + +; 128 KB SRAM (0x20000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x20000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM +#define VECTOR_SIZE 0x198 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f405xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f405xx.S index 8953d2d95d..abd1b9b42e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f405xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f405xx.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_MICRO/stm32f405xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_MICRO/stm32f405xx.sct index c12b75bc26..913fdf7738 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_MICRO/stm32f405xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_ARM_MICRO/stm32f405xx.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F405RG: 1024KB FLASH + 128KB SRAM -LR_IROM1 0x08000000 0x100000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x100000 { ; load address = execution address +; STM32F405RG: 1024KB FLASH +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x100000 +#endif + +; 128KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x20000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x20000-0x188) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S index 94d0963f25..b9142a4689 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct index 491087ba47..d72f82a9b2 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,21 +28,51 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) ; FIRST 64 KB FLASH FOR BOOTLOADER ; REST 448 KB FLASH FOR APPLICATION -LR_IROM1 0x08010000 0x70000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08010000 +#endif - ER_IROM1 0x08010000 0x70000 { ; load address = execution address +; STM32F411RE: 512 KB FLASH (0x80000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x70000 +#endif + +; 128 KB SRAM (0x20000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x20000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM +#define VECTOR_SIZE 0x198 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x20000-0x198) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f401xe.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f401xe.S index 1a57cf195e..46ef820ddd 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f401xe.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f401xe.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20018000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_MICRO/stm32f401xe.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_MICRO/stm32f401xe.sct index a79f55ed73..acd65d10bc 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_MICRO/stm32f401xe.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_ARM_MICRO/stm32f401xe.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F401RE: 512KB FLASH + 96KB SRAM -LR_IROM1 0x08000000 0x80000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x80000 { ; load address = execution address +; STM32F401RE: 512KB FLASH +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x80000 +#endif + +; 96KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x18000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x198 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 101 vectors = 404 bytes (0x194) 8-byte aligned = 0x198 (0x194 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x198) (0x18000-0x198) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/STM32F407xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/STM32F407xx.sct index 7930116a81..d41c7e5e29 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/STM32F407xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/STM32F407xx.sct @@ -1,18 +1,55 @@ +#! armcc -E ; ***************************************** ; *** Scatter-Loading Description File *** ; ***************************************** -LR_IROM1 0x08000000 0x00100000 { ; load region size_region - ER_IROM1 0x08000000 0x00100000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00100000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00020000 +#endif + + +#define MBED_RAM2_START 0x10000000 +#define MBED_RAM2_SIZE 0x00010000 + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000188 0x0001FE78 { + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } - RW_IRAM2 0x10000000 0x00010000 { ; CCM + + RW_IRAM2 MBED_RAM2_START MBED_RAM2_SIZE { ; CCM .ANY (CCMRAM) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/startup_STM32F407xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/startup_STM32F407xx.S index 9c458c8407..3bbfee2648 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/startup_STM32F407xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_ARM_MICRO/startup_STM32F407xx.S @@ -37,36 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - - - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f410rx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f410rx.S index a848b876a9..5aabcd23b1 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f410rx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_MICRO/startup_stm32f410rx.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_MICRO/stm32f410xb.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_MICRO/stm32f410xb.sct index 48df4941ae..e70c06cb8f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_MICRO/stm32f410xb.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_ARM_MICRO/stm32f410xb.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,50 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F410RB: 128 KB FLASH (0x20000) + 32 KB SRAM (0x8000) -LR_IROM1 0x08000000 0x20000 { ; load region size_region - ER_IROM1 0x08000000 0x20000 { ; load address = execution address +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +; STM32F410RB: 128 KB FLASH (0x20000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +; 32 KB SRAM (0x8000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM +#define VECTOR_SIZE 0x1C8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C8) (0x8000-0x1C8) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S index 94d0963f25..b9142a4689 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f411xe.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct index 404e000a00..91a38c922e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_ARM_MICRO/stm32f411re.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,31 +28,58 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -#define MBED_RAM_START 0x20000000 -#define MBED_RAM_SIZE 0x20000 -#define MBED_VECTTABLE_RAM_START (MBED_RAM_START) -#define MBED_VECTTABLE_RAM_SIZE 0x198 -#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE) +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif + +; STM32F411RE: 512 KB FLASH (0x80000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x80000 +#endif + +; 128 KB SRAM (0x20000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x20000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM +#define VECTOR_SIZE 0x198 + #define MBED_CRASH_REPORT_RAM_SIZE 0x100 -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -; STM32F411RE: 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) -LR_IROM1 0x08000000 0x80000 { ; load region size_region +#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE) - ER_IROM1 0x08000000 0x80000 { ; load address = execution address + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE+MBED_CRASH_REPORT_RAM_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + + RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - ; Total: 102 vectors = 408 bytes (0x198) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f412zx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f412zx.S index d6f0155e0a..a0c7e341eb 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f412zx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f412zx.S @@ -37,35 +37,9 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20040000 ; Top of RAM 256K -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/stm32f412xg.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/stm32f412xg.sct index b51b0c4dfb..eeac5425e5 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/stm32f412xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_ARM_MICRO/stm32f412xg.sct @@ -29,26 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; STM32F412ZG: 1024 KB FLASH (0x100000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -; STM32F412ZG: 1024 KB FLASH (0x100000) + 256 KB SRAM (0x40000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 256 KB SRAM (0x40000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x40000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 113 vectors = 452 bytes (0x1C4) 8-byte aligned = 0x1C8 (0x1C4 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x1C8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 113 vectors = 452 bytes (0x1C4) 8-byte aligned = 0x1C8 (0x1C4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C8) (0x40000-0x1C8) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_MICRO/startup_stm32f413xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_MICRO/startup_stm32f413xx.S index 803ae286a9..1fa99ecc44 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_MICRO/startup_stm32f413xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_MICRO/startup_stm32f413xx.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20050000 ; Top of RAM 320K - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_MICRO/stm32f413xh.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_MICRO/stm32f413xh.sct index 927d555ac5..969cf89f7e 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_MICRO/stm32f413xh.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_ARM_MICRO/stm32f413xh.sct @@ -29,27 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif ; 1536KB FLASH (0x180000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x180000 + #define MBED_APP_SIZE 0x180000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 320KB SRAM (0x50000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00050000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 118 vectors = 472 bytes (0x1D8) to be reserved in RAM +#define VECTOR_SIZE 0x1D8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 320KB SRAM (0x50000) - ; Total: 118 vectors = 472 bytes (0x1D8) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1D8) (0x50000-0x1D8) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f429xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f429xx.S index 11e063466f..480a152033 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f429xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f429xx.S @@ -37,39 +37,11 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB - ; Vector Table Mapped to Address 0 at Reset AREA RESET, DATA, READONLY EXPORT __Vectors diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/stm32f429xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/stm32f429xx.sct index b1faff5db3..422d9b4d87 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/stm32f429xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_ARM_MICRO/stm32f429xx.sct @@ -29,38 +29,55 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 2 MB FLASH (0x200000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x200000 #endif -#define MBED_RAM_START 0x20000000 -#define MBED_RAM_SIZE 0x20000 -#define MBED_VECTTABLE_RAM_START (MBED_RAM_START) -#define MBED_VECTTABLE_RAM_SIZE 0x1B0 -#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE) +;256 KB SRAM (0x30000 + 0x10000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x30000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x1B0 + #define MBED_CRASH_REPORT_RAM_SIZE 0x100 -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -; 2 MB FLASH (0x200000) + 256 KB SRAM (0x40000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + + RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - - ; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data + + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f439xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f439xx.S index 53f3030ebb..6f5706f6ec 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f439xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f439xx.S @@ -43,29 +43,9 @@ ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20030000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct index b608da9788..620d8bc1d2 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_ARM_MICRO/stm32f439xx.sct @@ -29,41 +29,63 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; STM32F439xI: 2048 KB FLASH (0x200000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x200000 #endif -#define MBED_RAM_START 0x20000000 -#define MBED_RAM_SIZE 0x30000 -#define MBED_VECTTABLE_RAM_START (MBED_RAM_START) -#define MBED_VECTTABLE_RAM_SIZE 0x1B0 -#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE) +;256 KB SRAM (0x30000 + 0x10000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x30000 +#endif + + +#define MBED_RAM2_START 0x10000000 +#define MBED_RAM2_SIZE 0x10000 + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be used +; should match ER_IROM1::RESET/4 and cmsis_nvic.h::NVIC_NUM_VECTORS +#define VECTOR_SIZE 0x1B0 + #define MBED_CRASH_REPORT_RAM_SIZE 0x100 -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -; STM32F439xI: 2048 KB FLASH (0x200000) + 256 KB SRAM (0x30000 + 0x10000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + + RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - ; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be used - ; should match ER_IROM1::RESET/4 and cmsis_nvic.h::NVIC_NUM_VECTORS - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } - RW_IRAM2 (0x10000000) 0x10000 { + + RW_IRAM2 MBED_RAM2_START MBED_RAM2_SIZE { .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f446xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f446xx.S index a8ced2e15f..6afb322d2f 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f446xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_MICRO/startup_stm32f446xx.S @@ -35,35 +35,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_MICRO/stm32f446xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_MICRO/stm32f446xx.sct index 34db519641..e345b7eba2 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_MICRO/stm32f446xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F446xE/device/TOOLCHAIN_ARM_MICRO/stm32f446xx.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; 512 KB FLASH (0x80000) + 128 KB SRAM (0x20000) -LR_IROM1 0x08000000 0x80000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x80000 { ; load address = execution address +; 512 KB FLASH (0x80000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x80000 +#endif + +; 128 KB SRAM (0x20000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x20000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 113 vectors = 452 bytes (0x1C4) 8-byte aligned = 0x1C8 (0x1C4 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x1C8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 113 vectors = 452 bytes (0x1C4) 8-byte aligned = 0x1C8 (0x1C4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C8) (0x20000-0x1C8) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f469xx.S b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f469xx.S index 31f4eacd6d..4dced2800d 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f469xx.S +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f469xx.S @@ -37,35 +37,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20050000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_MICRO/stm32f469xx.sct b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_MICRO/stm32f469xx.sct index e52b92d4d5..8bd09412ac 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_MICRO/stm32f469xx.sct +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F469xI/device/TOOLCHAIN_ARM_MICRO/stm32f469xx.sct @@ -29,26 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 2 MB FLASH (0x200000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x200000 #endif -; 2 MB FLASH (0x200000) + 320 KB SRAM (0x50000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 320 KB SRAM (0x50000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00050000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 109 vectors = 436 bytes (0x1B4) 8-byte aligned = 0x1B8 (0x1B4 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x1B8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 109 vectors = 436 bytes (0x1B4) 8-byte aligned = 0x1B8 (0x1B4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1B8) (0x50000-0x1B8) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f746xg.S b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f746xg.S index b2326dcd07..4e25bfa2a8 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f746xg.S +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f746xg.S @@ -39,35 +39,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20050000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct index 2e88924207..1375d4ef80 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F746xG/device/TOOLCHAIN_ARM_MICRO/stm32f746xg.sct @@ -29,38 +29,54 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; STM32F746NG: 1024 KB FLASH (0x100000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -#define MBED_RAM_START 0x20000000 -#define MBED_RAM_SIZE 0x50000 -#define MBED_VECTTABLE_RAM_START (MBED_RAM_START) -#define MBED_VECTTABLE_RAM_SIZE 0x1C8 -#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE) +; 320 KB SRAM (0x50000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00050000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM +#define VECTOR_SIZE 0x1C8 #define MBED_CRASH_REPORT_RAM_SIZE 0x100 -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -; STM32F746NG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + + RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - ; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f756xg.S b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f756xg.S index fc0aac42d9..56b8182c2c 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f756xg.S +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32f756xg.S @@ -39,35 +39,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20050000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/stm32f756xg.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/stm32f756xg.sct index 9a1931a564..d9e90cd8de 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/stm32f756xg.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F756xG/device/TOOLCHAIN_ARM_MICRO/stm32f756xg.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -27,19 +28,55 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F756ZG: 1024 KB FLASH (0x100000) + 320 KB SRAM (0x50000) -LR_IROM1 0x08000000 0x100000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x100000 { ; load address = execution address +; STM32F756xG: 1024 KB FLASH (0x100000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x100000 +#endif + +; 320KB SRAM (0x50000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00050000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM +#define VECTOR_SIZE 0x1C8 +#define MBED_CRASH_REPORT_RAM_SIZE 0x100 +#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE) + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 114 vectors = 456 bytes (0x1C8) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C8) (0x50000-0x1C8) { ; RW data + RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + } + + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f767xx.S b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f767xx.S index 8b78b9c923..ea3cbc2713 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f767xx.S +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f767xx.S @@ -39,35 +39,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20080000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/stm32f767xi.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/stm32f767xi.sct index c7cfd9e04a..c2e0bec53d 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/stm32f767xi.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/device/TOOLCHAIN_ARM_MICRO/stm32f767xi.sct @@ -29,38 +29,54 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; STM32F767ZI: 2048 KB FLASH (0x200000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x200000 #endif -#define MBED_RAM_START 0x20000000 -#define MBED_RAM_SIZE 0x80000 -#define MBED_VECTTABLE_RAM_START (MBED_RAM_START) -#define MBED_VECTTABLE_RAM_SIZE 0x1F8 -#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE) +; 512 KB SRAM (0x80000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x80000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM +#define VECTOR_SIZE 0x1F8 #define MBED_CRASH_REPORT_RAM_SIZE 0x100 -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -; STM32F767ZI: 2048 KB FLASH (0x200000) + 512 KB SRAM (0x80000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + + RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - ; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f769xx.S b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f769xx.S index 1c591e6e56..26b00270d1 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f769xx.S +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32f769xx.S @@ -39,35 +39,8 @@ ; ;******************************************************************************* -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20080000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_MICRO/stm32f769xi.sct b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_MICRO/stm32f769xi.sct index 595ae7f834..8a2d157460 100644 --- a/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_MICRO/stm32f769xi.sct +++ b/targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F769xI/device/TOOLCHAIN_ARM_MICRO/stm32f769xi.sct @@ -29,27 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif -; 2048 KB FLASH (0x200000) +; STM32F767ZI: 2048 KB FLASH (0x200000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x200000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 512 KB SRAM (0x80000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x80000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 126 vectors = 504 bytes (0x1F8) to be reserved in RAM +#define VECTOR_SIZE 0x1F8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 512KB SRAM (0x80000) - ; Total: 126 vectors = 504 bytes (0x1F8 + 0 byte for 8-byte data alignment) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1F8) (0x80000-0x1F8) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32h743xx.S b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32h743xx.S index 58803eae15..7e46c30b4b 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32h743xx.S +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32h743xx.S @@ -24,34 +24,7 @@ ;* ;****************************************************************************** -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size -__initial_sp EQU 0x20020000 ; Top of AXI RAM - - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) +__initial_sp EQU 0x20020000 ; Top of RAM PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/stm32h743xI.sct b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/stm32h743xI.sct index 044fa0353b..138c4e2f17 100644 --- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/stm32h743xI.sct +++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/device/TOOLCHAIN_ARM_MICRO/stm32h743xI.sct @@ -28,39 +28,55 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32F767ZI: 2048KB FLASH (0x200000) + 128KB DTCM RAM (0x20000) -; 166 vectors = 664 bytes (0x298) to be reserved in RAM - #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; STM32F743xl: 2048KB FLASH (0x200000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x200000 #endif -#define MBED_RAM_START 0x20000000 -#define MBED_RAM_SIZE 0x20000 -#define MBED_VECTTABLE_RAM_START (MBED_RAM_START) -#define MBED_VECTTABLE_RAM_SIZE 0x298 -#define MBED_CRASH_REPORT_RAM_START (MBED_VECTTABLE_RAM_START + MBED_VECTTABLE_RAM_SIZE) +; 128KB DTCM RAM (0x20000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x20000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 166 vectors = 664 bytes (0x298) to be reserved in RAM +#define VECTOR_SIZE 0x298 #define MBED_CRASH_REPORT_RAM_SIZE 0x100 -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_START (MBED_RAM_START + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - VECTOR_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + VECTOR_SIZE + MBED_CRASH_REPORT_RAM_SIZE) - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + + RW_m_crash_data (MBED_RAM_START+VECTOR_SIZE) EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - RW_IRAM1 (MBED_RAM0_START) (MBED_RAM0_SIZE) { ; RW data + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/device/TOOLCHAIN_ARM_MICRO/startup_stm32l011xx.S b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/device/TOOLCHAIN_ARM_MICRO/startup_stm32l011xx.S index bac2c1a396..89135bcc62 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/device/TOOLCHAIN_ARM_MICRO/startup_stm32l011xx.S +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/device/TOOLCHAIN_ARM_MICRO/startup_stm32l011xx.S @@ -37,36 +37,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;* ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20000800 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/device/TOOLCHAIN_ARM_MICRO/stm32l011k4.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/device/TOOLCHAIN_ARM_MICRO/stm32l011k4.sct index ebc9defa2a..8342af5d2a 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/device/TOOLCHAIN_ARM_MICRO/stm32l011k4.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L011K4/device/TOOLCHAIN_ARM_MICRO/stm32l011k4.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,18 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32L053C8: 16KB FLASH (0x4000) + 2KB RAM (0x800) -LR_IROM1 0x08000000 0x4000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x4000 { ; load address = execution address +; STM32L053C8: 16KB FLASH (0x4000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x4000 +#endif + +; 2KB RAM (0x800) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x800 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x800-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32l031xx.S b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32l031xx.S index 83190a4516..f3262a99b5 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32l031xx.S +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_MICRO/startup_stm32l031xx.S @@ -37,36 +37,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;* ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20002000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB @@ -127,7 +100,7 @@ __Vectors DCD __initial_sp ; Top of Stack DCD LPUART1_IRQHandler ; LPUART1 DCD 0 ; Reserved DCD 0 ; Reserved - + __Vectors_End __Vectors_Size EQU __Vectors_End - __Vectors @@ -138,7 +111,7 @@ __Vectors_Size EQU __Vectors_End - __Vectors Reset_Handler PROC EXPORT Reset_Handler [WEAK] IMPORT __main - IMPORT SystemInit + IMPORT SystemInit LDR R0, =SystemInit BLX R0 LDR R0, =__main @@ -203,7 +176,7 @@ EXTI4_15_IRQHandler DMA1_Channel1_IRQHandler DMA1_Channel2_3_IRQHandler DMA1_Channel4_5_6_7_IRQHandler -ADC1_COMP_IRQHandler +ADC1_COMP_IRQHandler LPTIM1_IRQHandler TIM2_IRQHandler TIM21_IRQHandler diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_MICRO/stm32l031k6.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_MICRO/stm32l031k6.sct index dc8e7b2b03..6adc5aa41a 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_MICRO/stm32l031k6.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L031K6/device/TOOLCHAIN_ARM_MICRO/stm32l031k6.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2016, STMicroelectronics @@ -27,18 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32L031K6: 32KB FLASH (0x8000) + 8KB RAM (0x2000) -LR_IROM1 0x08000000 0x8000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x8000 { ; load address = execution address +; STM32L031K6: 32KB FLASH (0x8000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x8000 +#endif + +; 8KB RAM (0x2000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x2000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l073xx.S b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l073xx.S index 80bc3ca784..b6fc856ea4 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l073xx.S +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l073xx.S @@ -37,36 +37,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;* ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20005000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/stm32l073xz.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/stm32l073xz.sct index 1f65532ed8..dc1558c0cc 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/stm32l073xz.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_NUCLEO_L073RZ/device/TOOLCHAIN_ARM_MICRO/stm32l073xz.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -28,26 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif - #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x30000 +; STM32L073RZ: 192KB FLASH (0x30000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x30000 #endif -; STM32L073RZ: 192KB FLASH (0x30000) + 20KB RAM (0x5000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 20KB RAM (0x5000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x5000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.S b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.S index 35e90b1357..ab0d7758f5 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.S +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_MICRO/startup_stm32l053xx.S @@ -37,36 +37,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;* ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20002000 ; Top of RAM - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_MICRO/stm32l053x8.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_MICRO/stm32l053x8.sct index b805786e52..2e64941f5b 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_MICRO/stm32l053x8.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L053x8/device/TOOLCHAIN_ARM_MICRO/stm32l053x8.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,18 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; 64KB FLASH (0x10000) + 8KB RAM (0x2000) -LR_IROM1 0x08000000 0x10000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x10000 { ; load address = execution address +; 64KB FLASH (0x10000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x10000 +#endif + +; 8KB RAM (0x2000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x2000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x2000-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l072xx.S b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l072xx.S index f36d2dce03..653372010c 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l072xx.S +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_MICRO/startup_stm32l072xx.S @@ -37,36 +37,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;* ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20005000 ; Top of RAM TODO à verifier - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_MICRO/stm32l072xz.sct b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_MICRO/stm32l072xz.sct index 384ce7e075..de1d09005f 100644 --- a/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_MICRO/stm32l072xz.sct +++ b/targets/TARGET_STM/TARGET_STM32L0/TARGET_STM32L072xZ/device/TOOLCHAIN_ARM_MICRO/stm32l072xz.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32L072CZ: 192KB FLASH (0x30000) + 20KB RAM (0x5000) -LR_IROM1 0x08000000 0x30000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x30000 { ; load address = execution address +; STM32L072CZ: 192KB FLASH (0x30000) +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x30000 +#endif + +; 20KB RAM (0x5000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x5000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM +#define VECTOR_SIZE 0xC0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 48 vectors = 192 bytes (0xC0) to be reserved in RAM - RW_IRAM1 (0x20000000+0xC0) (0x5000-0xC0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.S b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.S index 86f894aab2..b2895cab8b 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.S +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l152xc.S @@ -1,4 +1,4 @@ -;******************** (C) COPYRIGHT 2017 STMicroelectronics ******************** +;********************* (C) COPYRIGHT 2017 STMicroelectronics ******************** ;* File Name : startup_stm32l152xc.s ;* Author : MCD Application Team ;* Version : 21-April-2017 @@ -41,36 +41,8 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM (32 KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_MICRO/stm32l152rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_MICRO/stm32l152rc.sct index 11dc550c08..fb3542c3ab 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_MICRO/stm32l152rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_MICRO/stm32l152rc.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32L152RC: 256KB FLASH + 32KB SRAM -LR_IROM1 0x08000000 0x40000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x40000 { ; load address = execution address +; STM32L152RC: 256KB FLASH +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00050000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x128 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x8000-0x128) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/startup_stm32l152xc.S b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/startup_stm32l152xc.S index 631ec43030..b77172f53d 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/startup_stm32l152xc.S +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/startup_stm32l152xc.S @@ -48,8 +48,29 @@ ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 + EXPORT __initial_sp + +Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM (32 KB) + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000400 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 + EXPORT __heap_base + EXPORT __heap_limit + +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit EQU (__initial_sp - Stack_Size) + PRESERVE8 THUMB @@ -312,3 +333,5 @@ COMP_ACQ_IRQHandler ALIGN END + +;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/stm32l152rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/stm32l152rc.sct index 227863ac5c..acf2b4ee8b 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/stm32l152rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device/TOOLCHAIN_ARM_STD/stm32l152rc.sct @@ -51,4 +51,3 @@ LR_IROM1 0x08000000 0x40000 { ; load region size_region ARM_LIB_STACK (0x20000000+0x8000) EMPTY -Stack_Size { ; stack } } - diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S index 32bce31f71..20585afa37 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S @@ -41,36 +41,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM (32 KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct index 3d94b6cfc6..7b625b8337 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_MTS_XDOT/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct @@ -29,27 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; STM32L151RC: 256KB FLASH #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x40000 + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 #endif -; STM32L151RC: 256KB FLASH + 32KB SRAM -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x128 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x8000-0x128) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xba.S b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xba.S index 56288362fa..7485692ad3 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xba.S +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xba.S @@ -41,36 +41,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM (32 KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_MICRO/stm32l151cba.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_MICRO/stm32l151cba.sct index 624f4e4c9a..faa62adce0 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_MICRO/stm32l151cba.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_MTB_RAK811/device/TOOLCHAIN_ARM_MICRO/stm32l151cba.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32L151CB: 128KB FLASH + 32KB SRAM -LR_IROM1 0x08000000 0x20000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x20000 { ; load address = execution address +; STM32L151CB: 128KB FLASH +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x20000 +#endif + +; 32KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 61 vectors = 244 bytes (0xF4) 8-byte aligned = 0xF8 (0xF4 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0xF8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 61 vectors = 244 bytes (0xF4) 8-byte aligned = 0xF8 (0xF4 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0xF8) (0x8000-0xF8) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S index 555f8d5079..8573688b26 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_MICRO/startup_stm32l152xe.S @@ -41,36 +41,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20014000 ; Top of RAM (80 KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_MICRO/stm32l152re.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_MICRO/stm32l152re.sct index 312faf2601..f87bec7dc7 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_MICRO/stm32l152re.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device/TOOLCHAIN_ARM_MICRO/stm32l152re.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2014, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32L152RE: 512KB FLASH + 80KB SRAM -LR_IROM1 0x08000000 0x80000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x80000 { ; load address = execution address +; STM32L152RE: 512KB FLASH +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x80000 +#endif + +; 80KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x14000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x128 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x14000-0x128) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S index 32bce31f71..20585afa37 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S @@ -41,36 +41,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM (32 KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct index bf27cf5fe2..7b625b8337 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct @@ -1,3 +1,4 @@ +#! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ; Copyright (c) 2015, STMicroelectronics @@ -27,19 +28,49 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; STM32L151RC: 256KB FLASH + 32KB SRAM -LR_IROM1 0x08000000 0x40000 { ; load region size_region +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x08000000 +#endif - ER_IROM1 0x08000000 0x40000 { ; load address = execution address +; STM32L151RC: 256KB FLASH +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x128 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x8000-0x128) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_STD/startup_stm32l151xc.S b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_STD/startup_stm32l151xc.S index e021cc8707..32bce31f71 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_STD/startup_stm32l151xc.S +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device/TOOLCHAIN_ARM_STD/startup_stm32l151xc.S @@ -48,7 +48,28 @@ ; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> ; -__initial_sp EQU 0x2008000 ; Top of RAM (32 KB) +Stack_Size EQU 0x00000400 + + AREA STACK, NOINIT, READWRITE, ALIGN=3 + EXPORT __initial_sp + +Stack_Mem SPACE Stack_Size +__initial_sp EQU 0x20008000 ; Top of RAM (32 KB) + + +; Heap Configuration +; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> +; + +Heap_Size EQU 0x00000200 + + AREA HEAP, NOINIT, READWRITE, ALIGN=3 + EXPORT __heap_base + EXPORT __heap_limit + +__heap_base +Heap_Mem SPACE Heap_Size +__heap_limit EQU (__initial_sp - Stack_Size) PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S index 32bce31f71..20585afa37 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l151xc.S @@ -41,36 +41,9 @@ ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ; ;******************************************************************************* -; -; Amount of memory (in bytes) allocated for Stack -; Tailor this value to your application needs -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 ; Top of RAM (32 KB) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000200 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit EQU (__initial_sp - Stack_Size) - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct index 3d94b6cfc6..7b625b8337 100644 --- a/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct +++ b/targets/TARGET_STM/TARGET_STM32L1/TARGET_XDOT_L151CC/device/TOOLCHAIN_ARM_MICRO/stm32l151rc.sct @@ -29,27 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; STM32L151RC: 256KB FLASH #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x40000 + #define MBED_APP_SIZE 0x40000 +#endif + +; 32KB SRAM +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x8000 #endif -; STM32L151RC: 256KB FLASH + 32KB SRAM -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x128 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; 73 vectors = 292 bytes (0x124) 8-byte aligned = 0x128 (0x124 + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x128) (0x8000-0x128) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l471xx.S b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l471xx.S index 34373f1357..b60bfa1549 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l471xx.S +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l471xx.S @@ -39,25 +39,8 @@ ; ;******************************************************************************* - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standby -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler) - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/stm32l471xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/stm32l471xx.sct index a657759b32..f9de655ca1 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/stm32l471xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_MTS_DRAGONFLY_L471QG/device/TOOLCHAIN_ARM_MICRO/stm32l471xx.sct @@ -28,30 +28,59 @@ ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 1MB FLASH (0x100000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +;128KB SRAM (0x20000) +; RW data 96k L4-SRAM1 +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00018000 +#endif + + +; RW data 32k L4-ECC-SRAM2 +#define MBED_RAM2_START 0x10000000 +#define MBED_RAM2_SIZE 0x08000 + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1 + RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE { .ANY (+RW +ZI) } - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby + + RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_START-MBED_RAM2_SIZE) { .ANY (+RW +ZI) } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } - diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l432xx.S b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l432xx.S index 1b39603255..a2f127a539 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l432xx.S +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l432xx.S @@ -39,25 +39,8 @@ ;* ;******************************************************************************* - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x20010000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x0F800 ; 62KB (64KB, -2*1KB for main thread and scheduler) - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/stm32l432xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/stm32l432xx.sct index 53e420abbe..1435253aef 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/stm32l432xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device/TOOLCHAIN_ARM_MICRO/stm32l432xx.sct @@ -1,7 +1,7 @@ #! armcc -E ; Scatter-Loading Description File ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Copyright (c) 2015, STMicroelectronics +; Copyright (c) 2019, STMicroelectronics ; All rights reserved. ; ; Redistribution and use in source and binary forms, with or without @@ -27,27 +27,49 @@ ; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE ; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; - #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 256KB FLASH (0x40000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x40000 + #define MBED_APP_SIZE 0x40000 #endif -; 256KB FLASH (0x40000) + 64KB SRAM (0x10000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 64KB SRAM (0x10000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x10000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x00010000-0x188) { - .ANY (+RW +ZI) + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + .ANY (+RW +ZI) } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l433xx.S b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l433xx.S index 895d8e662b..e8397decd9 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l433xx.S +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_MICRO/startup_stm32l433xx.S @@ -39,25 +39,8 @@ ;* ;******************************************************************************* - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x20010000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x0F800 ; 62KB (64KB, -2*1KB for main thread and scheduler) - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_MICRO/stm32l433xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_MICRO/stm32l433xx.sct index 53e420abbe..a58ee352aa 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_MICRO/stm32l433xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/TOOLCHAIN_ARM_MICRO/stm32l433xx.sct @@ -29,25 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 256KB FLASH (0x40000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x40000 + #define MBED_APP_SIZE 0x40000 #endif -; 256KB FLASH (0x40000) + 64KB SRAM (0x10000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 64KB SRAM (0x10000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x10000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM1 (0x20000000+0x188) (0x00010000-0x188) { - .ANY (+RW +ZI) + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data + .ANY (+RW +ZI) } + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l475xx.S b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l475xx.S index da453654a7..f897a1f1d5 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l475xx.S +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l475xx.S @@ -39,25 +39,8 @@ ; ;******************************************************************************* - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standby -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler) - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB @@ -403,4 +386,3 @@ FPU_IRQHandler END ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** - diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/stm32l475xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/stm32l475xx.sct index e9e36dc0f8..c4b4f97830 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/stm32l475xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_MICRO/stm32l475xx.sct @@ -29,38 +29,63 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 1MB FLASH (0x100000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -#define MBED_RAM_START 0x20000000 -#define MBED_RAM_SIZE 0x00018000 -#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START) +; 128KB SRAM (0x20000) +; RW data 96k L4-SRAM1 +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00018000 +#endif + + +; RW data 32k L4-ECC-SRAM2 +#define MBED_RAM2_START 0x10000000 +#define MBED_RAM2_SIZE 0x08000 + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 #define MBED_CRASH_REPORT_RAM_SIZE 0x100 -#define MBED_RAM0_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + MBED_CRASH_REPORT_RAM_SIZE) - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + RW_m_crash_data MBED_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE { ; RW data 96k L4-SRAM1 - .ANY (+RW +ZI) - } - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby + + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE) { + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } - diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S index 34373f1357..9eba6e1686 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l476xx.S @@ -39,25 +39,8 @@ ; ;******************************************************************************* - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standby -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler) - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB @@ -405,4 +388,3 @@ FPU_IRQHandler END ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** - diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct index 43ed3d0b1a..c4b4f97830 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L476xG/device/TOOLCHAIN_ARM_MICRO/stm32l476xx.sct @@ -29,40 +29,63 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 1MB FLASH (0x100000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -#define MBED_RAM_START 0x20000000 -#define MBED_RAM_SIZE 0x00018000 -#define MBED_CRASH_REPORT_RAM_START (MBED_RAM_START) +; 128KB SRAM (0x20000) +; RW data 96k L4-SRAM1 +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00018000 +#endif + + +; RW data 32k L4-ECC-SRAM2 +#define MBED_RAM2_START 0x10000000 +#define MBED_RAM2_SIZE 0x08000 + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 #define MBED_CRASH_REPORT_RAM_SIZE 0x100 -#define MBED_RAM0_START (MBED_CRASH_REPORT_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) -#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) -; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + MBED_CRASH_REPORT_RAM_SIZE) - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data + RW_m_crash_data MBED_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - - RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE { ; RW data 96k L4-SRAM1 - .ANY (+RW +ZI) - } - - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby + + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE) { + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } - diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l486xx.S b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l486xx.S index fd09220fa4..525d3289e0 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l486xx.S +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l486xx.S @@ -39,25 +39,8 @@ ; ;******************************************************************************* - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x20018000 ; Top of RAM, L4-ECC-SRAM2 retained in standby -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler) - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB @@ -407,4 +390,3 @@ FPU_IRQHandler END ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** - diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/stm32l486xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/stm32l486xx.sct index a657759b32..c4b4f97830 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/stm32l486xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/TOOLCHAIN_ARM_MICRO/stm32l486xx.sct @@ -29,29 +29,63 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 1MB FLASH (0x100000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -; 1MB FLASH (0x100000) + 128KB SRAM (0x20000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 128KB SRAM (0x20000) +; RW data 96k L4-SRAM1 +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00018000 +#endif + + +; RW data 32k L4-ECC-SRAM2 +#define MBED_RAM2_START 0x10000000 +#define MBED_RAM2_SIZE 0x08000 + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM +#define VECTOR_SIZE 0x188 +#define MBED_CRASH_REPORT_RAM_SIZE 0x100 +#define MBED_IRAM1_START (MBED_RAM_START + MBED_CRASH_REPORT_RAM_SIZE) +#define MBED_IRAM1_SIZE (MBED_RAM_SIZE - MBED_CRASH_REPORT_RAM_SIZE) + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE + MBED_CRASH_REPORT_RAM_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000000 0x00018000 { ; RW data 96k L4-SRAM1 - .ANY (+RW +ZI) + RW_m_crash_data MBED_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data } - ; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM - RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby + + RW_IRAM1 MBED_IRAM1_START MBED_IRAM1_SIZE { ; RW data .ANY (+RW +ZI) } + RW_IRAM2 (MBED_RAM2_START+VECTOR_SIZE) (MBED_RAM2_SIZE-VECTOR_SIZE) { + .ANY (+RW +ZI) + } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } - diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l496xx.S b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l496xx.S index ec2258b0d9..b233de792f 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l496xx.S +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/startup_stm32l496xx.S @@ -39,25 +39,8 @@ ;* ;******************************************************************************* - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x20050000 ; Top of RAM -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler) - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/stm32l496xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/stm32l496xx.sct index ccca682c94..602cb67b29 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/stm32l496xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/TOOLCHAIN_ARM_MICRO/stm32l496xx.sct @@ -29,25 +29,48 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 1MB FLASH (0x100000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x100000 + #define MBED_APP_SIZE 0x100000 #endif -; 1MB FLASH (0x100000) + 320KB SRAM (0x50000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 320KB SRAM (0x50000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00050000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM +#define VECTOR_SIZE 0x1B0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 107 vectors = 428 bytes (0x1AC) 8-byte aligned = 0x1B0 (0x1AC + 0x4) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1B0) (0x50000-0x1B0) { ; RW data 320k L4-SRAM1 + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32l4r5xx.S b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32l4r5xx.S index 17d2c86545..4524787e37 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32l4r5xx.S +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/startup_stm32l4r5xx.S @@ -37,25 +37,8 @@ ;* ;******************************************************************************* - AREA STACK, NOINIT, READWRITE, ALIGN=3 - EXPORT __initial_sp - __initial_sp EQU 0x200A0000 ; Top of RAM (640KB) -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x17800 ; 94KB (96KB, -2*1KB for main thread and scheduler) - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 - EXPORT __heap_base - EXPORT __heap_limit - -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - PRESERVE8 THUMB diff --git a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/stm32l4r5xx.sct b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/stm32l4r5xx.sct index 9e4682684e..d6c572afa6 100644 --- a/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/stm32l4r5xx.sct +++ b/targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L4R5xI/device/TOOLCHAIN_ARM_MICRO/stm32l4r5xx.sct @@ -29,24 +29,50 @@ ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; #if !defined(MBED_APP_START) - #define MBED_APP_START 0x08000000 + #define MBED_APP_START 0x08000000 #endif +; 2MB FLASH (0x200000) #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x200000 + #define MBED_APP_SIZE 0x200000 #endif -; 2MB FLASH (0x200000) + 640KB SRAM (0xA0000) -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region +; 640KB SRAM (0xA0000) +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0xA0000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +; Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM +#define VECTOR_SIZE 0x1C0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +#define Stack_Size MBED_BOOT_STACK_SIZE + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - ; Total: 111 vectors = 444 bytes (0x1BC) (+ 4 bytes for 8-byte alignment) to be reserved in RAM - RW_IRAM1 (0x20000000+0x1C0) (0xA0000-0x1C0) { ; RW data + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } + + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } } diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct index ce41a9ad0e..4191557099 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/efm32gg.sct @@ -4,21 +4,45 @@ ; ************************************************************* #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00100000 + #define MBED_APP_SIZE 0x00100000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00020000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define VECTOR_SIZE 0xE0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000E0 0x0001FF20 { ; RW data + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/startup_efm32gg.S b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/startup_efm32gg.S index 95c5bf612d..415c069fa6 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/startup_efm32gg.S +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32GG/device/TARGET_1024K/TOOLCHAIN_ARM_MICRO/startup_efm32gg.S @@ -25,29 +25,9 @@ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20020000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000C00 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -270,7 +250,5 @@ EMU_IRQHandler ; User Initial Stack & Heap EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit END diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct index b31dbbe37f..b6bf81b69b 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/efm32hg.sct @@ -4,21 +4,45 @@ ; ************************************************************* #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00010000 + #define MBED_APP_SIZE 0x00010000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00002000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define VECTOR_SIZE 0x98 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000098 0x00001F68 { ; RW data + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/startup_efm32hg.S b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/startup_efm32hg.S index f33871939f..9fdf69d9c0 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/startup_efm32hg.S +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32HG/device/TARGET_64K/TOOLCHAIN_ARM_MICRO/startup_efm32hg.S @@ -25,29 +25,8 @@ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20002000 - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x0 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -196,7 +175,5 @@ TIMER2_IRQHandler ; User Initial Stack & Heap EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit END diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32lg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32lg.sct index 3f502bbc80..87cbf04669 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32lg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32lg.sct @@ -4,21 +4,45 @@ ; ************************************************************* #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00040000 + #define MBED_APP_SIZE 0x00040000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00008000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define VECTOR_SIZE 0xE0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000E0 0x00007F20 { ; RW data + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32lg.S b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32lg.S index 393e37c2d5..29aa50bd7e 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32lg.S +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32LG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32lg.S @@ -25,29 +25,8 @@ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000C00 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -271,7 +250,5 @@ EMU_IRQHandler ; User Initial Stack & Heap EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit END diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32pg1b.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32pg1b.sct index 5019826e41..1029bf07f5 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32pg1b.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32pg1b.sct @@ -4,21 +4,45 @@ ; ************************************************************* #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00040000 + #define MBED_APP_SIZE 0x00040000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00008000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define VECTOR_SIZE 0xC8 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000C8 0x00007F38 { ; RW data + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32pg1b.S b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32pg1b.S index b0f83495ce..36976861ea 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32pg1b.S +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32PG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32pg1b.S @@ -25,29 +25,9 @@ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000C00 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -236,7 +216,5 @@ FPUEH_IRQHandler ; User Initial Stack & Heap EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit END diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32wg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32wg.sct index 3f502bbc80..87cbf04669 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32wg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/efm32wg.sct @@ -4,21 +4,45 @@ ; ************************************************************* #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00040000 + #define MBED_APP_SIZE 0x00040000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00008000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define VECTOR_SIZE 0xE0 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x200000E0 0x00007F20 { ; RW data + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32wg.S b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32wg.S index 73d97f2f91..f4e26992b4 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32wg.S +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32WG/device/TARGET_256K/TOOLCHAIN_ARM_MICRO/startup_efm32wg.S @@ -25,29 +25,9 @@ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20008000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000C00 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -273,7 +253,5 @@ FPUEH_IRQHandler ; User Initial Stack & Heap EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit END diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct index e3d88fc389..f4a89f7688 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/efm32zg.sct @@ -4,21 +4,45 @@ ; ************************************************************* #if !defined(MBED_APP_START) - #define MBED_APP_START 0x00000000 + #define MBED_APP_START 0x00000000 #endif #if !defined(MBED_APP_SIZE) - #define MBED_APP_SIZE 0x00008000 + #define MBED_APP_SIZE 0x00008000 #endif -LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region - ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00001000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define VECTOR_SIZE 0x90 + +#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE) + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000090 0x00000F70 { ; RW data + + RW_IRAM1 (MBED_RAM_START+VECTOR_SIZE) (MBED_RAM_SIZE-VECTOR_SIZE) { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/startup_efm32zg.S b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/startup_efm32zg.S index 8a11c00a23..8c484122ef 100644 --- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/startup_efm32zg.S +++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/TARGET_EFM32ZG/device/TARGET_32K/TOOLCHAIN_ARM_MICRO/startup_efm32zg.S @@ -25,29 +25,9 @@ ;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20001000 -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x0 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -187,7 +167,5 @@ AES_IRQHandler ; User Initial Stack & Heap EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit END diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_MICRO/W7500.sct b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_MICRO/W7500.sct index f9ead04667..044b6231cc 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_MICRO/W7500.sct +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_MICRO/W7500.sct @@ -1,15 +1,43 @@ -; ************************************************************* -; *** Scatter-Loading Description File generated by uVision *** -; ************************************************************* +#! armcc -E + +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00020000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00004000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define Stack_Size MBED_BOOT_STACK_SIZE + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address -LR_IROM1 0x00000000 0x00020000 { ; load region size_region - ER_IROM1 0x00000000 0x00020000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000000 0x00004000 { ; RW data + RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S index 124a5e65c8..5b161ed02e 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S @@ -27,29 +27,8 @@ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20004000 ; Top of RAM (16 KB for WIZwiki_W7500) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -204,10 +183,4 @@ EXTI_Handler ALIGN - - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - END diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_MICRO/W7500.sct b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_MICRO/W7500.sct index f9ead04667..044b6231cc 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_MICRO/W7500.sct +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_MICRO/W7500.sct @@ -1,15 +1,43 @@ -; ************************************************************* -; *** Scatter-Loading Description File generated by uVision *** -; ************************************************************* +#! armcc -E + +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00020000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00004000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define Stack_Size MBED_BOOT_STACK_SIZE + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address -LR_IROM1 0x00000000 0x00020000 { ; load region size_region - ER_IROM1 0x00000000 0x00020000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000000 0x00004000 { ; RW data + RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S index 124a5e65c8..5b161ed02e 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500ECO/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S @@ -27,29 +27,8 @@ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20004000 ; Top of RAM (16 KB for WIZwiki_W7500) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -204,10 +183,4 @@ EXTI_Handler ALIGN - - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - END diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_MICRO/W7500.sct b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_MICRO/W7500.sct index f9ead04667..044b6231cc 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_MICRO/W7500.sct +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_MICRO/W7500.sct @@ -1,15 +1,43 @@ -; ************************************************************* -; *** Scatter-Loading Description File generated by uVision *** -; ************************************************************* +#! armcc -E + +#if !defined(MBED_APP_START) + #define MBED_APP_START 0x00000000 +#endif + +#if !defined(MBED_APP_SIZE) + #define MBED_APP_SIZE 0x00020000 +#endif + +#if !defined(MBED_RAM_START) + #define MBED_RAM_START 0x20000000 +#endif + +#if !defined(MBED_RAM_SIZE) + #define MBED_RAM_SIZE 0x00004000 +#endif + + +#if !defined(MBED_BOOT_STACK_SIZE) + #define MBED_BOOT_STACK_SIZE 0x400 +#endif + +#define Stack_Size MBED_BOOT_STACK_SIZE + +LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region + + ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address -LR_IROM1 0x00000000 0x00020000 { ; load region size_region - ER_IROM1 0x00000000 0x00020000 { ; load address = execution address *.o (RESET, +First) *(InRoot$$Sections) .ANY (+RO) } - RW_IRAM1 0x20000000 0x00004000 { ; RW data + RW_IRAM1 MBED_RAM_START MBED_RAM_SIZE { ; RW data .ANY (+RW +ZI) } -} + ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_START + MBED_RAM_SIZE-Stack_Size-AlignExpr(ImageLimit(RW_IRAM1), 16)) { + } + + ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack + } +} diff --git a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S index 124a5e65c8..5b161ed02e 100644 --- a/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S +++ b/targets/TARGET_WIZNET/TARGET_W7500x/TARGET_WIZwiki_W7500P/device/TOOLCHAIN_ARM_MICRO/startup_W7500x.S @@ -27,29 +27,8 @@ ;*/ -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Stack_Size EQU 0x00000400 - - AREA STACK, NOINIT, READWRITE, ALIGN=3 -Stack_Mem SPACE Stack_Size __initial_sp EQU 0x20004000 ; Top of RAM (16 KB for WIZwiki_W7500) - -; Heap Configuration -; Heap Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - -Heap_Size EQU 0x00000400 - - AREA HEAP, NOINIT, READWRITE, ALIGN=3 -__heap_base -Heap_Mem SPACE Heap_Size -__heap_limit - - PRESERVE8 THUMB @@ -204,10 +183,4 @@ EXTI_Handler ALIGN - - - EXPORT __initial_sp - EXPORT __heap_base - EXPORT __heap_limit - END