ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

Merge pull request #10115 from enebular/raven 

Uhuru RAVEN: Adding platform HAL
pull/10317/head
Martin Kojtal 2019-04-04 11:05:23 +02:00 committed by GitHub
parent 8b5157ba47 cc6c4778da
commit 6081727cbf
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
11 changed files with 1001 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
components/storage/blockdevice/COMPONENT_SPIF/mbed_lib.json
View File

@ -56,6 +56,12 @@
"SPI_CLK": "PA_5",
"SPI_CS": "PB_12",
"SPI_FREQ": "20000000"
},
"UHURU_RAVEN": {
"SPI_MOSI": "PE_14",
"SPI_MISO": "PE_13",
"SPI_CLK": "PE_12",
"SPI_CS": "PE_11"
}
}
}

107
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_UHURU_RAVEN/PeripheralNames.h Normal file
View File

@ -0,0 +1,107 @@
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2016-2019, STMicroelectronics
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause-Clear
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H
#include "cmsis.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
ADC_1 = (int)ADC1_BASE,
ADC_2 = (int)ADC2_BASE,
ADC_3 = (int)ADC3_BASE
} ADCName;
typedef enum {
DAC_1 = DAC_BASE
} DACName;
typedef enum {
UART_1 = (int)USART1_BASE,
UART_2 = (int)USART2_BASE,
UART_3 = (int)USART3_BASE,
UART_4 = (int)UART4_BASE,
UART_5 = (int)UART5_BASE,
UART_6 = (int)USART6_BASE,
UART_7 = (int)UART7_BASE,
UART_8 = (int)UART8_BASE
} UARTName;
typedef enum {
SPI_1 = (int)SPI1_BASE,
SPI_2 = (int)SPI2_BASE,
SPI_3 = (int)SPI3_BASE,
SPI_4 = (int)SPI4_BASE,
SPI_5 = (int)SPI5_BASE,
SPI_6 = (int)SPI6_BASE
} SPIName;
typedef enum {
I2C_1 = (int)I2C1_BASE,
I2C_2 = (int)I2C2_BASE,
I2C_3 = (int)I2C3_BASE,
I2C_4 = (int)I2C4_BASE
} I2CName;
typedef enum {
PWM_1 = (int)TIM1_BASE,
PWM_2 = (int)TIM2_BASE,
PWM_3 = (int)TIM3_BASE,
PWM_4 = (int)TIM4_BASE,
PWM_5 = (int)TIM5_BASE,
PWM_8 = (int)TIM8_BASE,
PWM_9 = (int)TIM9_BASE,
PWM_10 = (int)TIM10_BASE,
PWM_11 = (int)TIM11_BASE,
PWM_12 = (int)TIM12_BASE,
PWM_13 = (int)TIM13_BASE,
PWM_14 = (int)TIM14_BASE
} PWMName;
typedef enum {
CAN_1 = (int)CAN1_BASE,
CAN_2 = (int)CAN2_BASE,
CAN_3 = (int)CAN3_BASE
} CANName;
typedef enum {
QSPI_1 = (int)QSPI_R_BASE,
} QSPIName;
#ifdef __cplusplus
}
#endif
#endif

155
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_UHURU_RAVEN/PeripheralPins.c Normal file
View File

@ -0,0 +1,155 @@
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2016-2019, STMicroelectronics
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause-Clear
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#include "PeripheralPins.h"
#include "mbed_toolchain.h"
// =============================================================================
// Notes:
// * Commented lines are alternative possibilities which are not used per default.
// If you change them, you will have also to modify the corresponding xxx_api.c file
// for pwmout, analogin, analogout, ...
// * Only the pins that are placed on the Arduino connector are described.
// =============================================================================
//*** ADC ***
MBED_WEAK const PinMap PinMap_ADC[] = {
{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 - Grove1_SIG2
{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 - Grove1_SIG1
{PA_6, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_IN6 - Grove2_SIG2
{PA_7, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_IN7 - Grove2_SIG1
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_ADC_Internal[] = {
{ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // See in analogin_api.c the correct ADC channel used
{ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // See in analogin_api.c the correct ADC channel used
{ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // See in analogin_api.c the correct ADC channel used
{NC, NC, 0}
};
//*** DAC ***
MBED_WEAK const PinMap PinMap_DAC[] = {
{NC, NC, 0}
};
//*** I2C ***
MBED_WEAK const PinMap PinMap_I2C_SDA[] = {
{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // - Grove4_SIG2
{PD_13, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, // - Grove3_SIG2
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
{PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, // - Grove4_SIG1
{PD_12, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)}, // - Grove3_SIG1
{NC, NC, 0}
};
//*** PWM ***
MBED_WEAK const PinMap PinMap_PWM[] = {
{PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 - Grove1_SIG2
{PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 - Grove1_SIG1
{PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 -Grove2_SIG2
{PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N -Grove2_SIG2
{PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 -Grove4_SIG1
{PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 -Grove4_SIG2
{NC, NC, 0}
};
//*** SERIAL ***
MBED_WEAK const PinMap PinMap_UART_TX[] = {
{PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // - Grove1_SIG2
{PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // - esp32 tx
{PB_14, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, // - esp32 tx (log)
{PD_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // STDIO_TX
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_UART_RX[] = {
{PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // - Grove1_SIG1
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // - esp32 rx
{PB_15, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, // - esp32 rx (log)
{PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // STDIO_RX
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_UART_RTS[] = {
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_UART_CTS[] = {
{NC, NC, 0}
};
//*** SPI ***
MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
{PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // - SD_SPI3_MOSI(ReservedPin)
{PE_14, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // - FLASH_SPI4_MOSI
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_SPI_MISO[] = {
{PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // - SD_SPI3_MISO/QSPI_CS(ReservedPin)
{PE_13, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // - FLASH_SPI4_MISO
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_SPI_SCLK[] = {
{PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // - SD_SPI3_SCK
{PE_12, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // FLASH_SPI4_SCK
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_SPI_SSEL[] = {
{PA_15, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // - SD_SPI3_SSEL
{PE_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, // - FLASH_SPI4_SSEL
{NC, NC, 0}
};
//*** CAN ***
MBED_WEAK const PinMap PinMap_CAN_RD[] = {
{PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // - Grove4_SIG1
{NC, NC, 0}
};
MBED_WEAK const PinMap PinMap_CAN_TD[] = {
{PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // - Grove4_SIG2
{NC, NC, 0}
};

178
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_UHURU_RAVEN/PinNames.h Normal file
View File

@ -0,0 +1,178 @@
/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2016-2019, STMicroelectronics
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause-Clear
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H
#include "cmsis.h"
#include "PinNamesTypes.h"
#ifdef __cplusplus
extern "C" {
#endif
typedef enum {
PA_0 = 0x00,
PA_1 = 0x01,
PA_2 = 0x02,
PA_3 = 0x03,
PA_4 = 0x04,
PA_5 = 0x05,
PA_6 = 0x06,
PA_7 = 0x07,
PA_8 = 0x08,
PA_9 = 0x09,
PA_10 = 0x0A,
PA_11 = 0x0B,
PA_12 = 0x0C,
PA_13 = 0x0D,
PA_14 = 0x0E,
PA_15 = 0x0F,
PB_0 = 0x10,
PB_1 = 0x11,
PB_2 = 0x12,
PB_3 = 0x13,
PB_4 = 0x14,
PB_5 = 0x15,
PB_6 = 0x16,
PB_7 = 0x17,
PB_8 = 0x18,
PB_9 = 0x19,
PB_10 = 0x1A,
PB_11 = 0x1B,
PB_12 = 0x1C,
PB_13 = 0x1D,
PB_14 = 0x1E,
PB_15 = 0x1F,
PC_0 = 0x20,
PC_1 = 0x21,
PC_2 = 0x22,
PC_3 = 0x23,
PC_4 = 0x24,
PC_5 = 0x25,
PC_6 = 0x26,
PC_7 = 0x27,
PC_8 = 0x28,
PC_9 = 0x29,
PC_10 = 0x2A,
PC_11 = 0x2B,
PC_12 = 0x2C,
PC_13 = 0x2D,
PC_14 = 0x2E,
PC_15 = 0x2F,
PD_0 = 0x30,
PD_1 = 0x31,
PD_2 = 0x32,
PD_3 = 0x33,
PD_4 = 0x34,
PD_5 = 0x35,
PD_6 = 0x36,
PD_7 = 0x37,
PD_8 = 0x38,
PD_9 = 0x39,
PD_10 = 0x3A,
PD_11 = 0x3B,
PD_12 = 0x3C,
PD_13 = 0x3D,
PD_14 = 0x3E,
PD_15 = 0x3F,
PE_0 = 0x40,
PE_1 = 0x41,
PE_2 = 0x42,
PE_3 = 0x43,
PE_4 = 0x44,
PE_5 = 0x45,
PE_6 = 0x46,
PE_7 = 0x47,
PE_8 = 0x48,
PE_9 = 0x49,
PE_10 = 0x4A,
PE_11 = 0x4B,
PE_12 = 0x4C,
PE_13 = 0x4D,
PE_14 = 0x4E,
PE_15 = 0x4F,
PH_0 = 0x70,
PH_1 = 0x71,
// ADC internal channels
ADC_TEMP = 0xF0,
ADC_VREF = 0xF1,
ADC_VBAT = 0xF2,
// STDIO for console print
#ifdef MBED_CONF_TARGET_STDIO_UART_TX
STDIO_UART_TX = MBED_CONF_TARGET_STDIO_UART_TX,
#else
STDIO_UART_TX = PD_8,
#endif
#ifdef MBED_CONF_TARGET_STDIO_UART_RX
STDIO_UART_RX = MBED_CONF_TARGET_STDIO_UART_RX,
#else
STDIO_UART_RX = PD_9,
#endif
// Generic signals namings
LED1 = PE_10, // LED_USER
LED2 = PE_10, // LED_USER
LED3 = PE_10, // LED_USER
LED4 = PE_10, // LED_USER
SW_USER = PC_13,
LED_USER = LED1,
USER_BUTTON = SW_USER,
// Standardized button names
BUTTON1 = USER_BUTTON,
SERIAL_TX = STDIO_UART_TX, // Virtual Com Port
SERIAL_RX = STDIO_UART_RX, // Virtual Com Port
USBTX = STDIO_UART_TX, // Virtual Com Port
USBRX = STDIO_UART_RX, // Virtual Com Port
I2C_SCL = PB_8,
I2C_SDA = PB_9,
SPI_MOSI = PE_14,
SPI_MISO = PE_13,
SPI_SCK = PE_12,
SPI_CS = PE_11,
PWM_OUT = PA_0,
// Not connected
NC = (int)0xFFFFFFFF
} PinName;
#ifdef __cplusplus
}
#endif
#endif

262
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_UHURU_RAVEN/system_clock.c Normal file
View File

@ -0,0 +1,262 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2019 ARM Limited
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/**
* This file configures the system clock as follows:
*--------------------------------------------------------------------
* System clock source | 1- USE_PLL_HSE_EXTC (external 8 MHz clock)
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
* | 3- USE_PLL_HSI (internal 16 MHz clock)
*--------------------------------------------------------------------
* SYSCLK(MHz) | 216
* AHBCLK (MHz) | 216
* APB1CLK (MHz) | 54
* APB2CLK (MHz) | 108
* USB capable (48 MHz) | YES
*--------------------------------------------------------------------
**/
#include "stm32f7xx.h"
#include "nvic_addr.h"
#include "mbed_error.h"
#if TARGET_UHURU_RAVEN
#include "uhuru_raven_init.h"
#endif
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
// clock source is selected with CLOCK_SOURCE in json config
#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO)
#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default)
#define USE_PLL_HSI 0x2 // Use HSI internal clock
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
uint8_t SetSysClock_PLL_HSE(uint8_t bypass);
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
uint8_t SetSysClock_PLL_HSI(void);
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemFrequency variable.
* @param None
* @retval None
*/
void SystemInit(void)
{
/* FPU settings ------------------------------------------------------------*/
#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
SCB->CPACR |= ((3UL << 10 * 2) | (3UL << 11 * 2)); /* set CP10 and CP11 Full Access */
#endif
/* Reset the RCC clock configuration to the default reset state ------------*/
/* Set HSION bit */
RCC->CR |= (uint32_t)0x00000001;
/* Reset CFGR register */
RCC->CFGR = 0x00000000;
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= (uint32_t)0xFEF6FFFF;
/* Reset PLLCFGR register */
RCC->PLLCFGR = 0x24003010;
/* Reset HSEBYP bit */
RCC->CR &= (uint32_t)0xFFFBFFFF;
/* Disable all interrupts */
RCC->CIR = 0x00000000;
#if defined (DATA_IN_ExtSRAM) || defined (DATA_IN_ExtSDRAM)
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM || DATA_IN_ExtSDRAM */
/* Configure the Vector Table location add offset address ------------------*/
#ifdef VECT_TAB_SRAM
SCB->VTOR = RAMDTCM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
#else
SCB->VTOR = NVIC_FLASH_VECTOR_ADDRESS; /* Vector Table Relocation in Internal FLASH */
#endif
#if TARGET_UHURU_RAVEN
uhuru_raven_init();
#endif
}
/**
* @brief Configures the System clock source, PLL Multiplier and Divider factors,
* AHB/APBx prescalers and Flash settings
* @note This function should be called only once the RCC clock configuration
* is reset to the default reset state (done in SystemInit() function).
* @param None
* @retval None
*/
void SetSysClock(void)
{
#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)
/* 1- Try to start with HSE and external clock */
if (SetSysClock_PLL_HSE(1) == 0)
#endif
{
#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL)
/* 2- If fail try to start with HSE and external xtal */
if (SetSysClock_PLL_HSE(0) == 0)
#endif
{
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
/* 3- If fail start with HSI clock */
if (SetSysClock_PLL_HSI() == 0)
#endif
{
{
error("SetSysClock failed\n");
}
}
}
}
// Output clock on MCO2 pin(PC9) for debugging purpose
// Can be visualized on CN8 connector pin 4
//HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); // 216 MHz / 4 = 54 MHz
}
#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) )
/******************************************************************************/
/* PLL (clocked by HSE) used as System clock source */
/******************************************************************************/
uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInitStruct;
// Enable power clock
__PWR_CLK_ENABLE();
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
// Enable HSE oscillator and activate PLL with HSE as source
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
if (bypass == 0) {
RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* External xtal on OSC_IN/OSC_OUT */
} else {
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS; /* External clock on OSC_IN */
}
// Warning: this configuration is for a 8 MHz xtal clock only
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 4; // VCO input clock = 2 MHz (8 MHz / 4)
RCC_OscInitStruct.PLL.PLLN = 216; // VCO output clock = 432 MHz (2 MHz * 216)
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 216 MHz (432 MHz / 2)
RCC_OscInitStruct.PLL.PLLQ = 9; // USB clock = 48 MHz (432 MHz / 9) --> OK for USB
RCC_OscInitStruct.PLL.PLLR = 2; // I2S clock
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
// Activate the OverDrive to reach the 216 MHz Frequency
if (HAL_PWREx_EnableOverDrive() != HAL_OK) {
return 0; // FAIL
}
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 216 MHz
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 216 MHz
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 54 MHz
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 108 MHz
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) {
return 0; // FAIL
}
RCC_PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
RCC_PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInitStruct) != HAL_OK) {
return 0; // FAIL
}
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */
#if ((CLOCK_SOURCE) & USE_PLL_HSI)
/******************************************************************************/
/* PLL (clocked by HSI) used as System clock source */
/******************************************************************************/
uint8_t SetSysClock_PLL_HSI(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
RCC_PeriphCLKInitTypeDef RCC_PeriphClkInitStruct;
// Enable power clock
__PWR_CLK_ENABLE();
// Enable HSI oscillator and activate PLL with HSI as source
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8)
RCC_OscInitStruct.PLL.PLLN = 216; // VCO output clock = 432 MHz (2 MHz * 216)
RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; // PLLCLK = 216 MHz (432 MHz / 2)
RCC_OscInitStruct.PLL.PLLQ = 9;
RCC_OscInitStruct.PLL.PLLR = 2; // I2S clock
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
return 0; // FAIL
}
// Activate the OverDrive to reach the 216 MHz Frequency
if (HAL_PWREx_EnableOverDrive() != HAL_OK) {
return 0; // FAIL
}
// Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 216 MHz
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 216 MHz
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; // 54 MHz
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 108 MHz
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) {
return 0; // FAIL
}
RCC_PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_CLK48;
RCC_PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
if (HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInitStruct) != HAL_OK) {
return 0; // FAIL
}
return 1; // OK
}
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */

146
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_UHURU_RAVEN/uhuru_raven_init.c Normal file
View File

@ -0,0 +1,146 @@
/* mbed Microcontroller Library
* Copyright (c) 2019 Uhuru Corporation
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#include "mbed_assert.h"
#include "gpio_api.h"
#include "pinmap.h"
#include "mbed_error.h"
#include "pin_device.h"
#include "uhuru_raven_init.h"
/* ----------------------------------------------------------------
* MACROS
* ----------------------------------------------------------------*/
/* ----------------------------------------------------------------
* TABLES
* ----------------------------------------------------------------*/
typedef struct {
PinName pin;
PinDirection dir;
PinMode mode;
} PIN_DATA;
// pin init status
const PIN_DATA pin_init_status[] = {
{PA_0 , PIN_INPUT , PullDown}, // PA_0
{PA_1 , PIN_INPUT , PullDown}, // PA_1
{PA_2 , PIN_INPUT , PullUp}, // PA_2
{PA_3 , PIN_INPUT , PullDown}, // PA_3
{PA_4 , PIN_INPUT , PullDown}, // PA_4
{PA_5 , PIN_INPUT , PullDown}, // PA_5
{PA_6 , PIN_INPUT , PullDown}, // PA_6
{PA_7 , PIN_INPUT , PullDown}, // PA_7
{PA_8 , PIN_INPUT , PullDown}, // PA_8
{PA_9 , PIN_INPUT , PullDown}, // PA_9
{PA_10 , PIN_INPUT , PullDown}, // PA_10
{PA_11 , PIN_INPUT , PullDown}, // PA_11
{PA_12 , PIN_INPUT , PullDown}, // PA_12
{PA_15 , PIN_INPUT , PullDown}, // PA_15
{PB_0 , PIN_INPUT , PullDown}, // PB_0
{PB_1 , PIN_INPUT , PullDown}, // PB_1
{PB_2 , PIN_INPUT , PullDown}, // PB_2
{PB_4 , PIN_INPUT , PullDown}, // PB_4
{PB_5 , PIN_INPUT , PullDown}, // PB_5
{PB_6 , PIN_INPUT , PullDown}, // PB_6
{PB_7 , PIN_INPUT , PullDown}, // PB_7
{PB_8 , PIN_INPUT , PullUp}, // PB_8
{PB_9 , PIN_INPUT , PullUp}, // PB_9
{PB_10 , PIN_OUTPUT, PullUp}, // PB_10
{PB_11 , PIN_INPUT , PullDown}, // PB_11
{PB_12 , PIN_OUTPUT, PullDown}, // PB_12
{PB_13 , PIN_OUTPUT, PullUp}, // PB_13
{PB_14 , PIN_INPUT , PullUp}, // PB_14
{PB_15 , PIN_INPUT , PullDown}, // PB_15
{PC_0 , PIN_INPUT , PullDown}, // PC_0
{PC_1 , PIN_INPUT , PullDown}, // PC_1
{PC_2 , PIN_INPUT , PullDown}, // PC_2
{PC_3 , PIN_INPUT , PullDown}, // PC_3
{PC_4 , PIN_INPUT , PullDown}, // PC_4
{PC_5 , PIN_INPUT , PullDown}, // PC_5
{PC_6 , PIN_INPUT , PullDown}, // PC_6
{PC_7 , PIN_INPUT , PullDown}, // PC_7
{PC_8 , PIN_INPUT , PullDown}, // PC_8
{PC_9 , PIN_INPUT , PullDown}, // PC_9
{PC_10 , PIN_INPUT , PullDown}, // PC_10
{PC_11 , PIN_INPUT , PullDown}, // PC_11
{PC_12 , PIN_INPUT , PullDown}, // PC_12
{PC_13 , PIN_INPUT , PullUp}, // PC_13
{PD_0 , PIN_INPUT , PullDown}, // PD_0
{PD_1 , PIN_INPUT , PullDown}, // PD_1
{PD_2 , PIN_INPUT , PullDown}, // PD_2
{PD_3 , PIN_INPUT , PullDown}, // PD_3
{PD_4 , PIN_INPUT , PullDown}, // PD_4
{PD_5 , PIN_INPUT , PullDown}, // PD_5
{PD_6 , PIN_INPUT , PullDown}, // PD_6
{PD_7 , PIN_INPUT , PullDown}, // PD_7
{PD_8 , PIN_INPUT , PullUp}, // PD_8
{PD_9 , PIN_INPUT , PullDown}, // PD_9
{PD_10 , PIN_INPUT , PullDown}, // PD_10
{PD_11 , PIN_INPUT , PullNone}, // PD_11
{PD_12 , PIN_INPUT , PullUp}, // PD_12
{PD_13 , PIN_INPUT , PullUp}, // PD_13
{PD_14 , PIN_INPUT , PullNone}, // PD_14
{PD_15 , PIN_INPUT , PullDown}, // PD_15
{PE_0 , PIN_INPUT , PullNone}, // PE_0
{PE_1 , PIN_INPUT , PullNone}, // PE_1
{PE_2 , PIN_INPUT , PullDown}, // PE_2
{PE_3 , PIN_INPUT , PullDown}, // PE_3
{PE_4 , PIN_INPUT , PullDown}, // PE_4
{PE_5 , PIN_INPUT , PullDown}, // PE_5
{PE_6 , PIN_INPUT , PullDown}, // PE_6
{PE_7 , PIN_INPUT , PullDown}, // PE_7
{PE_8 , PIN_INPUT , PullDown}, // PE_8
{PE_9 , PIN_INPUT , PullDown}, // PE_9
{PE_10 , PIN_OUTPUT , PullUp}, // PE_10
{PE_11 , PIN_OUTPUT , PullUp}, // PE_11
{PE_12 , PIN_INPUT , PullDown}, // PE_12
{PE_13 , PIN_INPUT , PullDown}, // PE_13
{PE_14 , PIN_INPUT , PullDown}, // PE_14
{PE_15 , PIN_OUTPUT , PullUp}, // PE_15
{NC , 0 , 0},
};
/* ----------------------------------------------------------------
* FUNCTION PROTOTYPES
* ----------------------------------------------------------------*/
/* ----------------------------------------------------------------
* NON-API FUNCTIONS
* ----------------------------------------------------------------*/
/* ----------------------------------------------------------------
* MBED API FUNCTIONS
* ----------------------------------------------------------------*/
void uhuru_raven_init(void)
{
for(int i= 0 ; pin_init_status[i].pin != NC ; i++){
gpio_t gpio;
if(pin_init_status[i].dir == PIN_INPUT){
gpio_init_in_ex(&gpio , pin_init_status[i].pin , pin_init_status[i].mode);
}
else {
if(pin_init_status[i].mode == PullUp){
gpio_init_out_ex(&gpio , pin_init_status[i].pin , 1);
}
else{
gpio_init_out_ex(&gpio , pin_init_status[i].pin , 0);
}
}
}
}

43
targets/TARGET_STM/TARGET_STM32F7/TARGET_STM32F767xI/TARGET_UHURU_RAVEN/uhuru_raven_init.h Normal file
View File

@ -0,0 +1,43 @@
/* mbed Microcontroller Library
* Copyright (c) 2019 Uhuru Corporation
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef UHURU_RAVEN_INIT_H
#define UHURU_RAVEN_INIT_H
#ifdef __cplusplus
extern "C" {
#endif
/* ----------------------------------------------------------------
* MACROS
* ----------------------------------------------------------------*/
/* ----------------------------------------------------------------
* FUNCTION PROTOTYPES
* ----------------------------------------------------------------*/
/** GPIO initialization
*
* Properly initialize available and unavailable GPIOs.
*/
void uhuru_raven_init(void);
#ifdef __cplusplus
}
#endif
#endif

1
targets/TARGET_STM/mbed_rtx.h
View File

@ -118,6 +118,7 @@
#define INITIAL_SP (0x20050000UL)
#elif (defined(TARGET_STM32F767ZI) ||\
defined(TARGET_STM32F767VI) ||\
defined(TARGET_STM32F769NI))
#define INITIAL_SP (0x20080000UL)

28
targets/targets.json
View File

@ -3209,6 +3209,34 @@
"device_name": "STM32H743ZI",
"bootloader_supported": true
},
"UHURU_RAVEN": {
"inherits": ["FAMILY_STM32"],
"core": "Cortex-M7FD",
"extra_labels_add": ["STM32F7", "STM32F767", "STM32F767xI", "STM32F767VI"],
"config": {
"clock_source": {
"help": "Mask value : USE_PLL_HSE_EXTC | USE_PLL_HSE_XTAL | USE_PLL_HSI",
"value": "USE_PLL_HSE_XTAL",
"macro_name": "CLOCK_SOURCE"
},
"lowpowertimer_lptim": {
"help": "This target supports LPTIM. Set value 1 to use LPTIM for LOWPOWERTIMER, or 0 to use RTC wakeup timer",
"value": 1
}
},
"overrides": {
"lpticker_delay_ticks": 4,
"network-default-interface-type": "WIFI"
},
"components_add": ["SPIF"],
"detect_code": ["9020"],
"device_has_add": ["ANALOGOUT", "CAN", "TRNG", "FLASH", "MPU"],
"device_has_remove": ["SERIAL_FC"],
"features": ["LWIP"],
"release_versions": ["5"],
"device_name": "STM32F767VI",
"bootloader_supported": true
},
"NUCLEO_L011K4": {
"inherits": ["FAMILY_STM32"],
"core": "Cortex-M0+",

75
tools/arm_pack_manager/index.json
View File

@ -384034,7 +384034,80 @@
"units": 1
}
},
"sectors": null,
"sectors": [
[
2097152,
16384
],
[
2097152,
32768
],
[
2162688,
65536
],
[
2228224,
131072
],
[
2228224,
131072
],
[
2359296,
262144
],
[
3145728,
16384
],
[
3211264,
65536
],
[
3276800,
131072
],
[
134217728,
16384
],
[
134217728,
32768
],
[
134283264,
65536
],
[
134348800,
131072
],
[
134348800,
131072
],
[
134479872,
262144
],
[
135266304,
16384
],
[
135331840,
65536
],
[
135397376,
131072
]
],
"vendor": "STMicroelectronics:13"
},
"STM32F767ZGTx": {

1
tools/arm_pack_manager/legacy-names.json
View File

@ -42,6 +42,7 @@
"STM32F746NG": "STM32F746NGHx",
"STM32F746ZG": "STM32F746ZGTx",
"STM32F756ZG": "STM32F756ZGTx",
"STM32F767VI": "STM32F767VITx",
"STM32F767ZI": "STM32F767ZITx",
"STM32F769NI": "STM32F769NIHx",
"STM32H743ZI": "STM32H743ZITx",