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Dynamic heap support will be breaking change for all targets in IAR 7.x 

Reverting this feature till IAR 8.x is stable and supported in Mbed OS
for few releases

1. Revert "Add Dynamic heap support to IAR"

This reverts commit 8ee29bbfa2.

2. Revert "Splited RAM section not compatible with dynamic HEAP."

This reverts commit a645bb2a6b.

3. Revert "Add Dynamic heap support to IAR"

This reverts commit 891e1f261b.
pull/9811/head
Deepika 2019-02-06 12:15:27 -06:00 committed by Martin Kojtal
parent e54be4aeff
commit 3fd5f53b51
144 changed files with 167 additions and 156 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf
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@ -63,7 +63,7 @@ initialize by copy { readwrite };
do not initialize { section .noinit };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };

2
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf
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@ -63,7 +63,7 @@ initialize by copy { readwrite };
do not initialize { section .noinit };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };

2
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf
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@ -63,7 +63,7 @@ initialize by copy { readwrite };
do not initialize { section .noinit };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };

2
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf
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@ -63,7 +63,7 @@ initialize by copy { readwrite };
do not initialize { section .noinit };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };

2
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf
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@ -63,7 +63,7 @@ initialize by copy { readwrite };
do not initialize { section .noinit };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };

2
targets/TARGET_ARM_SSG/TARGET_BEETLE/device/TOOLCHAIN_IAR/BEETLE.icf
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@ -47,7 +47,7 @@ initialize by copy { readwrite };
do not initialize { section .noinit };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };

2
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf
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@ -71,7 +71,7 @@ initialize by copy { readwrite };
do not initialize { section .noinit };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };

3
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf
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@ -54,8 +54,7 @@ define region RAM_bank1_region = mem:[from 0x20000200 size 0x00003E00
define region RAM_bank2_region = mem:[from 0x20004000 size 0x00004000]
| mem:[from 0x20040000 size 0x00007000];
define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with expanding size, minimum size = 0x2000, alignment = 16 { };
define block HEAP with alignment = 16, size = 0x2000 { };
do not initialize { section .noinit };
initialize by copy { rw };
place at start of ROM_PAGE0_INTVEC { ro section .vectors };

4
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf
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@ -53,10 +53,8 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO
define region RAM_bank1_region = mem:[from 0x20040000 size 0x00008000];
define region RAM_bank2_region = mem:[from 0x20000200 size 0x00006E00]
| mem:[from 0x20048000 size 0x00010000];
define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with expanding size, minimum size = 0x6000, alignment = 16 { };
define block HEAP with alignment = 16, size = 0x6000 { };
do not initialize { section .noinit };
initialize by copy { rw };
place at start of ROM_PAGE0_INTVEC { ro section .vectors };

2
targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M0/device/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf
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@ -148,7 +148,7 @@ define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFED
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
define block RO {first section .intvec, readonly};

2
targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/TARGET_MCU_PSOC6_M4/device/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf
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@ -148,7 +148,7 @@ define region IRAM1_region = mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFED
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block PROC_STACK with alignment = 8, size = __ICFEDIT_size_proc_stack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block HSTACK {block HEAP, block PROC_STACK, last block CSTACK};
define block RO {first section .intvec, readonly};

2
targets/TARGET_Freescale/TARGET_K20XX/TARGET_K20D50M/device/TOOLCHAIN_IAR/MK20D5.icf
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@ -36,7 +36,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_r
define region FlexRAM_region = mem:[from __region_FlexRAM_start__ to __region_FlexRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__];

9
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL05Z/device/TOOLCHAIN_IAR/MKL05Z4.icf
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@ -9,7 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x00007fff;
define symbol __ICFEDIT_region_NVIC_start__ = 0x1ffffc00;
define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffffcbf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1ffffcc0;
define symbol __ICFEDIT_region_RAM_end__ = 0x20000bff;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
@ -18,15 +18,18 @@ define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x400;
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = 0x20000bff;
define symbol __FlashConfig_start__ = 0x00000400;
define symbol __FlashConfig_end__ = 0x0000040f;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__];

9
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf
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@ -9,7 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0001ffff;
define symbol __ICFEDIT_region_NVIC_start__ = 0x1ffff000;
define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0;
define symbol __ICFEDIT_region_RAM_end__ = 0x20002fff;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
@ -18,15 +18,18 @@ define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0xC00;
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = 0x20002fff;
define symbol __FlashConfig_start__ = 0x00000400;
define symbol __FlashConfig_end__ = 0x0000040f;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__];

9
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL26Z/device/TOOLCHAIN_IAR/MKL26Z4.icf
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@ -9,7 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0001ffff;
define symbol __ICFEDIT_region_NVIC_start__ = 0x1ffff000;
define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0;
define symbol __ICFEDIT_region_RAM_end__ = 0x20002fff;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
@ -18,15 +18,18 @@ define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x1000;
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = 0x20002fff;
define symbol __FlashConfig_start__ = 0x00000400;
define symbol __FlashConfig_end__ = 0x0000040f;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__];

10
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf
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@ -9,7 +9,7 @@ define symbol __ICFEDIT_region_ROM_end__ = 0x0002ffff;
define symbol __ICFEDIT_region_NVIC_start__ = 0x1fffe000;
define symbol __ICFEDIT_region_NVIC_end__ = 0x1fffe0bf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0c0;
define symbol __ICFEDIT_region_RAM_end__ = 0x20005fff;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
@ -18,15 +18,19 @@ define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/
define symbol __region_RAM2_start__ = 0x20000000;
define symbol __region_RAM2_end__ = 0x20005fff;
define symbol __FlashConfig_start__ = 0x00000400;
define symbol __FlashConfig_end__ = 0x0000040f;
define memory mem with size = 4G;
define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to (__FlashConfig_start__ - 1)] | mem:[from (__FlashConfig_end__+1) to __ICFEDIT_region_ROM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__] | mem:[from __region_RAM2_start__ to __region_RAM2_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define region FlashConfig_region = mem:[from __FlashConfig_start__ to __FlashConfig_end__];
initialize by copy { readwrite };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf
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@ -112,7 +112,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_IAR/MK82FN256xxx15.icf
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@ -107,7 +107,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL27Z/device/TOOLCHAIN_IAR/MKL27Z64xxx4.icf
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@ -100,7 +100,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL43Z/device/TOOLCHAIN_IAR/MKL43Z256xxx4.icf
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@ -97,7 +97,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KL82Z/device/TOOLCHAIN_IAR/MKL82Z128xxx7.icf
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@ -110,7 +110,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/device/TOOLCHAIN_IAR/MKW24D512xxx5.icf
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@ -107,7 +107,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/device/TOOLCHAIN_IAR/MKW41Z512xxx4.icf
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@ -103,7 +103,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K22F/TARGET_MCU_K22F512/device/TOOLCHAIN_IAR/MK22F51212.icf
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@ -103,7 +103,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K24F/TARGET_MCU_K24F1M/device/TOOLCHAIN_IAR/MK24FN1M0xxx12.icf
View File

@ -110,7 +110,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/device/TOOLCHAIN_IAR/MK64FN1M0xxx12.icf
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@ -117,7 +117,7 @@ define region CSTACK_region = mem:[from m_data_2_end-__size_cstack__+1 to m_data
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_GigaDevice/TARGET_GD32F30X/TARGET_GD32F307VG/device/TOOLCHAIN_IAR/gd32f307vg.icf
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@ -27,7 +27,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_Maxim/TARGET_MAX32600/device/TOOLCHAIN_IAR/MAX32600.icf
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@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x3000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_Maxim/TARGET_MAX32610/device/TOOLCHAIN_IAR/MAX32610.icf
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@ -22,7 +22,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x3000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_Maxim/TARGET_MAX32620/device/TOOLCHAIN_IAR/MAX32620.icf
View File

@ -22,7 +22,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x4000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_Maxim/TARGET_MAX32620C/device/TOOLCHAIN_IAR/MAX32620.icf
View File

@ -22,7 +22,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xF000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625NEXPAQ/MAX32625.icf
View File

@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xA000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_BOOT/MAX32625.icf
View File

@ -29,7 +29,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xA000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_Maxim/TARGET_MAX32625/device/TOOLCHAIN_IAR/TARGET_MAX32625_NO_BOOT/MAX32625.icf
View File

@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xA000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_Maxim/TARGET_MAX32630/device/TOOLCHAIN_IAR/MAX3263x.icf
View File

@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xA000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

3
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf
View File

@ -23,7 +23,8 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NORDIC/TARGET_MCU_NRF51822/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf
View File

@ -23,7 +23,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_16K/nRF51822_QFAA.icf
View File

@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF51/TARGET_MCU_NRF51822_UNIFIED/device/TOOLCHAIN_IAR/TARGET_MCU_NORDIC_32K/nRF51822_QFAA.icf
View File

@ -25,7 +25,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52832/device/TOOLCHAIN_IAR/nRF52832.icf
View File

@ -56,7 +56,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .nvictable };

2
targets/TARGET_NORDIC/TARGET_NRF5x/TARGET_NRF52/TARGET_MCU_NRF52840/device/TOOLCHAIN_IAR/nRF52840.icf
View File

@ -60,7 +60,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .nvictable };

2
targets/TARGET_NUVOTON/TARGET_M2351/device/TOOLCHAIN_IAR/M2351.icf
View File

@ -107,7 +107,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 102) { };

2
targets/TARGET_NUVOTON/TARGET_M451/device/TOOLCHAIN_IAR/M453.icf
View File

@ -22,7 +22,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 64) { };

2
targets/TARGET_NUVOTON/TARGET_M480/device/TOOLCHAIN_IAR/M487.icf
View File

@ -24,7 +24,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { };
define block CRASH_DATA_RAM with alignment = 8, size = __ICFEDIT_size_crash_data__ { };

2
targets/TARGET_NUVOTON/TARGET_NANO100/device/TOOLCHAIN_IAR/NANO130.icf
View File

@ -20,7 +20,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };

2
targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_SUPPORTED/NUC472_442.icf
View File

@ -25,7 +25,7 @@ define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFED
define region XRAM_region = mem:[from __ICFEDIT_region_XRAM_start__ to __ICFEDIT_region_XRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 142) { };
/* Move non-critical libraries to external SRAM while internal SRAM is insufficient. */

2
targets/TARGET_NUVOTON/TARGET_NUC472/device/TOOLCHAIN_IAR/TARGET_NU_XRAM_UNSUPPORTED/NUC472_442.icf
View File

@ -22,7 +22,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
define block IRAMVEC with alignment = 1024, size = 4 * (16 + 142) { };

2
targets/TARGET_NXP/TARGET_LPC11U6X/device/TOOLCHAIN_IAR/TARGET_LPC11U68/LPC11U68.icf
View File

@ -36,7 +36,7 @@ define region RAM_USB_region = mem:[from __RAM_USB_start__ to __RAM_USB_end__]
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_301/LPC11U24.icf
View File

@ -32,7 +32,7 @@ define region URAM_region = mem:[from __URAM_start__ to __URAM_end__];
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U24_401/LPC11U24.icf
View File

@ -32,7 +32,7 @@ define region URAM_region = mem:[from __URAM_start__ to __URAM_end__];
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_401/LPC11U35.icf
View File

@ -32,7 +32,7 @@ define region URAM_region = mem:[from __URAM_start__ to __URAM_end__];
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U35_501/LPC11U35.icf
View File

@ -36,7 +36,7 @@ define region SRAM1_region = mem:[from __SRAM1_start__ to __SRAM1_end__];
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_LPC11U37_501/LPC11U37.icf
View File

@ -36,7 +36,7 @@ define region SRAM1_region = mem:[from __SRAM1_start__ to __SRAM1_end__];
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC11UXX/device/TOOLCHAIN_IAR/TARGET_OC_MBUINO/LPC11U24.icf
View File

@ -32,7 +32,7 @@ define region URAM_region = mem:[from __URAM_start__ to __URAM_end__];
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11CXX/LPC11C24.icf
View File

@ -28,7 +28,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC11XX_11CXX/device/TOOLCHAIN_IAR/TARGET_LPC11XX/LPC1114.icf
View File

@ -28,7 +28,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC13XX/device/TOOLCHAIN_IAR/LPC1347.icf
View File

@ -36,7 +36,7 @@ define region USB_PKG_RAM_region = mem:[from __region_USB_PKG_RAM_start__ to __r
define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC15XX/device/TOOLCHAIN_IAR/LPC15xx.icf
View File

@ -28,7 +28,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC176X/device/TOOLCHAIN_IAR/LPC17xx.icf
View File

@ -35,7 +35,7 @@ define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };

2
targets/TARGET_NXP/TARGET_LPC408X/device/TOOLCHAIN_IAR/LPC4088.icf
View File

@ -32,7 +32,7 @@ define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define region RAM1_region = mem:[from __RAM1_start__ to __RAM1_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC43XX/device/TOOLCHAIN_IAR/LPC43xx.icf
View File

@ -27,7 +27,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x8000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_NXP/TARGET_LPC81X/TARGET_ELEKTOR_COCORICO/device/TOOLCHAIN_IAR/LPC812.icf
View File

@ -27,7 +27,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC810/device/TOOLCHAIN_IAR/LPC810.icf
View File

@ -27,7 +27,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC81X/TARGET_LPC812/device/TOOLCHAIN_IAR/LPC812.icf
View File

@ -27,7 +27,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_LPC82X/TARGET_LPC824/device/TOOLCHAIN_IAR/LPC824.icf
View File

@ -27,7 +27,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFED
define region CRP_region = mem:[from __CRP_start__ to __CRP_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC54114/device/TARGET_LPC54114_M4/TOOLCHAIN_IAR/LPC54114J256_cm4.icf
View File

@ -113,7 +113,7 @@ define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_in
define region rpmsg_sh_mem_region = mem:[from rpmsg_sh_mem_start to rpmsg_sh_mem_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MCU_LPC546XX/device/TOOLCHAIN_IAR/LPC54628J512.icf
View File

@ -95,7 +95,7 @@ define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_e
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf
View File

@ -125,7 +125,7 @@ define region NCACHE_region = mem:[from m_ncache_start to m_ncache_end];
define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { first readwrite, section m_usb_dma_init_data };
define block ZI with alignment = 32 { first zi, section m_usb_dma_noninit_data };
define block NCACHE_VAR with size = 0x200000 , alignment = 0x100000 { section NonCacheable , section NonCacheable.init };

2
targets/TARGET_ONSEMI/TARGET_NCS36510/device/TOOLCHAIN_IAR/NCS36510.icf
View File

@ -56,7 +56,7 @@ define overlay MIBOVERLAY { section MIBSTARTSECTION };
define overlay MIBOVERLAY { section MIBSECTION };
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
define block RAM_VECTORS with alignment = 8, size = 0x90 { };
initialize by copy { readwrite };

2
targets/TARGET_RDA/TARGET_UNO_91H/device/TOOLCHAIN_IAR/TARGET_UNO_91H/RDA5981C.icf
View File

@ -52,7 +52,7 @@ define region AES_REGION = mem:[from AES_BASE to AES_END];
define region WLAN_REGION = mem:[from WLAN_BASE to WLAN_END];
define block CSTACK with alignment = 8, size = CSTACK_SIZE { };
define block HEAP with expanding size, minimum size = HEAP_SIZE, alignment = 8 { };
define block HEAP with alignment = 8, size = HEAP_SIZE { };
define block RW { readwrite };
define block ZI { zi };

2
targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_IAR/MBRZA1LU.icf
View File

@ -55,7 +55,7 @@ define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_IAR/MBRZA1H.icf
View File

@ -55,7 +55,7 @@ define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/device/TOOLCHAIN_IAR/VKRZA1H.icf
View File

@ -48,7 +48,7 @@ define block IRQ_STACK with alignment = 8, size = __ICFEDIT_size_irqstack__ { };
define block FIQ_STACK with alignment = 8, size = __ICFEDIT_size_fiqstack__ { };
define block UND_STACK with alignment = 8, size = __ICFEDIT_size_undstack__ { };
define block ABT_STACK with alignment = 8, size = __ICFEDIT_size_abtstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

4
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_MCU_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf
View File

@ -34,7 +34,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
}
define block CSTACK with alignment = 8, size = MBED_BOOT_STACK_SIZE { };
define block HEAP with expanding size, minimum size = 0x19000, alignment = 8 { };
define block HEAP with alignment = 8, size = 0x19000 { };
do not initialize { section .noinit };
@ -213,4 +213,4 @@ place in RAM_region {
block FPB_REMAP,
};
include "rtl8195a_rom.h";
include "rtl8195a_rom.h";

2
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device/TOOLCHAIN_IAR/stm32f030x8.icf
View File

@ -22,7 +22,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device/TOOLCHAIN_IAR/stm32f031x6.icf
View File

@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device/TOOLCHAIN_IAR/stm32f042x6.icf
View File

@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device/TOOLCHAIN_IAR/stm32f070xb.icf
View File

@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device/TOOLCHAIN_IAR/stm32f072xb.icf
View File

@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/stm32f091xc.icf
View File

@ -21,7 +21,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F1/TARGET_NUCLEO_F103RB/device/TOOLCHAIN_IAR/stm32f103xb.icf
View File

@ -23,7 +23,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F2/TARGET_NUCLEO_F207ZG/device/TOOLCHAIN_IAR/stm32f207xx.icf
View File

@ -24,7 +24,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xF000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F302x8/device/TOOLCHAIN_IAR/stm32f302x8.icf
View File

@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x1000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303x8/device/TOOLCHAIN_IAR/stm32f303x8.icf
View File

@ -25,7 +25,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xC00;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xC/device/TOOLCHAIN_IAR/stm32f303xc.icf
View File

@ -26,7 +26,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x2000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy { readwrite };

2
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F303xE/device/TOOLCHAIN_IAR/stm32f303xe.icf
View File

@ -28,7 +28,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x5000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F3/TARGET_STM32F334x8/device/TOOLCHAIN_IAR/stm32f334x8.icf
View File

@ -24,7 +24,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0xC00;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_MTB_MTS_DRAGONFLY/device/TOOLCHAIN_IAR/stm32f411xe.icf
View File

@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x10000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_DRAGONFLY_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf
View File

@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x10000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F405RG/device/TOOLCHAIN_IAR/stm32f405xx.icf
View File

@ -28,7 +28,7 @@ define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __IC
define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_MTS_MDOT_F411RE/device/TOOLCHAIN_IAR/stm32f411xe.icf
View File

@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x8000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F401xE/device/TOOLCHAIN_IAR/stm32f401xe.icf
View File

@ -23,7 +23,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F407xG/device/TOOLCHAIN_IAR/stm32f407xx.icf
View File

@ -23,7 +23,7 @@ define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFED
define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F410xB/device/TOOLCHAIN_IAR/stm32f410xx.icf
View File

@ -21,7 +21,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x2000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/device/TOOLCHAIN_IAR/stm32f411xe.icf
View File

@ -31,7 +31,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x15000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F412xG/device/TOOLCHAIN_IAR/stm32f412xx.icf
View File

@ -24,7 +24,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x15000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F413xH/device/TOOLCHAIN_IAR/stm32f413xx.icf
View File

@ -24,7 +24,7 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x10000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with expanding size, minimum size = __size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block STACKHEAP with fixed order { block HEAP, block CSTACK };
initialize by copy with packing = zeros { readwrite };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F429xI/device/TOOLCHAIN_IAR/stm32f429xx_flash.icf
View File

@ -36,7 +36,7 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F437xG/device/TOOLCHAIN_IAR/stm32f437xx.icf
View File

@ -39,7 +39,7 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

2
targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F439xI/device/TOOLCHAIN_IAR/stm32f439xx_flash.icf
View File

@ -36,7 +36,7 @@ define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start_
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
define block HEAP with expanding size, minimum size = __ICFEDIT_size_heap__, alignment = 8 { };
define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
initialize by copy { readwrite };
do not initialize { section .noinit };

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