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Author SHA1 Message Date
Martin Kojtal f57f2657f8
Merge pull request #13747 from RyoheiHagimoto/modify_renesas_deepsleep 
Renesas: fix timing to wait UART completion in deep sleep function
 2020-10-27 14:09:04 +00:00
Martin Kojtal f9e62fe615
Merge pull request #13692 from RyoheiHagimoto/gr_i2c_slave 
Fix I2C slave bugs on Renesas RZ/A series.
 2020-10-27 14:08:47 +00:00
pea-pod 507181d262 Change MBED_STATIC_ASSERTs version for built-in 2020-10-27 08:30:40 -05:00
pennam 45ac79aa3b STM32H7: define RCC_LSE_BYPASS to allow using PC_15 as gpio 2020-10-27 11:24:30 +01:00
Peter B d56f942ae7
Update spi_api.c 
Modified line 145:  previously the fill character has been hard coded to 0x00. However in Mbed OS core SPI_FILL_CHAR is defined in the core to be 0xFF by default (one can change that through mbed_app.json for example). This mod allows us to use the same fill character that is defined for Mbed OS.

Also modified spi_master_block_write(): previously it called am_hal_iom_blocking_transfer on line 182, but that prevented succesful SD card writing operations. Now i changed that part to am_hal_iom_spi_blocking_fullduplex and SD functionality seems to be working.
 2020-10-26 16:03:04 +01:00
JojoS62 6264e0abc4 add defaults values 
set all defaults to initial low as after a reset
most STM32 eval boards use low power crystals and work with this setting
 2020-10-23 19:38:55 +02:00
JojoS62 622a452661 fix macro usage error 
use unique #if defined()
 2020-10-23 17:00:28 +02:00
JojoS62 64072a925e fix for targets with non-modifiable 
transconductance
 2020-10-22 20:11:15 +02:00
JojoS62 80847e958d simplify default setting 2020-10-22 11:27:42 +02:00
JojoS62 e7f1430d37 remove duplicate LSEDRIVE_CONFIG 2020-10-22 11:24:51 +02:00
JojoS62 a209d44a07 simplify checking for F4_g2 exception 2020-10-22 11:20:51 +02:00
JojoS62 8145b69959 add setting for LSE drive load level 2020-10-21 18:54:47 +02:00
jeromecoutant 379182299d STM32H7 readme update 2020-10-20 13:10:59 +02:00
jeromecoutant 04c8ff91d4 STM32H7: new target NUCLEO_H7A3ZI_Q 2020-10-20 13:10:59 +02:00
jeromecoutant 1e2aacd373 STM32H7: create MCU_STM32H7A3xIQ 2020-10-20 13:10:59 +02:00
Martin Kojtal d418667f07
Merge pull request #13690 from jeromecoutant/PR_H7_180 
STM32H7 update drivers version to CUBE V1.8.0
 2020-10-20 11:36:56 +01:00
jeromecoutant 3c6ba98823 STM32L4: STM32Cube_FW_L4_V1.16.0 
source: https://github.com/STMicroelectronics/STM32CubeL4
 2020-10-20 08:51:37 +02:00
jeromecoutant c8711b600a STM32L4 : targets.json update introducing subfamily level 
Goal is to halp custom boards creation
 2020-10-20 08:51:36 +02:00
jeromecoutant 81f919b6c2 STM32L4 : license header alignment 2020-10-20 08:51:36 +02:00
jeromecoutant 95f8b2dfd4 STM32L4 : common file factorisation 2020-10-20 08:51:36 +02:00
jeromecoutant dcc066db59 STM32L4 : alignment with STM32Cube_FW_L4_V1.14.0 2020-10-20 08:51:35 +02:00
jeromecoutant 3b14c478c1 STM32L4 : directory retructuration 
- Alignment with other STM32 families
 2020-10-20 08:51:35 +02:00
jeromecoutant 3f843d55ed STM32H7: readme update 2020-10-20 08:19:28 +02:00
jeromecoutant 2ccf534aaa STM32H7: fix ADC internal channels 2020-10-20 08:19:27 +02:00
jeromecoutant e322870219 STM32H7: FLASH update 2020-10-20 08:19:27 +02:00
jeromecoutant f0b7e8b98c STM32H7: update target specific files with Cube-1.8 
- startup files pdated from Cube
- all SetSysClock aligned and checked
- license header updated
 2020-10-20 08:19:16 +02:00
jeromecoutant 13df49e315 STM32H7: STM32Cube_FW_H7_V1.8.0 
https://github.com/STMicroelectronics/STM32CubeH7
 2020-10-20 08:18:21 +02:00
jeromecoutant a62736bba2 STM32L0: STM32Cube_FW_L0_V1.11.3 
https://github.com/STMicroelectronics/STM32CubeL0
 2020-10-19 17:42:38 +02:00
jeromecoutant d9cdd31f21 STM32L0: back to updated files 2020-10-19 17:42:38 +02:00
jeromecoutant a519a2fe6b STM32L0: directory restructuration 
+ STM32Cube_FW_L0_V1.10.0 original files
+ targets.json update introducing subfamily level
 2020-10-19 17:42:38 +02:00
jeromecoutant 7c214cbd68 STM32WB: STM32Cube_FW_WB_V1.8.0 
https://github.com/STMicroelectronics/STM32CubeWB
 2020-10-19 14:36:02 +02:00
Martin Kojtal bf90b7736b
Merge pull request #13697 from jeromecoutant/PR_L5_130 
STM32L5 update drivers version to CUBE V1.3.1
 2020-10-19 13:21:32 +01:00
jeromecoutant 4b999b3e7f STM32L5: STM32Cube_FW_L5_V1.3.0 
https://github.com/STMicroelectronics/STM32CubeL5
 2020-10-16 17:31:58 +02:00
jeromecoutant 759a817005 STM32G4: STM32Cube_FW_G4_V1.3.0 
source: https://github.com/STMicroelectronics/STM32CubeG4
 2020-10-16 17:31:04 +02:00
jeromecoutant cd99f641dc STM32G4: cleanup 2020-10-16 17:31:03 +02:00
jeromecoutant 4f95500dc9 STM32G4: target directoty restructuration 
- Alignment with other STM32 families
- Subfamily level in targets.json
 2020-10-16 17:31:03 +02:00
RyoheiHagimoto e3fea114ec Fixed I2C slave bugs on Renesas RZ/A series: 
Added the register operation when received the slave address.
 2020-10-16 18:00:42 +09:00
RyoheiHagimoto 5931050b64 Fixed I2C slave bugs on Renesas RZ/A series. 
Fixed following I2C slave bugs on Renesas RZ/A series:
 - Send an incorrect value during slave mode.
 - The behavior for the restart condition is wrong.
 2020-10-16 17:58:40 +09:00
Martin Kojtal 2d01a4412d
Merge pull request #13723 from boraozgen/feature/f412xg-crash-ram 
Add crash RAM to STM32F412xG
 2020-10-16 09:10:55 +01:00
Martin Kojtal 61aa6817f0
Merge pull request #13724 from harmut01/license_refactor 
Add license notice to Arm copyrighted source files
 2020-10-16 09:09:53 +01:00
Martin Kojtal aa0cd631a2
Merge pull request #13655 from jeromecoutant/PR_GENPERIPH_1_17 
STM32_gen_PeripheralPins.py v1.17
 2020-10-16 09:08:27 +01:00
Martin Kojtal c8345a3490
Merge pull request #13595 from gutbag/add-nrf52-midi-baud-rate 
Nordic: Support 31250 baud rate
 2020-10-16 09:06:31 +01:00
Martin Kojtal 36de28e1ff
Merge pull request #13683 from 0xc0170/fix_stm32_usb 
USB STM32: fix header inclusion, removing mbed.h
 2020-10-15 15:41:03 +01:00
Martin Kojtal 2514479360
Merge pull request #13743 from idea--list/master 
Define SD and STORAGE for the MAX32630FTHR and prevent warnings during compilation on Mbed 5.12 and above
 2020-10-15 15:06:48 +01:00
Martin Kojtal 2311398adf
Merge pull request #13738 from OpenNuvoton/nuvoton_m23_fault_handler 
Nuvoton: Enable fault handler dump message on CM23 targets
 2020-10-15 15:06:23 +01:00
Martin Kojtal ab14eb60e2
Merge pull request #13677 from CharleyChu/topic/master_cytfm_471 
psoc64: Update flash layout of CYTFM_064B0S2_4343W
 2020-10-15 13:51:29 +01:00
jeromecoutant 7eb43b104a STM32_gen_PeripheralPins.py move to TARGET_STM 2020-10-15 12:08:25 +02:00
Harrison Mutai 4fad1112e5 Add SPDX license identifier to Arm files 
Add license identifier to files which Arm owns the copyright to,
and contain either BSD-3 or Apache-2.0 licenses. This is to address
license errors raised by scancode analysis.
 2020-10-15 10:47:27 +01:00
Harrison Mutai d1d6bf51b3 Add license notice to Arm copyrighted source files 
Scancode found missing license notices in our source files. This commit
addresses those issues by adding an Apache-2.0 notice to source files
highlighted.
 2020-10-15 10:46:35 +01:00
Martin Kojtal e56d4298cb USB STM32: fix header inclusion, removing mbed.h' 
Fixes #13667 issue
 2020-10-13 13:23:21 +01:00
Peter B 0db0f0d22a
alignment fixed 2020-10-13 10:27:51 +02:00
RyoheiHagimoto 15c28e919d Modified the timing to wait UART completion in deep sleep function. 
Moved waiting UART transmission completion to the out of critical
section. This is issued by the following pull request.
https://github.com/ARMmbed/mbed-os/pull/11816
 2020-10-09 17:28:52 +09:00
jeromecoutant ee09ae904d STM32F4: align F412 and F411 linker scripts 2020-10-09 10:28:28 +02:00
Bora Özgen abb5b1221f
Merge branch 'master' into feature/f412xg-crash-ram 2020-10-09 08:52:26 +02:00
Bora Özgen 8c9d38f12a Align ARMC linker script with GCC 2020-10-09 08:48:55 +02:00
Peter B 669c703e46
Prevent warnings during compilations for MAX32620C 
In Mbed OS 5.12.0 mbed_toolchain.py has been introduced, that automatically defines the macro TARGET_NAME (on line 241). This leads to a high number of generating the following warning: 'TARGET_NAME' macro redefined while compiling code for MAX32620C on Mbed OS 5.12 and above. This patch fixes it, while it keeps the definition in place for lower versions that lack mbed_toolchain.py
 2020-10-08 17:28:12 +02:00
Peter B fee7a1c79a
Prevent warnings during compilations for MAX32625 
In Mbed OS 5.12.0 mbed_toolchain.py has been introduced, that automatically defines the macro TARGET_NAME (on line 241). This leads to a high number of generating the following warning: 'TARGET_NAME' macro redefined while compiling code for MAX32625 on Mbed OS 5.12 and above. This patch fixes it, while it keeps the definition in place for lower versions that lack mbed_toolchain.py
 2020-10-08 17:25:38 +02:00
Peter B 48c71b3649
Prevent warnings during compilations for MAX32630FTHR 
In Mbed OS 5.12.0 mbed_toolchain.py has been introduced, that automatically defines the macro TARGET_NAME (on line 241). This leads to a high number of generating the following warning: 'TARGET_NAME' macro redefined while compiling code for MAX32630FTHR on Mbed OS 5.12 and above. This patch fixes it, while it keeps the definition in place for lower versions that lack mbed_toolchain.py
 2020-10-08 17:23:06 +02:00
Peter B a9dfa0ceba
Define SD and STORAGE for the MAX32630FTHR 
MAX32630FTHR has an on-board uSD slot, but targets.json did not contain info about this until now.
Handling it in targets.json is a better idea than doing it via mbed_app.json as most people can not figure out how to do that.
 2020-10-08 16:08:40 +02:00
Chun-Chieh Li 82ce0243f9 Nuvoton: Enable fault handler dump message for M23 targets 
Support targets:
-   NUMAKER_IOT_M263A
-   NUMAKER_IOT_M252
 2020-10-08 14:18:25 +08:00
Bora Özgen 0c3879a553 Add crash RAM to STM32F412xG 2020-10-06 16:48:42 +02:00
jeromecoutant 282bc22247 STM32: update SetSysClock for NUCLEO_L476RG 
Change in case of clock_source is set to HSI or HSE
(not the default configuration)
 2020-10-06 15:11:34 +02:00
jeromecoutant 2d25882d1f STM32_gen_PeripheralPins.py v1.17 
- GPIO xml parsing correction (#13711)
- Octo SPI support
- bug correction
- warning style correction
- new TIM_MST choice algo
- full PinNames.h file creation
- output directory is now
    targets_custom/TARGET_STM/TARGET_STM32XX/TARGET_STM32XXXX
 2020-10-05 17:55:58 +02:00
Johnny Robeson 394c976f5f Remove unused Nordic TARGET_SDK_11 2020-09-30 20:22:48 -04:00
Martin Kojtal fbe04097c7
Merge pull request #13601 from AGlass0fMilk/fix-g474-adc 
Fix AnalogIn implementation on STM32G4 series
 2020-09-30 16:12:18 +01:00
Martin Kojtal 21652971a5
Merge pull request #12644 from macronix/macronix_ospi 
Add OSPI driver to support the Octa mode of Macronix octaflash MX25LM51245G
 2020-09-30 16:07:20 +01:00
Martin Kojtal 1f868f96de
Merge pull request #13646 from boraozgen/bugfix/system-clock-weak 
Make STM32F412xG system_clock.c functions weak
 2020-09-30 16:01:02 +01:00
Martin Kojtal 1dea16bc58
Merge pull request #13611 from alcheagle/stm32l071xx-fixes 
Edit on Toolchain linker files for stm32L071xx target
 2020-09-30 16:00:20 +01:00
Martin Kojtal efd385d6ce
Merge pull request #13679 from OpenNuvoton/nvt_i2c_timeout 
Nuvoton: Fix NuMaker I2C timeout
 2020-09-30 15:57:53 +01:00
Martin Kojtal 05ea20c44a
Merge pull request #13681 from winneymj/nrf52840_SPIM3_Updates 
Nrf52840 spim3 updates
 2020-09-30 15:56:36 +01:00
cyliangtw 3916026dd7 Commit M451/NANO100 i2c_api again to resolve abnormal gitattribute 2020-09-30 10:27:16 +08:00
winneymj d60af095ba Fix spacing 2020-09-29 17:55:06 -05:00
winneymj 38e6bdc8f4 Fixes for nrf52840 SPIM 3 implementation. Specifically: 
- Correct definition of SPI2C_INSTANCES when using SPIM vs SPI
- Use NRFX_SPIM_XFER_TRX macro vs manually filling structure.
- Fix compile error in NRFX_SPIM_DEFAULT_EXTENDED_CONFIG where ordering of members does not match structure nrfx_spim_config_t
- Use High Drive if using SPIM3 on MOSI and SCK pins.
 2020-09-29 17:13:30 -05:00
cyliangtw ffee35a5c8 Fix NuMaker I2C timeout, 
some H/W timer count is 24 bits only, hardcode 0xffffffff causing
  wrong judgement of timeout as while H/W timer counting overflow.
 2020-09-29 21:01:18 +08:00
Charley Chu 57f36264c5 psoc64: Update flash layout of CYTFM_064B0S2_4343W 
Only report the flash region that can be accessed by none-secure CPU

Signed-off-by: Charley Chu <haoc@cypress.com>
 2020-09-28 17:10:42 -07:00
Heuisam Kwag 6ff504a89f targets/s1sb6a: change UART_STDIO_PORT from UART0 to UART2 
Signed-off-by: Heuisam Kwag <heuisam@samsung.com>
 2020-09-29 08:32:49 +09:00
Heuisam Kwag f0679cca36 tartgets/s1sbp6a: fix afe clock initial value 
Signed-off-by: Heuisam Kwag <heuisam@samsung.com>
 2020-09-29 08:32:49 +09:00
Heuisam Kwag bc68113566 targets/s1sbp6a: fix uart baud rate setting of UART1~2 
Signed-off-by: Heuisam Kwag <heuisam@samsung.com>
 2020-09-29 08:32:35 +09:00
Heuisam Kwag 8fb4d80f29 targets/s1sbp6a: fix typo 
Signed-off-by: Heuisam Kwag <heuisam@samsung.com>
 2020-09-28 17:14:26 +09:00
Martin Kojtal f38aa597c8
Merge pull request #13632 from sdrstone1/master 
fix DAPLINK error for S1SBP6A Target using GNU Toolchain.
 2020-09-23 15:58:53 +01:00
Martin Kojtal f3d91fdba1
Merge pull request #13633 from jeromecoutant/PR_WB_FLASH_BARE 
STM32WB: FLASH compilation issue with baremetal
 2020-09-23 15:58:38 +01:00
Martin Kojtal cd9a0d1f49
Merge pull request #13634 from jeromecoutant/PR_L4_IAR 
STM32L4: link issue with IAR
 2020-09-23 15:57:35 +01:00
Martin Kojtal 60cbab381d
Merge pull request #13640 from isaev-d/fix-pll-stm32h743 
STM32: Fix system clock setup for XTAL and/or internal source on STM32H743
 2020-09-23 10:53:58 +01:00
Bora Özgen 011cd19175 Remove weak statement for HSI clock config 2020-09-23 10:59:00 +02:00
Martin Kojtal 66423948e0
Merge pull request #13645 from boraozgen/bugfix/stm32f412xg_usart3 
Patch STM32F4 HAL to fix F412CG USART3 issue
 2020-09-22 16:24:49 +01:00
George Beckstein 76d488ded1 Revert sampling time decrease and remove todos. 2020-09-22 09:32:14 -04:00
Andrea Gilardoni b99702094c fixing nvic num 2020-09-22 09:46:48 +02:00
Dmitriy Isaev 8597f6ae12 Removed excess space simbol. Also runtime config check changed to compile time check. 2020-09-21 20:17:45 +03:00
jeromecoutant bbc7355df5 Merge internal ADC channel changes from ST 
Co-authored-by: jeromecoutant <jerome.coutant@st.com>
 2020-09-21 12:26:23 -04:00
George Beckstein bbc15f65c0 Implemented adc deinitialization functionality 2020-09-21 12:19:50 -04:00
George Beckstein e9d6c9c0b1 Fix AnalogIn implementation on STM32G4 series 2020-09-21 12:19:50 -04:00
Bora Özgen 401a6b4f2b Apply review suggestions 2020-09-21 14:52:22 +02:00
Bora Özgen 9623d4e7fc Make system_clock.c functions weak 2020-09-21 13:51:29 +02:00
Bora Özgen 9b56a4cb82 Patch STM32F4 HAL to fix F412XG USART3 issue 2020-09-21 13:27:20 +02:00
Dmitriy Isaev 3f83163a63 Fixed system clock setup for XTAL and/or internal source on stm32f743 chips. 2020-09-20 16:26:25 +03:00
jeromecoutant 0af260fe43 STM32L4: link issue with IAR 2020-09-18 12:27:53 +02:00
jeromecoutant 49ceb3c4b6 STM32WB: FLASH compilation issue with baremetal 2020-09-18 11:47:15 +02:00
Martin Kojtal 33a538ab6c
Merge pull request #13593 from LDong-Arm/platform_storage_default_requirements 
STM32F: skip LittleFileSystem default instance and TDBStore tests
 2020-09-17 15:21:40 +01:00
Martin Kojtal 75544a7ce0
Merge pull request #13565 from m-ecry/feature-stm32g4-can-support 
Feature stm32g4 can support
 2020-09-17 15:08:46 +01:00
Martin Kojtal 3801f6e389
Merge pull request #13406 from Allmoz/master 
STM32F1 USBDevice
 2020-09-17 08:56:03 +01:00
KollHong dd1c59f588
Update startup_s1sbp6a.S 
fix DAPLINK "The transfer timed out." error
 2020-09-17 15:35:35 +09:00
m-ecry 73493b909a STM-can-api: Fixed variable name for H7 
- can_frequency uses f instead of hz for can frequency
 - Also added comment to system_clock
 2020-09-16 17:35:32 +02:00
Andrea Gilardoni 1d77cfa08b trying to fix startup file 2020-09-16 08:41:41 +02:00
rogeryou 48524f25ae add opsi driver 2020-09-16 11:27:23 +08:00
Andrea Gilardoni 303b3c28b6 making some cleaning 2020-09-15 11:25:47 +02:00
Andrea Gilardoni d5adca141b Edit on Toolchain linker files 
Previous one were not working, using nucleol073RZ files
 2020-09-15 11:13:03 +02:00
m-ecry 2a13fa199d STMG4-sys-clk: If can PLLQ=160MHz, else 170MHz 
- with 170MHz as can-core-frequency, the accuracy for many baudrates is
too low. 160MHz is better for a broad range of frequencies
 2020-09-14 18:15:41 +02:00
m-ecry d0c8ad75e1 STM-can-api: Support reading of remote_msg 
- Previously a received msg was fixed of data_type
 2020-09-14 18:10:48 +02:00
m-ecry 13b663397f STM-can-api: Added usage of prescaler 
- This enables more frequencies, but without regard to the accuracy.
May still require manual clock setup, to remain in tolerance window
 2020-09-14 16:29:12 +02:00
Martin Eckardt 35c9e7a5ad Use HAL function for FDCAN_CLK-calculation 
- Thanks to @jeromecoutant for showing the HAL funtion
 - Added #ifdef guard to FDCAN2/3 handler functions
 2020-09-14 15:24:14 +02:00
Lingkai Dong 84f3444691 Add config target.internal-flash-uniform-sectors and set it to false for STM32L2/4/7 
Some internal flashes have non-uniform sectors, and for those
ones we want to skip the initialization of default LittleFileSystem
on FlashIAPBlockDevice (unless the user specifies an address
range that's uniform).

This commit adds a config to indicate if sectors are uniform.
 2020-09-11 09:49:53 +01:00
Martin Kojtal 6bfd89e656
Merge pull request #13196 from gbrtth/musca_s1_support_mbed6 
Add ARM_MUSCA_S1 as a new target platform
 2020-09-10 16:53:14 +01:00
Martin Kojtal f7d5dfbe3b
Merge pull request #13587 from jeromecoutant/PR_G031 
MCU_STM32G031xx : decrease boot-stack-size
 2020-09-10 15:04:47 +01:00
Martin Kojtal 47e943af2d
Merge pull request #13558 from jeromecoutant/PR_L4PLUS_SRAM3 
STM32L4+ : SRAM3 is powered off in deepsleep
 2020-09-10 14:03:32 +01:00
Mark Horvath 37f26692b1 Workaround to fix clang build 
Change-Id: Ib0d207d4ca22ae239f6b40b95618b66eb329a29c
Signed-off-by: Mark Horvath <mark.horvath@arm.com>
 2020-09-10 13:59:32 +01:00
Gabor Toth bdf2306f16 Add platform support to Musca S1 
Change-Id: Iebdd4bc402446caba6b7bd894eddb0a85ed884d8
Signed-off-by: Mark Horvath <mark.horvath@arm.com>
Signed-off-by: Gabor Toth <gabor.toth@arm.com>
 2020-09-10 14:53:41 +02:00
jeromecoutant 2441e150a4 MCU_STM32G031xx : decrease boot-stack-size 
As a small RAM target,
default boot-stack-size is decreased
for baremetal full support
 2020-09-10 14:38:09 +02:00
Martin Kojtal 468372e759
Merge pull request #13492 from talorion/fix-PwmOut-resets-after-suspend 
Fix pwm out resets after suspend
 2020-09-10 12:40:18 +01:00
Martin Kojtal a17a481c54
Merge pull request #13583 from jeromecoutant/PR_ARDUINO_PIN 
STM32: correct few Arduino pins value
 2020-09-10 12:38:02 +01:00
Martin Kojtal e2077197d9
Merge pull request #13452 from Patater/conf-boot-stack-size 
Use boot stack size from config system
 2020-09-10 12:32:05 +01:00
Martin Kojtal 267a5ac5bf
Merge pull request #13538 from sparkfun/ambiq-apollo3-dev-squash 
Ambiq AMA3B1KK and SparkFun Artemis Boards Target Update
 2020-09-10 11:53:04 +01:00
Jaeden Amero 612b148fd4 stack: armc: Workaround config passing bug 
Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
 2020-09-10 10:08:38 +01:00
Hugues Kamba 2ed7403e3e NRF52: Fix failure if boot stack size is not provided 
The same default value is provided in the GCC_ARM linker file.
 2020-09-10 10:08:38 +01:00
Jaeden Amero 39e69d328d Use boot stack size from config system 
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319
 2020-09-10 10:08:38 +01:00
jeromecoutant 668412ccde NUCLEO_L433RC_P: wrong D0 and D1 pins 2020-09-10 10:05:41 +02:00
jeromecoutant 5bcb02a013 DISCO_L072CZ_LRWAN1: wrong A1/A3/A4/A5 pin values 2020-09-10 10:05:41 +02:00
jeromecoutant e695db9944 NUCLEO_F207ZG: change default SPI_MOSI pin to match Arduino standard 2020-09-10 10:05:40 +02:00
jeromecoutant 3e653223d2 NUCLEO_F303ZE: wrong D1 pins 2020-09-10 10:05:40 +02:00
jeromecoutant d20385e396 STM32G4: remove ADC support 
Waiting for implementation and test
 2020-09-10 10:05:40 +02:00
jeromecoutant 88fcd669d4 NUCLEO_L552ZE_Q: wrong D0 and D1 pins 2020-09-10 10:05:40 +02:00
Wenn0101 c2bddbbc57 Apollo3 and artemis, remove dead code and include relevant header 2020-09-09 16:43:59 -06:00
Wenn0101 e97ebc033a Apollo3 and artemis code review changes, remvoe dead code, add missing spdx identifiers, fix style 2020-09-09 15:47:23 -06:00
Mark Lamb 9ffd462a28 Support 31250 baud rate 2020-09-09 20:13:11 +01:00
Martin Kojtal 3b5ab54618
Merge pull request #13542 from jeromecoutant/PR_DISCO_L4S 
B_L4S5I_IOT01A: new ST target
 2020-09-09 15:54:27 +01:00
Martin Kojtal 1f6fe470e1
Merge pull request #13564 from More-Wrong/LSI-for-STM32Gx 
STM32Gx: LSI clock selection when LSE is not available
 2020-09-09 15:16:44 +01:00
jeromecoutant 423bea50e6 B_L4S5I_IOT01A: BLE support 2020-09-09 15:19:21 +02:00
jeromecoutant 7dfe7024f0 B_L4S5I_IOT01A: HW crypto support 2020-09-09 15:19:21 +02:00
jeromecoutant d804167816 STM32L4S5xI: B_L4S5I_IOT01A new target 2020-09-09 15:19:21 +02:00
jeromecoutant c65ad59ccd STM32L4S5xI introduction 2020-09-09 15:19:11 +02:00
Martin Kojtal ae8d5a4fb6
Merge pull request #13574 from amq/patch-4 
Fix a typo in PeripheralPins.c for EFM32GG11
 2020-09-09 09:51:40 +01:00
Martin Kojtal 511c89728f
Merge pull request #13572 from jeromecoutant/PR_H7_ADC2 
STM32H7 ADC: clock selection lost after deepsleep
 2020-09-09 09:51:34 +01:00
Martin Kojtal 0190014103
Merge pull request #13547 from OpenNuvoton/nvt_nuc472_sd 
Nuvoton: Fixed NUC472 SD buffer alignment
 2020-09-09 09:51:17 +01:00
Martin Kojtal 2fe10ddb21
Merge pull request #13516 from romanjoe/pr/064b0s2_rename 
Cypress: Rename CY8CKIT_064B0S2_4343W to CY8CKIT064B0S2_4343W
 2020-09-09 09:49:19 +01:00
Wenn0101 68d59d3781 Add new targets, Ambiq Apollo3 and Sparkfun Electronics, SFE, boards 2020-09-09 01:13:05 -06:00
talorion b1eedc0a7c fixed order of operations 2020-09-08 17:08:06 +02:00
talorion 0361627c33 fixed order of operations 2020-09-08 16:53:29 +02:00
amq 6da9237f6f
Fix a typo in PeripheralPins.c for EFM32GG11 
- PF13 had the same value as PF15
 2020-09-08 12:04:32 +00:00
jeromecoutant b65afe028e STM32H7 ADC: clock selection lost after deepsleep 2020-09-08 11:40:02 +02:00
talorion e117ef5c3c use descriptive variable names 2020-09-08 10:54:09 +02:00
Robert 14ac4064b7 STM32Gx: LSI clock selection when LSE is not available 2020-09-07 14:47:11 +01:00