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Merge pull request #13452 from Patater/conf-boot-stack-size 

Use boot stack size from config system
pull/13587/head
Martin Kojtal 2020-09-10 12:32:05 +01:00 committed by GitHub
parent 8a22d3500a 612b148fd4
commit e2077197d9
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
438 changed files with 2072 additions and 1444 deletions
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6
docs/design-documents/platform/memory-model/ram_memory_model.md
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@ -90,8 +90,8 @@ Phase 2:
Note: Heap split support across multiple RAM banks, can also be achieved post this change.
# Detailed Design
1. Update tools to set define `MBED_BOOT_STACK_SIZE` from target config option `target.boot-stack-size`
1. Linker Scripts - Update linker scripts for ARM, IAR and GCC toolchain to use MBED_BOOT_STACK_SIZE define for standardizing size of ISR stack.
1. Update tools to set define `MBED_CONF_TARGET_BOOT_STACK_SIZE` from target config option `target.boot-stack-size`
1. Linker Scripts - Update linker scripts for ARM, IAR and GCC toolchain to use MBED_CONF_TARGET_BOOT_STACK_SIZE define for standardizing size of ISR stack.
1. Update __user_setup_stackheap() implementation to adopt 2-region RAM memory model.
__user_setup_stackheap() works with systems where the application starts with a value of sp (r13) that is already correct. To make use of sp(stack base), implement __user_setup_stackheap() to set up r0 (heap base), r2 (heap limit), and r3 (stack limit) (for a two-region model) and return.
Reference http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.kui0099a/armlib_cjagaaha.htm http://www.keil.com/support/man/docs/armlib/armlib_chr1359122863069.htm
@ -99,7 +99,7 @@ Reference http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.kui0099a/a
# Tools and configuration changes
1. Target config option "target.boot-stack-size" which is passed to the linker as the define "MBED_BOOT_STACK_SIZE" so the linker can adjust the stack accordingly.
1. Target config option "target.boot-stack-size" which is passed to the linker as the define "MBED_CONF_TARGET_BOOT_STACK_SIZE" so the linker can adjust the stack accordingly.
Boot stack size - the size of ISR and main stack will be 4K as default in targets.json for bare metal (non-RTOS) builds.
Boot stack size - the size of ISR stack will be over-written as 1K in `rtos/mbed_lib.json` for RTOS builds.

2
hal/tests/TESTS/mbed_hal/stack_size_unification/main.cpp
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@ -37,7 +37,7 @@ extern uint32_t mbed_stack_isr_size;
#define EXPECTED_USER_THREAD_DEFAULT_STACK_SIZE (MBED_CONF_RTOS_THREAD_STACK_SIZE)
#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (EXPECTED_MAIN_THREAD_STACK_SIZE + EXPECTED_ISR_STACK_SIZE))
#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (EXPECTED_MAIN_THREAD_STACK_SIZE + EXPECTED_ISR_STACK_SIZE))
#error [NOT_SUPPORTED] Insufficient stack for staci_size_unification tests
#endif

2
storage/blockdevice/tests/TESTS/blockdevice/heap_block_device/main.cpp
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@ -28,7 +28,7 @@ using namespace utest::v1;
#define TEST_BLOCK_COUNT 10
#define TEST_ERROR_MASK 16
#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= TEST_BLOCK_DEVICE_SIZE)
#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= TEST_BLOCK_DEVICE_SIZE)
#error [NOT_SUPPORTED] Insufficient heap for heap block device tests
#endif

2
storage/blockdevice/tests/TESTS/blockdevice/mbr_block_device/main.cpp
View File

@ -27,7 +27,7 @@ using namespace utest::v1;
#define BLOCK_COUNT 16
#define BLOCK_SIZE 512
#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE))
#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE))
#error [NOT_SUPPORTED] Insufficient heap for mbr block device tests
#endif

2
storage/blockdevice/tests/TESTS/blockdevice/util_block_device/main.cpp
View File

@ -29,7 +29,7 @@ using namespace utest::v1;
#define BLOCK_COUNT 16
#define BLOCK_SIZE 512
#if ((MBED_RAM_SIZE - MBED_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE))
#if ((MBED_RAM_SIZE - MBED_CONF_TARGET_BOOT_STACK_SIZE) <= (BLOCK_COUNT * BLOCK_SIZE))
#error [NOT_SUPPORTED] Insufficient heap for util block device tests
#endif

10
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct
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@ -38,14 +38,18 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -31,8 +31,8 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
MEMORY
@ -69,7 +69,7 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0/device/TOOLCHAIN_IAR/MPS2.icf
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@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

10
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -38,14 +38,18 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_GCC_ARM/MPS2.ld
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@ -31,8 +31,8 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
MEMORY
@ -69,7 +69,7 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M0P/device/TOOLCHAIN_IAR/MPS2.icf
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@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

10
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -38,14 +38,18 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -31,8 +31,8 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
MEMORY
@ -69,7 +69,7 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M3/device/TOOLCHAIN_IAR/MPS2.icf
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@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

10
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -38,14 +38,18 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -31,8 +31,8 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
MEMORY
@ -69,7 +69,7 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M4/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

10
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -38,14 +38,18 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#if (defined(__stack_size__))
#define STACK_SIZE __stack_size__
#else
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif
; The vector table is loaded at address 0x00000000 in Flash memory region.

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_GCC_ARM/MPS2.ld
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@ -31,8 +31,8 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
MEMORY
@ -69,7 +69,7 @@ MEMORY
*/
ENTRY(Reset_Handler)
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

6
targets/TARGET_ARM_FM/TARGET_FVP_MPS2/TARGET_FVP_MPS2_M7/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -46,11 +46,11 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SRAM2_START + ZBT_SRAM2_SIZE
/*-Sizes-*/
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = 0x200000;
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/**** End of ICF editor section. ###ICF###*/
define memory mem with size = 4G;

10
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_ARM_STD/MPS2.sct
View File

@ -29,11 +29,15 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
; The vector table is loaded at address 0x00000000 in Flash memory region.
LR_IROM1 FLASH_START FLASH_SIZE {

6
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_GCC_ARM/MPS2.ld
View File

@ -25,8 +25,8 @@
#include "../memory_zones.h"
#include "../cmsis_nvic.h"
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
MEMORY
@ -65,7 +65,7 @@ MEMORY
ENTRY(Reset_Handler)
HEAP_SIZE = 0x4000;
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = NVIC_VECTORS_SIZE;

6
targets/TARGET_ARM_SSG/TARGET_CM3DS_MPS2/device/TOOLCHAIN_IAR/MPS2.icf
View File

@ -57,10 +57,10 @@ define symbol __ICFEDIT_region_RAM_end__ = ZBT_SSRAM23_START + ZBT_SSRAM23_
/* Sizes */
/* Heap and Stack size */
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_heap__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = 0x1000;
define memory mem with size = 4G;

10
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0/device/TOOLCHAIN_ARM_STD/MPS2.sct
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@ -34,11 +34,15 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address

10
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M0P/device/TOOLCHAIN_ARM_STD/MPS2.sct
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@ -34,11 +34,15 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address

10
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M3/device/TOOLCHAIN_ARM_STD/MPS2.sct
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@ -34,11 +34,15 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address

10
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M4/device/TOOLCHAIN_ARM_STD/MPS2.sct
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@ -35,11 +35,15 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address

10
targets/TARGET_ARM_SSG/TARGET_MPS2/TARGET_MPS2_M7/device/TOOLCHAIN_ARM_STD/MPS2.sct
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@ -35,11 +35,15 @@
; *** Scatter-Loading Description File ***
; *************************************************************
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x00400000 { ; load region size_region
ER_IROM1 0x00000000 0x00400000 { ; load address = execution address

12
targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct
View File

@ -39,11 +39,15 @@
#define VECTOR_SIZE NVIC_RAM_VECTOR_SIZE
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE)
LR_CODE MBED_ROM_START MBED_ROM_SIZE {
ER_CODE MBED_ROM_START MBED_ROM_SIZE {
@ -59,6 +63,6 @@ LR_CODE MBED_ROM_START MBED_ROM_SIZE {
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
}
}

6
targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld
View File

@ -26,8 +26,8 @@
#include "../cmsis_nvic.h"
/* Stack size is 1K for Mbed-OS */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
MEMORY
@ -37,7 +37,7 @@ MEMORY
RAM (rwx) : ORIGIN = NVIC_RAM_VECTOR_LIMIT, LENGTH = (NS_DATA_SIZE - NVIC_RAM_VECTOR_SIZE)
}
__stack_size__ = MBED_BOOT_STACK_SIZE;
__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Library configurations */
GROUP(libgcc.a libc.a libm.a libnosys.a)

10
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_ARM_STD/ADuCM3029.sct
View File

@ -45,11 +45,15 @@
#define ADUCM_VECTOR_SIZE 0x1A0
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE {

6
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_GCC_ARM/ADuCM3029.ld
View File

@ -33,10 +33,10 @@ MEMORY
/* Library configurations */
GROUP(libgcc.a libc.a libm.a libnosys.a)
/* Custom stack and heap sizes */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
__stack_size__ = MBED_BOOT_STACK_SIZE;
__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
__heap_size__ = 0x2000;
/* select custom or default sizes for stack and heap */

6
targets/TARGET_Analog_Devices/TARGET_ADUCM302X/TARGET_ADUCM3029/TOOLCHAIN_IAR/ADuCM3029.icf
View File

@ -38,8 +38,8 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0x40000;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol ADUCM_SECTOR_SIZE = 0x800;
@ -53,7 +53,7 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO
define region RAM_bank1_region = mem:[from 0x20000200 size 0x00003E00];
define region RAM_bank2_region = mem:[from 0x20004000 size 0x00004000]
| mem:[from 0x20040000 size 0x00007000];
define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { };
define block CSTACK with alignment = 16, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { };
define block HEAP with alignment = 16, size = 0x2000 { };
do not initialize { section .noinit };
initialize by copy { rw };

10
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_ARM_STD/ADuCM4050.sct
View File

@ -42,11 +42,15 @@
#define ADUCM_VECTOR_SIZE 0x1A0
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 MBED_APP_START MBED_APP_SIZE {
FLASH0 MBED_APP_START ADUCM_VECTOR_SIZE {

6
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_GCC_ARM/ADuCM4050.ld
View File

@ -34,10 +34,10 @@ MEMORY
GROUP(libgcc.a libc.a libm.a libnosys.a)
/* Custom stack and heap sizes */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
__stack_size__ = MBED_BOOT_STACK_SIZE;
__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
__heap_size__ = 0x6000;
/* select custom or default sizes for stack and heap */

6
targets/TARGET_Analog_Devices/TARGET_ADUCM4X50/TARGET_ADUCM4050/TOOLCHAIN_IAR/ADuCM4050.icf
View File

@ -38,8 +38,8 @@ if (!isdefinedsymbol(MBED_APP_SIZE)) {
define symbol MBED_APP_SIZE = 0x7F000;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol ADUCM_SECTOR_SIZE = 0x800;
@ -53,7 +53,7 @@ define region ROM_REGION = mem:[from MBED_APP_START+ADUCM_SECTO
define region RAM_bank1_region = mem:[from 0x20040000 size 0x00008000];
define region RAM_bank2_region = mem:[from 0x20000200 size 0x00006E00]
| mem:[from 0x20048000 size 0x00010000];
define block CSTACK with alignment = 16, size = MBED_BOOT_STACK_SIZE { };
define block CSTACK with alignment = 16, size = MBED_CONF_TARGET_BOOT_STACK_SIZE { };
define block HEAP with alignment = 16, size = 0x6000 { };
do not initialize { section .noinit };
initialize by copy { rw };

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct
View File

@ -79,11 +79,15 @@
#endif
; The size of the stack section at the end of CM0+ SRAM
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cyb06xxa_cm0plus.ld
View File

@ -77,11 +77,11 @@ ENTRY(Reset_Handler)
#endif
/* The size of the stack section at the end of CM0+ SRAM */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cyb06xxa_cm0plus.icf
View File

@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_proc_stack__ = 0x0;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct
View File

@ -84,12 +84,16 @@
#define MBED_RAM_SIZE 0x000DE800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld
View File

@ -82,12 +82,12 @@ BOOT_HEADER_SIZE = 0x400;
#define MBED_RAM_SIZE 0x000DE800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cyb06xxa_cm4_dual.icf
View File

@ -83,16 +83,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x000DE800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct
View File

@ -79,11 +79,15 @@
#endif
; The size of the stack section at the end of CM0+ SRAM
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld
View File

@ -77,11 +77,11 @@ ENTRY(Reset_Handler)
#endif
/* The size of the stack section at the end of CM0+ SRAM */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf
View File

@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_proc_stack__ = 0x0;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct
View File

@ -81,12 +81,16 @@
#define MBED_RAM_SIZE 0x000FD800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld
View File

@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000;
#define MBED_RAM_SIZE 0x000FD800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062S2_43012/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf
View File

@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x000FD800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct
View File

@ -79,11 +79,15 @@
#endif
; The size of the stack section at the end of CM0+ SRAM
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld
View File

@ -77,11 +77,11 @@ ENTRY(Reset_Handler)
#endif
/* The size of the stack section at the end of CM0+ SRAM */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf
View File

@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_proc_stack__ = 0x0;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct
View File

@ -81,12 +81,16 @@
#define MBED_RAM_SIZE 0x00045800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld
View File

@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000;
#define MBED_RAM_SIZE 0x00045800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_BLE/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf
View File

@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x00045800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct
View File

@ -79,11 +79,15 @@
#endif
; The size of the stack section at the end of CM0+ SRAM
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld
View File

@ -77,11 +77,11 @@ ENTRY(Reset_Handler)
#endif
/* The size of the stack section at the end of CM0+ SRAM */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf
View File

@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_proc_stack__ = 0x0;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct
View File

@ -81,12 +81,16 @@
#define MBED_RAM_SIZE 0x00045800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld
View File

@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000;
#define MBED_RAM_SIZE 0x00045800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf
View File

@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x00045800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx5_cm0plus.sct
View File

@ -79,11 +79,15 @@
#endif
; The size of the stack section at the end of CM0+ SRAM
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm0plus.ld
View File

@ -77,11 +77,11 @@ ENTRY(Reset_Handler)
#endif
/* The size of the stack section at the end of CM0+ SRAM */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx5_cm0plus.icf
View File

@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_proc_stack__ = 0x0;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx5_cm4_dual.sct
View File

@ -81,12 +81,16 @@
#define MBED_RAM_SIZE 0x0003D800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx5_cm4_dual.ld
View File

@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000;
#define MBED_RAM_SIZE 0x0003D800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062S3_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx5_cm4_dual.icf
View File

@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x0003D800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xxa_cm0plus.sct
View File

@ -79,11 +79,15 @@
#endif
; The size of the stack section at the end of CM0+ SRAM
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm0plus.ld
View File

@ -77,11 +77,11 @@ ENTRY(Reset_Handler)
#endif
/* The size of the stack section at the end of CM0+ SRAM */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xxa_cm0plus.icf
View File

@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_proc_stack__ = 0x0;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct
View File

@ -81,12 +81,16 @@
#define MBED_RAM_SIZE 0x000FD800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld
View File

@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000;
#define MBED_RAM_SIZE 0x000FD800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_062_4343W/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf
View File

@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x000FD800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xxa_cm4_dual.sct
View File

@ -75,12 +75,16 @@
#define MBED_RAM_SIZE 0x7F800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xxa_cm4_dual.ld
View File

@ -72,12 +72,12 @@ ENTRY(Reset_Handler)
#define MBED_RAM_SIZE 0x7F800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYSBSYSKIT_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xxa_cm4_dual.icf
View File

@ -73,16 +73,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x7F800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

12
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4_dual.sct
View File

@ -84,8 +84,12 @@
#define MBED_RAM_SIZE NS_DATA_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE NS_MSP_STACK_SIZE
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE NS_MSP_STACK_SIZE
# endif
#endif
; Shared memory area between Non-secure and Secure
@ -177,12 +181,12 @@ LR_IROM1 FLASH_START FLASH_SIZE
}
; Application heap area (HEAP)
ARM_LIB_HEAP +0 ALIGN 4 EMPTY RAM_START+RAM_SIZE-MBED_BOOT_STACK_SIZE-MBED_DATA_SHARED_SIZE-ImageLimit(RW_IRAM1)
ARM_LIB_HEAP +0 ALIGN 4 EMPTY RAM_START+RAM_SIZE-MBED_CONF_TARGET_BOOT_STACK_SIZE-MBED_DATA_SHARED_SIZE-ImageLimit(RW_IRAM1)
{
}
; Stack region growing down
ARM_LIB_STACK RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE ALIGN 4 EMPTY -MBED_BOOT_STACK_SIZE
ARM_LIB_STACK RAM_START+RAM_SIZE-MBED_DATA_SHARED_SIZE ALIGN 4 EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE
{
}

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYTFM_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cyb06xxa_cm4_dual.ld
View File

@ -78,8 +78,8 @@ BOOT_HEADER_SIZE = 0x400;
#define MBED_RAM_SIZE NS_DATA_SIZE
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE NS_MSP_STACK_SIZE
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE NS_MSP_STACK_SIZE
#endif
/* Shared memory area between Non-Secure and Secure */
@ -336,14 +336,14 @@ SECTIONS
__end__ = .;
end = __end__;
KEEP(*(.heap*))
. = ORIGIN(ram) + LENGTH(ram) - MBED_BOOT_STACK_SIZE - MBED_DATA_SHARED_SIZE;
. = ORIGIN(ram) + LENGTH(ram) - MBED_CONF_TARGET_BOOT_STACK_SIZE - MBED_DATA_SHARED_SIZE;
. = ALIGN(4);
__StackLimit = .;
__HeapLimit = .;
} > ram
__StackTop = (__StackLimit + MBED_BOOT_STACK_SIZE + 3) & 0xFFFFFFFC;
__StackTop = (__StackLimit + MBED_CONF_TARGET_BOOT_STACK_SIZE + 3) & 0xFFFFFFFC;
PROVIDE(__stack = __StackTop);
.shared __StackTop (NOLOAD):

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct
View File

@ -79,11 +79,15 @@
#endif
; The size of the stack section at the end of CM0+ SRAM
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld
View File

@ -77,11 +77,11 @@ ENTRY(Reset_Handler)
#endif
/* The size of the stack section at the end of CM0+ SRAM */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf
View File

@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_proc_stack__ = 0x0;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct
View File

@ -81,12 +81,16 @@
#define MBED_RAM_SIZE 0x00045800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld
View File

@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000;
#define MBED_RAM_SIZE 0x00045800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43012EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf
View File

@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x00045800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cy8c6xx7_cm0plus.sct
View File

@ -79,11 +79,15 @@
#endif
; The size of the stack section at the end of CM0+ SRAM
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm0plus.ld
View File

@ -77,11 +77,11 @@ ENTRY(Reset_Handler)
#endif
/* The size of the stack section at the end of CM0+ SRAM */
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_PUBLIC_RAM_START)
#define MBED_PUBLIC_RAM_START (MBED_RAM_START + MBED_RAM_SIZE - STACK_SIZE - MBED_PUBLIC_RAM_SIZE)

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM0P/TOOLCHAIN_IAR/cy8c6xx7_cm0plus.icf
View File

@ -77,16 +77,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
if (!isdefinedsymbol(MBED_PUBLIC_RAM_SIZE)) {
define symbol MBED_PUBLIC_RAM_SIZE = 0x200;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_proc_stack__ = 0x0;

10
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_ARM/cy8c6xx7_cm4_dual.sct
View File

@ -81,12 +81,16 @@
#define MBED_RAM_SIZE 0x00045800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; The size of the stack section at the end of CM4 SRAM
#define STACK_SIZE MBED_BOOT_STACK_SIZE
#define STACK_SIZE MBED_CONF_TARGET_BOOT_STACK_SIZE
; The defines below describe the location and size of blocks of memory in the target.
; Use these defines to specify the memory regions available for allocation.

6
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_GCC_ARM/cy8c6xx7_cm4_dual.ld
View File

@ -79,12 +79,12 @@ FLASH_CM0P_SIZE = 0x2000;
#define MBED_RAM_SIZE 0x00045800
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* The size of the stack section at the end of CM4 SRAM */
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* Force symbol to be entered in the output file as an undefined symbol. Doing
* this may, for example, trigger linking of additional modules from standard

8
targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYW9P62S1_43438EVB_01/device/COMPONENT_CM4/TOOLCHAIN_IAR/cy8c6xx7_cm4_dual.icf
View File

@ -80,16 +80,16 @@ if (!isdefinedsymbol(MBED_RAM_SIZE)) {
define symbol MBED_RAM_SIZE = 0x00045800;
}
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
if (!isdefinedsymbol(__STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x0400;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x0400;
} else {
define symbol MBED_BOOT_STACK_SIZE = __STACK_SIZE;
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = __STACK_SIZE;
}
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
/* The symbols below define the location and size of blocks of memory in the target.
* Use these symbols to specify the memory regions available for allocation.

12
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_MICRO/MKL25Z4.sct
View File

@ -17,14 +17,18 @@
#endif
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
; 8_byte_aligned(48 vect * 4 bytes) = 8_byte_aligned(0xC0) = 0xC0
#define VECTOR_SIZE 0xC0
#define RAM_FIXED_SIZE (MBED_BOOT_STACK_SIZE+VECTOR_SIZE)
#define RAM_FIXED_SIZE (MBED_CONF_TARGET_BOOT_STACK_SIZE+VECTOR_SIZE)
LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
@ -41,6 +45,6 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_SIZE-RAM_FIXED_SIZE+MBED_RAM_START-AlignExpr(ImageLimit(RW_IRAM1), 16)) {
}
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_BOOT_STACK_SIZE { ; stack
ARM_LIB_STACK (MBED_RAM_START+MBED_RAM_SIZE) EMPTY -MBED_CONF_TARGET_BOOT_STACK_SIZE { ; stack
}
}

10
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_ARM_STD/MKL25Z4.sct
View File

@ -1,10 +1,14 @@
#! armcc -E
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x20000 { ; load region size_region (32k)
ER_IROM1 0x00000000 0x20000 { ; load address = execution address

6
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_GCC_ARM/MKL25Z4.ld
View File

@ -2,11 +2,11 @@
* KL25Z ARM GCC linker script file
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
MEMORY
{

6
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/device/TOOLCHAIN_IAR/MKL25Z4.icf
View File

@ -11,10 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1ffff0bf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1ffff0c0;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0xC00;
/**** End of ICF editor section. ###ICF###*/

10
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_ARM_STD/MKL46Z4.sct
View File

@ -1,10 +1,14 @@
#! armcc -E
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
LR_IROM1 0x00000000 0x40000 { ; load region size_region (256k)
ER_IROM1 0x00000000 0x40000 { ; load address = execution address

6
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_GCC_ARM/MKL46Z4.ld
View File

@ -2,11 +2,11 @@
* KL46Z ARM GCC linker script file
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
STACK_SIZE = MBED_BOOT_STACK_SIZE;
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
MEMORY
{

6
targets/TARGET_Freescale/TARGET_KLXX/TARGET_KL46Z/device/TOOLCHAIN_IAR/MKL46Z4.icf
View File

@ -11,10 +11,10 @@ define symbol __ICFEDIT_region_NVIC_end__ = 0x1fffe0bf;
define symbol __ICFEDIT_region_RAM_start__ = 0x1fffe0c0;
define symbol __ICFEDIT_region_RAM_end__ = 0x1fffffff;
/*-Sizes-*/
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_cstack__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __ICFEDIT_size_heap__ = 0x4000;
/**** End of ICF editor section. ###ICF###*/

10
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_ARM_STD/MK66FN2M0xxx18.sct
View File

@ -81,15 +81,19 @@
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif
LR_IROM1 m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_GCC_ARM/MK66FN2M0xxx18.ld
View File

@ -44,8 +44,8 @@
** ###################################################################
*/
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
#endif
/* Entry Point */
@ -55,7 +55,7 @@ __ram_vector_table__ = 1;
/* With the RTOS in use, this does not affect the main stack size. The size of
* the stack where main runs is determined via the RTOS. */
__stack_size__ = MBED_BOOT_STACK_SIZE;
__stack_size__ = MBED_CONF_TARGET_BOOT_STACK_SIZE;
#if !defined(MBED_APP_START)
#define MBED_APP_START 0

6
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/device/TOOLCHAIN_IAR/MK66FN2M0xxx18.icf
View File

@ -45,10 +45,10 @@
*/
define symbol __ram_vector_table__ = 1;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
if (!isdefinedsymbol(MBED_CONF_TARGET_BOOT_STACK_SIZE)) {
define symbol MBED_CONF_TARGET_BOOT_STACK_SIZE = 0x400;
}
define symbol __stack_size__=MBED_BOOT_STACK_SIZE;
define symbol __stack_size__=MBED_CONF_TARGET_BOOT_STACK_SIZE;
define symbol __heap_size__=0x10000;
if (!isdefinedsymbol(MBED_APP_START)) {

10
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K82F/device/TOOLCHAIN_ARM_STD/MK82FN256xxx15.sct
View File

@ -77,15 +77,19 @@
#define m_data_2_start 0x20000000
#define m_data_2_size 0x00030000
#if !defined(MBED_BOOT_STACK_SIZE)
#define MBED_BOOT_STACK_SIZE 0x400
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
# if defined(MBED_BOOT_STACK_SIZE)
# define MBED_CONF_TARGET_BOOT_STACK_SIZE MBED_BOOT_STACK_SIZE
# else
# define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
# endif
#endif
/* Sizes */
#if (defined(__stack_size__))
#define Stack_Size __stack_size__
#else
#define Stack_Size MBED_BOOT_STACK_SIZE
#define Stack_Size MBED_CONF_TARGET_BOOT_STACK_SIZE
#endif
#if (defined(__heap_size__))

Some files were not shown because too many files have changed in this diff Show More