mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #13681 from winneymj/nrf52840_SPIM3_Updates
Nrf52840 spim3 updatespull/13691/head
commit
05ea20c44a
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@ -15,6 +15,7 @@
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* limitations under the License.
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*/
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#include "sdk_config.h"
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#include "object_owners.h"
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#include "nrf.h"
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@ -22,9 +23,13 @@
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#include <stdio.h>
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#if NRFX_SPIM_ENABLED
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#define SPI2C_INSTANCES SPIM_COUNT
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#elif NRFX_SPI_ENABLED
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#define SPI2C_INSTANCES SPI_COUNT
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#endif
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static void * nordic_spi2c_owners[SPI2C_INSTANCES] = { NULL, NULL, NULL };
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static void * nordic_spi2c_owners[SPI2C_INSTANCES] = { NULL };
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/**
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* Brief Set instance owner for the SPI/I2C peripheral.
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@ -480,11 +480,6 @@ void spi_frequency(spi_t *obj, int hz)
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int spi_master_write(spi_t *obj, int value)
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{
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nrfx_err_t ret;
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#if NRFX_CHECK(NRFX_SPIM_ENABLED)
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nrfx_spim_xfer_desc_t desc;
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#elif NRFX_CHECK(NRFX_SPI_ENABLED)
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nrfx_spi_xfer_desc_t desc;
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#endif
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#if DEVICE_SPI_ASYNCH
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struct spi_s *spi_inst = &obj->spi;
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@ -507,18 +502,20 @@ int spi_master_write(spi_t *obj, int value)
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}
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/* Transfer 1 byte. */
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desc.p_tx_buffer = &tx_buff;
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desc.p_rx_buffer = &rx_buff;
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desc.tx_length = 1;
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desc.rx_length = 1;
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#if NRFX_CHECK(NRFX_SPIM_ENABLED)
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#if NRFX_CHECK(NRFX_SPIM_ENABLED)
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nrfx_spim_xfer_desc_t desc = NRFX_SPIM_XFER_TRX(&tx_buff, 1, &rx_buff, 1);
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#elif NRFX_CHECK(NRFX_SPI_ENABLED)
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nrfx_spi_xfer_desc_t desc = NRFX_SPI_XFER_TRX(&tx_buff, 1, &rx_buff, 1);
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#endif
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#if NRFX_CHECK(NRFX_SPIM_ENABLED)
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ret = nrfx_spim_xfer(&nordic_nrf5_spim_instance[instance], &desc, 0);
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#elif NRFX_CHECK(NRFX_SPI_ENABLED)
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#elif NRFX_CHECK(NRFX_SPI_ENABLED)
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ret = nrfx_spi_xfer(&nordic_nrf5_spi_instance[instance], &desc, 0);
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#endif
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if (ret != NRFX_SUCCESS) {
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DEBUG_PRINTF("%d error returned from nrf_spi_xfer\n\r");
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DEBUG_PRINTF("%d error returned from nrf_spi_xfer\n\r", ret);
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}
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/* Manually set chip select pin if defined. */
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@ -547,12 +544,6 @@ int spi_master_write(spi_t *obj, int value)
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*/
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int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, char *rx_buffer, int rx_length, char write_fill)
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{
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#if NRFX_CHECK(NRFX_SPIM_ENABLED)
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nrfx_spim_xfer_desc_t desc;
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#elif NRFX_CHECK(NRFX_SPI_ENABLED)
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nrfx_spi_xfer_desc_t desc;
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#endif
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#if DEVICE_SPI_ASYNCH
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struct spi_s *spi_inst = &obj->spi;
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#else
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@ -586,6 +577,10 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha
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ret_code_t result = NRFX_SUCCESS;
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#if NRFX_CHECK(NRFX_SPIM_ENABLED)
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nrfx_spim_xfer_desc_t desc = NRFX_SPIM_XFER_TRX(tx_buffer, tx_length, rx_buffer, rx_length);
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result = nrfx_spim_xfer(&nordic_nrf5_spim_instance[instance], &desc, 0);
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#elif NRFX_CHECK(NRFX_SPI_ENABLED)
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/* Loop until all data is sent and received. */
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while (((tx_length > 0) || (rx_length > 0)) && (result == NRFX_SUCCESS)) {
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@ -606,17 +601,9 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha
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NULL;
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/* Blocking transfer. */
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desc.p_tx_buffer = tx_actual_buffer;
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desc.p_rx_buffer = rx_actual_buffer;
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desc.tx_length = tx_actual_length;
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desc.rx_length = rx_actual_length;
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#if NRFX_CHECK(NRFX_SPIM_ENABLED)
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result = nrfx_spim_xfer(&nordic_nrf5_spim_instance[instance],
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&desc, 0);
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#elif NRFX_CHECK(NRFX_SPI_ENABLED)
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nrfx_spi_xfer_desc_t desc = NRFX_SPI_XFER_TRX(tx_actual_buffer, tx_actual_length, rx_actual_buffer, rx_actual_length);
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result = nrfx_spi_xfer(&nordic_nrf5_spi_instance[instance],
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&desc, 0);
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#endif
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/* Update loop variables. */
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tx_length -= tx_actual_length;
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tx_offset += tx_actual_length;
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@ -624,6 +611,7 @@ int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length, cha
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rx_length -= rx_actual_length;
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rx_offset += rx_actual_length;
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}
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#endif
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/* Manually set chip select pin if defined. */
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if (spi_inst->cs != NC) {
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@ -142,8 +142,8 @@ typedef struct
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#define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \
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.dcx_pin = NRFX_SPIM_PIN_NOT_USED, \
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.rx_delay = 0x00, \
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.ss_duration = 0x00, \
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.use_hw_ss = false,
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.use_hw_ss = false, \
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.ss_duration = 0x00,
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#else
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#define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG
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#endif
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@ -247,14 +247,21 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance,
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NRF_GPIO_PIN_DIR_OUTPUT,
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NRF_GPIO_PIN_INPUT_CONNECT,
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NRF_GPIO_PIN_NOPULL,
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NRF_GPIO_PIN_S0S1,
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// Use High Drive if using SPIM3
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(p_instance->drv_inst_idx == NRFX_SPIM3_INST_IDX) ? NRF_GPIO_PIN_H0H1 : NRF_GPIO_PIN_S0S1,
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NRF_GPIO_PIN_NOSENSE);
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// - MOSI (optional) - output with initial value 0,
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if (p_config->mosi_pin != NRFX_SPIM_PIN_NOT_USED)
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{
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mosi_pin = p_config->mosi_pin;
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nrf_gpio_pin_clear(mosi_pin);
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nrf_gpio_cfg_output(mosi_pin);
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nrf_gpio_cfg(p_config->mosi_pin,
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NRF_GPIO_PIN_DIR_OUTPUT,
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NRF_GPIO_PIN_INPUT_DISCONNECT,
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NRF_GPIO_PIN_NOPULL,
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// Use High Drive if using SPIM3
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(p_instance->drv_inst_idx == NRFX_SPIM3_INST_IDX) ? NRF_GPIO_PIN_H0H1 : NRF_GPIO_PIN_S0S1,
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NRF_GPIO_PIN_NOSENSE);
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}
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else
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{
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