These boards will be re-enabled when sleep driver for them is ready.
Note:
This operation is done by removing "SLEEP" feature from target's "device_has" list (in targets.json config file).
For NRF52_DK removing of "SLEEP" feature causes some timing issues which have influence on tests. In order to successfully disable this board we need to disable also related features like "USTICKER", "LOWPOERTIMER" and slightly modify ticker tests, so they will not be executed if usticker support is not available (by default all targets support us ticker).
Implementation of unified EMAC driver for Renesas mbed boards
Based on the driver so far, Renesas implemented the emac driver for GR-PEACH and VK-RZ/A1H.
The mainly changes is below.
- Add the connection part with LWIP according to the unified emac specification.
- Add three new multicast functions(add, remove, set_all).
The Greentea test netsocket and emac test passed.
Just checking "does the chip have an EMAC" doesn't work - there are
targets using those chips which do not have an Ethernet connector and
don't provide the necessary surrounding infrastructure (eg DISCO_F429ZI,
not providing the board emac config call, and HEXIWEAR not providing PHY
info).
Make the targets that actually do want EMAC define their own local
Freescale_EMAC and STM_EMAC labels, and move the drivers into
the corresponding TARGET_ directories, removing the #ifdefs.
Initial work by Bartek Szatkowski in https://github.com/ARMmbed/mbed-os/pull/4079,
reworked following review of https://github.com/ARMmbed/mbed-os/pull/5202 to
transform the entire system into C++, retaining the basic functionality.
Bartek's summary:
* Porting ethernet to EMAC
* Updating EMAC to enable multiple interfaces
* Untangling networking classes, making the abstractions a bit clearer to follow, etc
* General refactoring
* Removal of DEVICE_EMAC flag and introducing DEVICE_ETH and DEVICE_WIFI
Revisions since initial branch:
* Remove lwip depencies
* Correct doxygen warnings
* Remove emac_api.h, replace with C++ EMAC abstract class.
* Create OnboardNetworkInterface, and LWIP implementation.
* Mappings since #4079
lwip-interface/nsapi_stack_lwip.c -> LWIPStack.cpp
lwip-interface/ipstack_lwip.c -> LWIPInterface.cpp
netsocket/mbed_ipstack.h -> OnboardNetworkStack.h
hal/emac_api.h -> EMAC.h
* Reinstate use of EthInterface abstraction
* Correct and clarify HW address EMAC ops
* Restore MBED_MAC_ADDR implementation
* Integrate PPP support with LWIP::Interface.
* Convert K64F lwIP driver to K64F_EMAC.
To do:
* Convert emac_stack_mem.h to follow this pattern.
* Figure out DEVICE_ETH/EMAC
* Update all drivers to use EMAC
New directory structure:
* TARGET_SOFTDEVICE_COMMON
* TARGET_SOFTDEVICE_S112
* TARGET_SOFTDEVICE_S132_FULL (MBR + SoftDevice, default)
* TARGET_SOFTDEVICE_S132_OTA (SoftDevice only, for firmware updates)
* TARGET_SOFTDEVICE_S132_MBR (MBR only, for bootloader builds)
* TARGET_SOFTDEVICE_S140_FULL (MBR + SoftDevice, default)
* TARGET_SOFTDEVICE_S140_OTA (SoftDevice only, for firmware updates)
* TARGET_SOFTDEVICE_S140_MBR (MBR only, for bootloader builds)
* TARGET_SOFTDEVICE_NONE
The X_OTA and X_MBR binaries are obtained from the original x_FULL SoftDevice
by splitting it in an MBR part and a SoftDevice part. The MBR is needed for
the bootloader and the SoftDevice for firmware updates.
Build application without SoftDevice:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_NONE"]
}
}
Build application for firmware update using SoftDevice X:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_X_OTA"]
}
}
Build bootloader without SoftDevice X:
"target_overrides": {
"*": {
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_X_FULL"],
"target.extra_labels_add": ["SOFTDEVICE_X_MBR"]
}
}
The unified NRF51 target and feature BLE directories have been
reorganized to follow the naming and directory structure of the
NRF52 implementation.
This reorganization does not include TARGET_MCU_NRF51822 and
derived targets.
* Consolidated device_has and macros to the main MCU targets.
* Moved errata configuration to mbed_lib.json for HAL implementation.
* Moved clock configuration to mbed_lib.json for HAL implementation.
* Moved UART configuration to mbed_lib.json for HAL implementation.
* When multiple TRNG objects are initialized, destroying the first
object will turn the TRNG off for the other objects. This fix
adds a counter to ensure that only when the last object is
destroyed will it cause the TRNG to be disabled.
* The corner case where a user request 0 bytes is correctly handled
and will now return immediately.
Add fstorage and fds from Nordic SDK for SoftDevice compatible
flash storage. Mbed HAL flash API mapped to use fstorage API
to ensure write and erase doesn't conflict with BLE operation.
Ability to swap SoftDevices using the mbed configuration system.
For example, build NRF52840_DK without SoftDevice:
"target_overrides": {
"*": {
"target.MERGE_SOFT_DEVICE": false,
"target.extra_labels_remove": ["SOFTDEVICE_COMMON", "SOFTDEVICE_S140"],
"target.extra_labels_add": ["SOFTDEVICE_NONE"]
}
}
Pinned down vector table to beginningn of RAM.
Some platforms have interface chips with hardware flow control
enabled by default. This commit adds configurable flow control to
STDOUT.
Usage:
* Define pin names STDIO_UART_RTS for Rx-flow-control and
STDIO_UART_CTS for Tx-flow-control.
* Set target.console-uart-flow-control. Valid options are:
null, RTS, CTS, and RTSCTS.
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 includes same usi chip,
so common USI_WM_BN_BM_22 target has been created.
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 are inheting the common usi target
This patchs adds TRNG support using the upstreamed, open-source, TZ-TRNG
driver.
It also implements the HAL for TRNG and add it in features.
The mbed-os.py script deletes files that are unused by mbed-os.
Change-Id: Idf8eefd809f00d40e0ad3cf7657f2a8c2eca3505
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
Mbed-os 5.4.7 was the last unofficial working support for this target.
Since Mbed-os 5.6.0, the support is now official and VK_RZ_A1H is now "codebase aligned" with GR_PEACH (RZ_A1H) & GR_LYCHEE (RZ_A1LU) !
This patch changes the linker files and defines to use the ZBT SSRAM
instead of the FPGA Block RAM for code and data.
The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and
testbench user guide explains the available memories.
This switch improves code memory from 256 kB to 4 MB and data memory
from 128 kB to 4 MB.
However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the
processor can only boot at address 0x00000000 which means that it
expects the vector table to be at that address. That is why we have to
create 2 load regions in the linker scripts: one with only the vector
table at address 0x0 and one with code + data at address 0x00400000.
Because of these two load regions, linker will produce different
behaviours:
* GCC_ARM and IAR will only create 1 binary with both load regions
padding with 0 in between. The binary will then be very large (at least
4 MB) and the flash process will take longer.
* ARM and ARMC6 will create 2 binaries for the two load regions. The
load addresses of the two binaries can be written in the images.txt file
on the MPS2 board. You can also use the --bincombined option of fromelf
utility to produce only 1 large binary.
This patch also adds the memory_zones.h file to try to put in common all
the memory addresses that were previously hard coded in the linker
scripts / startup files.
With that patch in, the simplest option is to directly use the .elf file
with the MPS2, which is only possible with mbb_v225.ebf and more recent
firmwares. It will now be the default for CM3DS.
This commit works with greentea thanks to the now merged pull request
ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board.
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>