Update includes allocating RAM region for code to enter
stop modes and execute this code in RAM, thus the flash
is idle and no prefetch is performed while entering stop
mode.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Use the updated API's provided by the SMC driver
2. Wait till debug UART has finished transmitting data
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Update to handle 12-bit resolution
2. Properly handle the pin configuration
3. Update the pin setup to handle the ADC B channel
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Originally, nu_delay_cycle_x4(...) is borrowed from mbed test code for delay
cycle. Currently, it is not used on Nuvoton targets. If delay cycle is needed,
use wait_ns(...) instead which has strict implementation and has passed tests.
The use of `gpio_irq_event` & `gpio_irq_handler` in `gpio_irq_s` creates
a circular dependency.
hal/gpio_irq_api.h needs
targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/TARGET_CY8C63XX/device.h, that needs
targets/TARGET_Cypress/TARGET_PSOC6_FUTURE/objects.h, that again needs
hal/gpio_irq_api.h, before the types are defined.
Remove `#include "gpio_irq_api.h"` directive from objects.h and change
the types of `gpio_irq_s` members.
When STM32F746-DISCO board was being used in (unsupported) USBHost mode,
the communication was unreliable. Our investigation revealed that the
problem lied in redundant IN tokens that the host generated even though
it shouldn't. This could lead to endless high-frequency NAKs being
received from device, which caused watchdog reset as USBHost spent all
time in interrupt handlers.
In our application the clocks frequencies are:
* HCLK = 48 MHz
* APB1 = 6 MHz
* APB2 = 12 MHz
We have captured the raw USB High-Speed traffic using OpenVizsla.
Without this change, when USB MSD device connected to the system
responded to IN with NAK, there were excessive IN tokens generated about
667 ns after the NAK. With this commit the IN tokens are generated no
sooner than 10 us after the NAK.
The high frequency of the IN/NAK pairs is not the biggest problem.
The biggest problem is that the USB Host did continue to send the IN token
after DATA and ACK packets were received from device - *without* any request
from upper layer (USB MSD).
The USB MSD devices won't have extra data available on Bulk IN endpoint
after the expected data was received by Host. In such case IN/NAK cycle
time is only houndreds of nanoseconds, the MCU has no time for anything else.
The problem manifested not only on Bulk endpoints, but also during
Control transfers. Example correct scenario (when this fix is applied):
* SETUP stage
* SETUP [host -> address 0 endpoint 0]
* DATA0 [80 06 00 01 00 00 08 00] [CRC16: EB 94]
* ACK
* DATA stage
* IN
* NAK
... the IN/NAK repeated multiple time until device was ready
* IN
* DATA1 [12 01 10 02 00 00 00 40] [CRC16: 55 41]
* ACK
* STATUS stage
* OUT
* DATA1 ZLP
* ACK
Without this commit, in DATA stage, after the ACK was received, the host
did send extra IN to which device responded with STALL. On bus it was:
* DATA stage
...
* IN
* DATA1 [12 01 10 02 00 00 00 40] [CRC16: 55 41]
* IN
* STALL
* IN
* STALL
* STATUS stage
* OUT
* DATA1 ZLP
* STALL
In the fault case the next SETUP was sent only after 510 ms, which
indicates timeout in upper layer.
With this commit the next SETUP is sent 120 us after the STATUS stage ACK.
- Fix assert when spi_master_block_write called with 0 size
- Fix assert when spi_format called before spi_frequency
- Simplify implementation of spi_master_write
- Simplify pointer arithmetic expressions in cyhal_spi_transfer and
cyhal_spi_transfer_async
- Fix I2C driver not honoring the frequency specified during init.
The IRQ disable was always disabling both rising
and falling edges of the interrupt thereby causing
failures in cases when one of the two should stay enabled.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Update the clock divider setting
2. ADC resolution is 12-bits, update the API return value
to return 16-bit result
3. Update IOMUX setup
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This test requires total latency (tot = h/w + s/w) (wakeup from deepsleep) be
under 1ms. To check the issue, measure total latency on Nuvoton targets:
TARGET EXP(us) EXP+TOL(us) ACT(us)
NANO130 42000 43000 42939
NUC472 42000 43000 42236
M453 42000 43000 43274
M487 42000 43000 42877
M2351 42000 43000 43213
Checking h/w spec, h/w latency (wakeup time from normal power-down mode) on
M487/M2351 is just 1us (n/a on other targets). S/W latency plays the major
part here.
S/W latency relies on system performance. On Nuvoton targets, 'LPTICKER_DELAY_TICKS'
possibly complicates the test. Anyway, to pass the test, add extra 1ms latency
(deep-sleep-latency) in targets.json for Nuvoton targets.
Since QSPi is not yet supported by base TARGET_PSOC6,
there is no need to remove the device label from
FUTURE targets that inherit from TARGET_PSOC6.
This will need to be reverted back once the QSPI support
is implemented for Cypress PSOC6 targets.
An extra start signal was observed on the bus which was
discovered by the FPGA test shield.
This is because the hardware sends out a transaction as soon
as a write to the START bit. Hence the write to the START
bit is delayed by using a flag.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
According to comment in the implementation this target supports the
hardware flow control on UART1 peripheral.
This patch fixes build errors after adding DEVICE_SERIAL_FC guards to
hal/serial_api.h.
After adding DEVICE_SERIAL_FC guards to serial_api.h
serial_set_flow_control is not available. In case of this
implementation, this function is a no-op and may be safely removed.
After adding DEVICE_SERIAL_FC guards to serial_api.h
serial_set_flow_control is not available. In case of this
implementation, this function is a no-op and may be safely removed.
On Nuvoton targets, lp_ticker_set_interrupt(...) needs around 3 lp-ticker
ticks to take effect. It may miss when current tick and match tick are very
close (see hal/LowPowerTickerWrapper.cpp). Enlarge LPTICKER_DELAY_TICKS to
4 from 3 to address this boundary case.
1. Add missing header file for mbed_mpu_manager_lock_ram_execution()/
mbed_mpu_manager_unlock_ram_execution() to avoid compile warning.
2. Locate delay_loop_code() on 16-byte boundary (sync to common version).
3. Optimize delay_loop macro (sync to common version).
Replace the prebuilt CM0+ HEX images with C files that provide the
variable cy_m0p_image placed to the combined ELF image with linker
script. This simplifies build flow of PSoC 6 application and improves
compatibility with IDE export targets. It is still possible to use
the custom prebuilt HEX images for PSA targets that remove CM0P_SLEEP
label and specify the `hex_filename` in targets.json.
Linker scripts are compatible with both scenarios.
int_szyk
Ganesh Ramachandran
Mahesh Mahadevan
Anna Bridge
Chris Snow
Lin Gao
Martin Kojtal
Laurent Meunier
Martino Facchin
Seppo Takalo
Maciej Bocianski
Reda Maher
Chun-Chieh Li
Seth Itow
Szymon Szantula
Kyle Kearney
maclobdell
Leszek Rusinowicz
desmond.chen
David Rauschenbach
Chris Trowbridge
Filip Jagodzinski
Ireneusz Gaicki
Neil Tuttle
Ben Cooke
jeromecoutant
George Beckstein
Evelyne Donnaes
Arto Kinnunen
Kevin Bracey
Yuan Cao
Volodymyr Medvid
Volodymyr Medvid
Tymoteusz Bloch
Steven Cooreman
Przemyslaw Stekiel