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Fix for PWM output found by testing against FPGA shield 

Two issues:
* Downcasting too early
* Potential for a uint32_t overflow in an intermediate calculation

Passing test requires #11005 to be merged.
pull/11007/head
Steven Cooreman 2019-07-09 22:38:53 +01:00
parent 28eb39c724
commit 476dc6e46a
1 changed files with 2 additions and 2 deletions
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4
targets/TARGET_Silicon_Labs/TARGET_EFM32/pwmout_api.c
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@ -342,13 +342,13 @@ void pwmout_pulsewidth(pwmout_t *obj, float seconds)
void pwmout_pulsewidth_ms(pwmout_t *obj, int ms)
{
uint16_t width_cycles = (uint16_t) ((REFERENCE_FREQUENCY >> pwm_prescaler_div) * ms) / 1000;
uint16_t width_cycles = (uint16_t) (((REFERENCE_FREQUENCY >> pwm_prescaler_div) * ms) / 1000);
TIMER_CompareBufSet(PWM_TIMER, obj->channel, width_cycles);
}
void pwmout_pulsewidth_us(pwmout_t *obj, int us)
{
uint16_t width_cycles = (uint16_t) ((REFERENCE_FREQUENCY >> pwm_prescaler_div) * us) / 1000000;
uint16_t width_cycles = (uint16_t) (((uint64_t)(REFERENCE_FREQUENCY >> pwm_prescaler_div) * (uint64_t)us) / 1000000UL);
TIMER_CompareBufSet(PWM_TIMER, obj->channel, width_cycles);
}