As reported by MBED user Fran6Jack:
I2C bus are usually 5V tolerant on all STM32 processor.
If an external device on the I2C bus requires 5V operation,
we usually acheive it by using 5V external pull-ups on the bus.
Since signaling uses open-drain output on I2C for both signal SCL and SDA
any 5V tolerant MCU will work on a 5V I2C bus. Having pull-up activated on a 5V externally pull bus, cause the pin to clamp on the STM32 die diode and could damage the IC (There is a note in STM32 datasheet specifying this issue).
It is understood by all the community that I2C bus should always be
externally pulled by physical resistor. I2C initialization should then
be ALWAYS OpenDrainNoPull by default.
Up to now, this I2C driver was setting pull up by default as it helps
basic testing, like 1 master and 1 slave, conencted with 2 wires without
any external pull ups. This will not work anymore after this commit and
applications tests or examples needs to be modified to explicitely
configure pull ups ... But it is safer to follow reference manual
guidelines.
Decrease the interrupt stack from 2k down to 1k so there is enough
ram to build all the tests with tickless enabled. In general, targets
should not need an interrupt stack greater than 1k with mbed-os.
Rather than Unlocking flash during flash object creation, and leaving
the flash possibly continuously unlocked a(s object might bever be freed),
we decide to Unlock then Lock again at each erase or program call.
Fixing regression introduced in commit
"Ticker: add fire interrupt now function".
In above mentioned commit, the management of timestamp being in the past
has been moved to higher layer (hal/mbed_ticker_api.c), but the reset of
oc_int was missing when implementing the new us_ticker_fire_interrupt
function - which is fixed now.
After reset the MCR register content needs to be restored so we're
introducing the can_registers_init function to be called at the first
init stage, but also after reset. We also store the can frequency to
go through the initialisation phase again.
In order to apply the same mode in case of reset, we store the current
requested mode in the HAL structure.
To make storage in a single place, we also change can_monitor to call
can_mode function as they actually acting on same registers.
Instead of a static object, this will make driver
instantiation more robust and allow to re-use init
configuration on a need basis.
The CANName struct member is actually the CAN registers base address,
which is now available in the CanHandle.Instance field, so we don't need
CANName anymore.
Adding flash API support to STM32F7 family. The code is derived from
F4 family one. The memory topology is described in flash_data.h files
and the flash_api.c implementation manages the 2 possible memory types (1
or 2 banks).
Users of FlashIAP usually get the minimum programable size
by calling flash.get_page_size(), so let's return the minimum
to allows a most efficient usage of flash.
For F4 devices, this is 1 byte.
For L0 and L1 devices, this is a word (4 bytes).
For L4 devices, this is a double word (8 bytes).
First add the flash_data.h that describe the flash memory topology,
and also activate FLASH support for the corresponding targets.
This is a 1,5MB flash memory device which contains 15 sectors, where
sectors 12 to 15 are 128KB sectors. So flash_api.c needed has been
updated to differentiate between this flash memory and the 2MB ones
by checking existence of sector 16 instead of sector 12.
UBLOX_ODIN_EVK_W2 is missing the abstract button definitions originally
introduced with PR https://github.com/ARMmbed/mbed-os/pull/4249.
Fix two tab to spaces issues on the go as well.
It is required to enable AFIO clock before using __HAL_AFIO_REMAP_xy
macros, which was missing here. Without clocks enable, the remap
actually doesn't occur. This would possibly cause some PIOs (part of
PB_3, PB_4, PA_13, PA_14, PA_15) to not behave as expected.
In most cases AFIO clock was enabled in stm_pin_SetAFPin function, so
that this bug was not visible. But there were few cases left were
stm_pin_DisconnectDebug would be called first. A typical case was
with GCC_ARM in case a DigitalInOut variable is declared as global.
On F410RB, the size reserved to vectors with ARM toolchains was not properly
defined,which was not the case for other toolchains.
This would cause few tests to fail like EXAMPLE_1 with below error:
HOST: Unknown property: mbed assertation failed: _ptr == (T *)&_data, file: C:/github/mbed/BUILD/mbed/platform/SingletonPtr.h, line 91
Enabling SPI causes the clock to be output by default.
Most devices will not care about extra clock cycles, especially as long
as chip select is not active, nevertheless this may cause side issues
with other devices especially during init phase.
This was actually the case with a 3 wire device (LPS22HB sensor).
In case MISO is not passed at SPI init, then we consider a 3 wires SPI
configuration is requested, which corresponds to SPI_DIRECTION_1LINE
configuration parameter in STM32 HAL layer.
We're then handling this specific case of SPI_DIRECTION_1LINE,
in spi_master_write or spi_master_block_write, we call to HAL API
Use ADDR_FLASH_SECTOR_12 as this is defined by target (the flash size varies, for
instance for some F437xx is up to 2MB (2nd bank might not be there)).
- default value is the same as before patch
- system_stm32l4xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- nvic_addr.h file is now in TARGET_STM level
- default value is the same as before patch
- system_stm32l1xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- default value is the same as before patch
- system_stm32l0xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- default value is the same as before patch
- system_stm32f7xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- default value is the same as before patch
- system_stm32f3xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- default value is the same as before patch
- system_stm32f2xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- default value is the same as before patch
- system_stm32f1xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
- default value is the same as before patch
- system_stm32f0xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
In this commit, the analogin_s structure is moved to commonn_objects.h file
to limit the duplicaion.
The ADC handle is moved from a global variable to a struct member of the
analogin object. This allows multiple ADC instances to work correctly.
Note that State needs to be explicitely set to HAL_ADC_STATE_RESET
because the object is not zero initialized.
TXE indicates that a byte can be written to UART register for sending,
while TC indicates that last byte was completely sent. So the TXE flag
can be used in case of interrupt based Serial communication, to allow
faster and efficient application buffer emptying.
Also TXE flag will be erased from the interrupt when writing to register.
In case there is nothing to write in the register, the application is
expected to disable the interrupt.
The RXNE flag is getting cleared when reading Data Register so it should
not be cleared here. Especially in case of high data rate, another byte of
data could have received during irq_handler call and clearing the flag
would read and discard this data which would be lost for application.
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.
set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.
It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.
The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)
All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
Depending on families, different HAL macros are defined to check the
state of serial interrupts. In several cases, we can find only 1 macro:
__HAL_UART_GET_IT_SOURCE
Checks whether the specified UART interrupt has occurred or not
But in F0, F3, F7, L0, L4 there are 2 different macros
__HAL_UART_GET_IT
Checks whether the specified UART interrupt has occurred or not
__HAL_UART_GET_IT_SOURCE
Checks whether the specified UART interrupt source is enabled.
In the later case, __HAL_UART_GET_IT_SOURCE was being used so far,
but actually needs to be replaced by __HAL_UART_GET_IT. Using the right
macro, we also check the proper flags accordingly.
Some I2C devices require specific zero length read/write sequences which
the HAL_I2C_IsDeviceReady() redirect interferes with. After Removing
these redirects, it was confirmed that zero length reads and writes
would both still work correctly for detecting presence/absence of an
I2C device on a bus.
In case we've run through the entire GPIOs loop, withouth finding a
matching interrupt, we're in the case of a spurious interrupt, let's
raise an error to track it down.
When disabling GPIO irq, also the falling / rising edge settings need
to be reset (EXTI_RTSR and EXTI_FTSR registers).
If not reset, the same EXTI line can be later enabled again with a wrong
Rising / Falling configuration. This was especially seen and reported in
ci-test tests-api-interruptin on NUCLEO_F446RE target where DIO2=PA_10 and
DIO6=PB_10 were successively tested: as they are sharing the same EXTI_LINE
(EXTI_10), this resulted in calling the irq_handler with wrong
IRQ_FALL/IRQ_RAISE parameter and donothing being called in loop.
This commit completely rewrote flash_api.c in a few places so kicked out changes from Master and accepted the branch changes.
F429 + F439 : changes after code review
GetSector has been rewritten