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Merge pull request #4793 from jeromecoutant/PR_F4_I2C 

STM32 I2C : correct async issue
pull/4803/head
Jimmy Brisson 2017-07-24 10:59:03 -05:00 committed by GitHub
parent 2d8457e68d c8cba15be7
commit f4de24bae1
4 changed files with 100 additions and 13 deletions
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12
targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_hal_i2c.c
View File

@ -1462,7 +1462,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
/* Generate Start */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else
else if(Prev_State == I2C_STATE_MASTER_BUSY_RX) // MBED
{
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
@ -1564,7 +1564,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
/* Generate Start */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) // MBED
{
/* Enable Acknowledge */
hi2c->Instance->CR1 |= I2C_CR1_ACK;
@ -4008,7 +4008,7 @@ static HAL_StatusTypeDef I2C_MasterReceive_RXNE(I2C_HandleTypeDef *hi2c)
/* Enable Pos */
hi2c->Instance->CR1 |= I2C_CR1_POS;
/* Disable BUF interrupt */
__HAL_I2C_DISABLE_IT(hi2c, I2C_IT_BUF);
}
@ -4078,6 +4078,12 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
{
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
{
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
}
else
{

33
targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_i2c.c
View File

@ -1414,8 +1414,17 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
/* Generate Start */
if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
{
/* Generate Start or ReStart */
/* Generate Start condition if first transfer */
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Generate Start */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else if(Prev_State == I2C_STATE_MASTER_BUSY_RX) // MBED
{
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
}
/* Process Unlocked */
@ -1504,11 +1513,23 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
{
/* Generate Start condition if first transfer */
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
{
/* Enable Acknowledge */
hi2c->Instance->CR1 |= I2C_CR1_ACK;
/* Generate Start or ReStart */
/* Generate Start */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
{
/* Enable Acknowledge */
hi2c->Instance->CR1 |= I2C_CR1_ACK;
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
}
/* Process Unlocked */
@ -3996,6 +4017,12 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
{
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
{
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
}
else
{

32
targets/TARGET_STM/TARGET_STM32F4/device/stm32f4xx_hal_i2c.c
View File

@ -1413,8 +1413,17 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
/* Generate Start */
if((Prev_State == I2C_STATE_MASTER_BUSY_RX) || (Prev_State == I2C_STATE_NONE))
{
/* Generate Start or ReStart */
/* Generate Start condition if first transfer */
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Generate Start */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else if(Prev_State == I2C_STATE_MASTER_BUSY_RX) // MBED
{
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
}
/* Process Unlocked */
@ -1503,10 +1512,23 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
{
/* Generate Start condition if first transfer */
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
{
/* Enable Acknowledge */
hi2c->Instance->CR1 |= I2C_CR1_ACK;
/* Generate Start or ReStart */
/* Generate Start */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
{
/* Enable Acknowledge */
hi2c->Instance->CR1 |= I2C_CR1_ACK;
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
}
/* Process Unlocked */
@ -3993,6 +4015,12 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
{
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
{
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
}
else
{

36
targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_i2c.c
View File

@ -1337,7 +1337,7 @@ HAL_StatusTypeDef HAL_I2C_Master_Receive_IT(I2C_HandleTypeDef *hi2c, uint16_t De
/* Enable Acknowledge */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Generate Start */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
@ -1428,8 +1428,17 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Transmit_IT(I2C_HandleTypeDef *hi2c,
/* Generate Start */
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX) || (hi2c->PreviousState == I2C_STATE_NONE))
{
/* Generate Start or ReStart */
/* Generate Start condition if first transfer */
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME))
{
/* Generate Start */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
}
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_RX)
{
/* Generate ReStart */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
}
}
/* Process Unlocked */
@ -1518,10 +1527,23 @@ HAL_StatusTypeDef HAL_I2C_Master_Sequential_Receive_IT(I2C_HandleTypeDef *hi2c,
if((hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX) || (hi2c->PreviousState == I2C_STATE_NONE))
{
/* Generate Start condition if first transfer */
if((XferOptions == I2C_FIRST_AND_LAST_FRAME) || (XferOptions == I2C_FIRST_FRAME) || (XferOptions == I2C_NO_OPTION_FRAME))
{
/* Enable Acknowledge */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Generate Start or ReStart */
/* Generate Start */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
}
else if(hi2c->PreviousState == I2C_STATE_MASTER_BUSY_TX)
{
/* Enable Acknowledge */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_ACK);
/* Generate ReStart */
SET_BIT(hi2c->Instance->CR1, I2C_CR1_START);
}
}
/* Process Unlocked */
@ -3866,11 +3888,15 @@ static HAL_StatusTypeDef I2C_MasterReceive_BTF(I2C_HandleTypeDef *hi2c)
{
/* Disable Acknowledge */
hi2c->Instance->CR1 &= ~I2C_CR1_ACK;
if((CurrentXferOptions == I2C_NEXT_FRAME) || (CurrentXferOptions == I2C_FIRST_FRAME))
{
/* Generate ReStart */
hi2c->Instance->CR1 |= I2C_CR1_START;
}
}
else
{
hi2c->PreviousState = I2C_STATE_MASTER_BUSY_RX;
/* Generate Stop */
hi2c->Instance->CR1 |= I2C_CR1_STOP;
}