Commit Graph

581 Commits (6ee4c7e21963b184b1f93c0bf9375b583dbc9051)

Author SHA1 Message Date
jeromecoutant e1f4d69109 STM32L0 : correct ST HAL API call
- RCC init: unused clock was enabled without any init parameters
- ADC: a parameter setting was missing
- GPIO: mode was not allowed by ST HAL API
- tick: init value was too high for 16b
2016-12-14 11:10:03 +01:00
jeromecoutant 2c5249b196 STM32L0 : refactor stm32l0xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-14 11:09:32 +01:00
jeromecoutant dd88e97e0b STM32F4 : correct ST HAL API call
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
2016-12-14 10:03:02 +01:00
Laurent MEUNIER 57eb4a0d1d STM32 F1: move F1 to I2C common code
Now that F1 HAL has been updated to support required APIs,
the F1 family can also be moved to common code.
2016-12-14 08:36:30 +01:00
Laurent MEUNIER e7cab5c8dc [STM32] HAL F1: I2C fix btf / rxne cases
Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
2016-12-14 08:35:32 +01:00
Laurent MEUNIER f88803b7fe STM32 F1 HAL V1.0.5
This is a partial update of HAL drivers, especially for I2C driver update
2016-12-14 08:35:12 +01:00
Sam Lin d4c18b0058 Use __HAL_CAN_CLEAR_FLAG macro clear TSR .
Redress stm32f1xx_hal_can.h header file comment
2016-12-14 08:42:55 +08:00
Jared Szechy f941960d1c
Add alternative CAN pins to DISCO_F303VC 2016-12-13 11:20:22 -05:00
Laurent MEUNIER 77e202f064 STM32 I2C: use higher IRQ priority for slave vs. master 2016-12-13 11:59:12 +01:00
Laurent MEUNIER 36a0365d2d STM32 I2C: differentiate HW reset and driver reset
Make a distinct i2c_reset function as defined in MBED HAL api,
from the i2C_hw_reset which simply drives the HW reset signals
2016-12-12 17:33:14 +01:00
Laurent MEUNIER 6cdac88a1c SMT32 I2C: initialize clock before configuring PINs
This is needed especially for F1 family but can apply to all.
2016-12-12 14:52:11 +01:00
Laurent MEUNIER ee9c8acbe4 STM32 I2C: Initialize hz parameter before reset
The hz value is used to compute timeouts,
and timeout are used in reset function, so the parameter needs to be
initialized to its default value before being used.
2016-12-12 14:48:43 +01:00
Laurent MEUNIER 9895bcf130 STM32 I2C: restore slave address in case of reset 2016-12-12 14:44:37 +01:00
bcostm fe73b43a0a FIX to add the update of hdma->State variable 2016-12-12 10:43:25 +01:00
Jared Szechy f5f3dc8143 Enable CAN on DISCO_F303VC 2016-12-11 22:03:29 -05:00
Brian Daniels 6085905658 Renames i2c_api.c for STM32F1 targets to fix IAR exporter.
The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
2016-12-09 12:47:17 -06:00
Martin Kojtal ce9d2526f8 Merge pull request #3409 from jeromecoutant/PR_ST_L1_ASSERT
STM32L1 : map ST HAL assert into MBED assert
2016-12-09 15:38:21 +01:00
Martin Kojtal e01366ce8f Merge pull request #3399 from bcostm/fix_issue_3266
NUCLEO_F103RB - Add SERIAL_FC feature
2016-12-09 15:37:57 +01:00
Martin Kojtal b13954c6b5 Merge pull request #3377 from LMESTM/fix_L152RE_Rcc_Config
STM32 NUCLEO-L152RE Update system core clock to 32MHz
2016-12-09 15:36:07 +01:00
Martin Kojtal a3e41f246e Merge pull request #3369 from adustm/disco_f469_newpins
Add CAN2 missing pins for connector CN12
2016-12-09 15:35:07 +01:00
Martin Kojtal 04f940de2d Merge pull request #3324 from LMESTM/dev_i2c_common_code
Dev i2c common code
2016-12-09 15:30:00 +01:00
jeromecoutant 4ea65df99d STM32F3 : correct ST HAL API call
- CAN: compilation issue with assert enabled
- GPIO: mode was not allowed by ST HAL API
2016-12-09 14:56:52 +01:00
jeromecoutant 008a12327c STM32F2 : correct ST HAL API call
- GPIO: mode was not allowed by ST HAL API
2016-12-09 14:52:51 +01:00
jeromecoutant 0e404c2b48 STM32F1 : correct ST HAL API call
- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
2016-12-09 14:48:26 +01:00
jeromecoutant 3734269326 STM32L4 : correct ST HAL API call
- ll_utils: compilation issue
- GPIO: mode was not allowed by ST HAL API
2016-12-09 13:58:22 +01:00
jeromecoutant 3ab5dce41d STM32L1 : correct ST HAL API call
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
2016-12-09 11:32:08 +01:00
jeromecoutant db9dcb8b40 STM32F7 : correct ST HAL API call
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
2016-12-09 09:58:54 +01:00
jeromecoutant 6aef5333bd STM32F0 : correct ST HAL API call
- CAN: compilation issue with assert enabled
- ADC: init parameter was not allowed by ST HAL API
- GPIO: mode was not allowed by ST HAL API
2016-12-09 09:44:54 +01:00
Sam Lin b2f8de8294 Repair the Transmit mailbox (0,1,2) empty interrupt Flag not clear BUG 2016-12-09 10:44:28 +08:00
jeromecoutant 12d2795871 STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 17:03:25 +01:00
bcostm 88988b688b Add external declaration of PinMap_UART_RTS/CTS[] const tables 2016-12-08 16:43:26 +01:00
jeromecoutant 64e92a54de STM32L4 : refactor stm32l4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 16:15:47 +01:00
bcostm db8f966a2c Correct A3, A4, A5 pins definitions 2016-12-08 15:57:05 +01:00
bcostm 9ce9d1a9e7 Correct SDIO_UART pins configuration 2016-12-08 15:57:05 +01:00
bcostm 49755981dd Add this platform in mbed_rtx.h file 2016-12-08 15:57:05 +01:00
bcostm 5b2946ded9 Correct system clock configuration 2016-12-08 15:57:05 +01:00
bcostm 1796e8cd9a Update hal_tick files 2016-12-08 15:57:05 +01:00
bcostm 19828d8dd5 Add startup and linker files for ARM_STD, ARM_MICRO, IAR 2016-12-08 15:57:05 +01:00
bcostm 2ccbd27baf Add GCC_ARM files and fix errors during GCC build 2016-12-08 15:57:05 +01:00
bcostm f1c6b0f842 Add cmsis, hal_tick, system files 2016-12-08 15:57:05 +01:00
bcostm 3b1fb796c3 Add first pin, port and objects files 2016-12-08 15:57:05 +01:00
jeromecoutant 9dc5cd1266 STM32F7 : refactor stm32f7xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 15:54:38 +01:00
jeromecoutant fa8529dea3 STM32F4 : refactor stm32f4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-07 15:31:41 +01:00
jeromecoutant d30c34c5d1 STM32F3 : map ST HAL assert into MBED assert 2016-12-07 15:09:55 +01:00
jeromecoutant 06ffb4cf8a STM32F2 : map ST HAL assert into MBED assert 2016-12-07 14:52:24 +01:00
jeromecoutant f0156306ac STM32F0 : map ST HAL assert into MBED assert 2016-12-07 14:13:19 +01:00
jeromecoutant b606267641 STM32F1 : map ST HAL assert into MBED assert 2016-12-07 14:08:06 +01:00
andreas.larsson b5b3bede31 Added tmpisr = regs->ISR; at the end of the while loop to re-evaluate the ISR value 2016-12-07 12:22:31 +01:00
Laurent MEUNIER 8e11541a74 STM32 NUCLEO-L152RE Update system core clock to 32MHz
Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz

And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz

This allows to take full benefit of the CPU capability.
2016-12-06 11:45:19 +01:00
adustm 3fdbe85b00 Add CAN2 missing pins for connector CN12 2016-12-05 18:24:30 +01:00
Martin Kojtal bd499daae8 Merge pull request #3304 from jeromecoutant/PR_L476
STM32L476: no HSE is present in NUCLEO and DISCO boards
2016-12-02 15:48:38 +01:00
Martin Kojtal 1c2c121741 Merge pull request #3303 from adustm/stm_fix_interrupt_in
Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor
2016-12-02 15:47:50 +01:00
Laurent MEUNIER 29b32b84b3 STM32 I2C - 1MHZ frequency is allowed
So make the assert to cover all possible values
Also assert applies only for I2C_IP_VERSION_V2.
Also in case of I2C_IP_VERSION_V1, the HAL makes the proper
checks and can dynamically scale the frequency in case of
intermediate value.
2016-12-01 15:20:11 +01:00
bcostm 18dc6f4f81 Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions to make LPT tests pass. 2016-11-30 11:31:25 +01:00
jeromecoutant 448f501d4a STM32L476: comments update 2016-11-30 08:52:49 +01:00
jeromecoutant 757944ee24 STM32L476: no HSE is present in NUCLEO and DISCO boards 2016-11-30 08:51:18 +01:00
Laurent MEUNIER 3fad50287c [STM32] Make most of the I2C code into a common file
Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.

The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.

F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
2016-11-30 08:23:13 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
2016-11-30 08:23:13 +01:00
Laurent MEUNIER a0722b1086 [STM32] HAL F2: I2C fix btf / rxne cases
Applying the same fix as in L1 and F4
2016-11-30 08:23:13 +01:00
Laurent MEUNIER 85a2f7ac49 [STM32] HAL L1: I2C fix btf / rxne cases
This is an alignement to F4 HAL as the same IP is used.
Next official HAL delivery update hall will include the same alignement.
2016-11-30 08:23:13 +01:00
Laurent MEUNIER 77364f9fe2 [STM32] HAL L0: I2C / DMA updates
This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
2016-11-30 08:23:13 +01:00
Martin Kojtal c57427f77f Merge pull request #3321 from jeromecoutant/PR_L432KC
no HSE available by default for NUCLEO_L432KC
2016-11-29 18:25:17 +01:00
Martin Kojtal 519b500d4c Merge pull request #3320 from bcostm/fix_vref_label
STM32 - Add ADC_VREF label
2016-11-29 18:24:52 +01:00
Martin Kojtal bd994b3f41 Merge pull request #3302 from bcostm/fix_issue_1685
STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels
2016-11-29 18:21:14 +01:00
Martin Kojtal a8ebfaa058 Merge pull request #3288 from LMESTM/dev_spi_asynch_l0l1
Dev spi asynch l0l1
2016-11-29 18:17:06 +01:00
Martin Kojtal bb2d03f34b Merge pull request #3213 from bcostm/factorize_ticker
STM32: Refactor us_ticker.c + hal_tick.c files
2016-11-29 18:10:45 +01:00
Martin Kojtal 93c08f340a Merge pull request #3062 from jamike/TARGET_STM_USBDEVICE_FS
TARGET_STM :USB device FS
2016-11-29 18:07:11 +01:00
jeromecoutant a933032a58 no HSE available by default for NUCLEO_L432KC 2016-11-24 11:33:43 +01:00
bcostm 92d39e2390 Add ADC_VREF label 2016-11-24 10:30:23 +01:00
andreas.larsson 9abb7c3777 Updated ARM binary 2016-11-23 17:39:28 +01:00
andreas.larsson 4648ec606b Added updated drivers for GCC, IAR 2016-11-23 15:18:17 +01:00
andreas.larsson c2d09bd6a2 Fixed wrong start params to cbMAIN_startWlan 2016-11-23 11:38:35 +01:00
bcostm a3baf2d7bf Add more comment on the modified line 2016-11-22 11:03:44 +01:00
adustm 0219b64af4 fix #2956. Add HAL_DeInit function if gpio_irq destructor
This allows ci-test-shield tests-api-interruptin to pass
2016-11-21 15:55:15 +01:00
bcostm 2ae748910b STM32F4 - Clear VBATE and TSVREFE bits before configuring ADC channels 2016-11-21 13:07:26 +01:00
Laurent MEUNIER e2613d5058 stm32 spi : IRQ handler light optimization
This commit contains a few optimizations to get a better performance
in SPI Asynch mode
2016-11-18 09:59:53 +01:00
Laurent MEUNIER 79af576051 stm32 spi - IRQ management
Disable IRQ when transfer is finished.
Also clear pending IRQ after they have been disabled.
2016-11-18 09:59:53 +01:00
Laurent MEUNIER 64a037cc8d STM32L0 - update spi HAL driver
This is a temporary update waiting for the next official release
2016-11-18 09:59:53 +01:00
Laurent MEUNIER 65db01f457 STM32L1 - update spi HAL driver
This is a temporary update waiting for the next official release
2016-11-18 09:59:53 +01:00
Laurent MEUNIER 7cdaba8474 [stm32] remove unused module member in spi_s struct 2016-11-18 09:59:53 +01:00
bcostm 6f12eca4a6 NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control 2016-11-17 10:15:21 +01:00
Martin Kojtal 6eb33e5f3c Merge pull request #3251 from LMESTM/dev_stm32l0_cube_v1.7.0
Dev stm32l0 cube v1.7.0
2016-11-16 17:43:16 +00:00
Martin Kojtal 5750f31d6d Merge pull request #3238 from LMESTM/dev_i2c_stm32f4hal
Dev i2c stm32f4hal
2016-11-16 17:42:12 +00:00
Sam Grove e875dbc90d Merge pull request #3237 from javierpedrido/master
Added back USART 6 pins
2016-11-14 21:46:59 -06:00
Sam Grove c131a27dcf Merge pull request #3231 from monkiineko/master
STM32F3: DISCO_F303VC - Add missing UART and ADC pin muxing options
2016-11-14 21:44:32 -06:00
bcostm da23ef135e Update license + date (same license as in mbed.h file) 2016-11-14 10:01:07 +01:00
bcostm 2006e458fd Typo corrections (functions declaration) 2016-11-14 09:56:54 +01:00
bcostm 777692cc16 Timer 16bit: Remove volatile variables. This solved many fails with MBED_24 test. 2016-11-14 09:31:14 +01:00
bcostm f8e18cdde4 Change TimMasterHandle variable declaration + typo corrections 2016-11-14 09:31:14 +01:00
bcostm cc24e5b7f9 Add initialization of timer instance in all functions 2016-11-14 09:31:14 +01:00
bcostm 6baec10d29 Rename files (remove stm_ prefix) 2016-11-14 09:31:14 +01:00
bcostm 589500642a STM32L0 - Add patch done previously on these devices. This solves MBED_24 test. 2016-11-14 09:31:14 +01:00
bcostm a2e686b82c Add volatile on one variable (alignment with 16bit file) 2016-11-14 09:31:14 +01:00
bcostm 896293d5be Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-11-14 09:31:14 +01:00
bcostm 3baaa7630b STM32L1 - Don't use RepetitionCounter field in timer init 2016-11-14 09:31:14 +01:00
bcostm 0524811c75 STM32xx - Remove hal_tick.c files and update hal_tick.h with new macro 2016-11-14 09:31:14 +01:00
bcostm ba8b33adc5 Minor changes 2016-11-14 09:31:14 +01:00
bcostm c3b8943f66 STM32L0 - Remove special treatment for reading the counter 2016-11-14 09:31:14 +01:00
bcostm ae858b4323 STM32F0/F1/L0 - Update TIM_MST_GET_PCLK_FREQ macro 2016-11-14 09:31:14 +01:00
bcostm 16239f5ed5 STM32L0 - Remove devices hal_tick.c files 2016-11-14 09:31:14 +01:00
bcostm 2488daf112 STM21L0 - Remove devices hal_tick.c file and update hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm a43e5b8a48 STM32F1 - Remove devices hal-tick files and update hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm 68915b7c27 STM32F0 - Add the timer type used (16b or 32b) + periph clock in hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm 4c7176fc2f Replace all devices hal_tick files with a common 16b and 32b version 2016-11-14 09:31:14 +01:00
bcostm bb10409954 Replace all devices us_ticker files with a common 16b and 32b file 2016-11-14 09:31:14 +01:00
Laurent MEUNIER e293e07749 stm32f4 make comment more explicit
As reported during review, this was not understandable as it is.
the get_i2c_obj allows to get a pointer to i2c_s struct from the
handle pointer. This therefore makes a hard-coded assumption
about the struct itself
2016-11-10 17:30:04 +01:00
Laurent MEUNIER fa9d147f69 Update Serial following L0 HAL update 2016-11-10 11:03:46 +01:00
Laurent MEUNIER ab0a8ad508 STM32L0: Cube update V1.5.0 to v1.7.0
Including HAL and CMSIS udpate
2016-11-10 11:03:46 +01:00
Brian Daniels 52dc7c5423 Renames all prebuilt binaries to be prefixed with 'lib'
This fixes an issue with make_iar, since IAR requires all libraries that
are linked to be prefixed with 'lib'.
2016-11-09 11:08:01 -06:00
Laurent MEUNIER b491165eac [STM32F4] Add few prints for I2C debug 2016-11-09 18:03:04 +01:00
Laurent MEUNIER a65bacc032 [STM32F4] Master receive sequential - fix for HAL I2C
in case of 2 consecutives calls to HAL_I2C_Master_Sequential_Receive_IT
with the Xfer mode I2C_FIRST_AND_LAST_FRAME, the second trasnfer does
not start at all.

It seems this is because the previous state is maintained as I2C_STATE_MASTER_BUSY_RX
and therefore the START condition will not be generated
2016-11-09 18:03:02 +01:00
Laurent MEUNIER a50dc77c60 STM32: I2C: Change the master sync implementation to use ITs
With this new implementation, as in slave implementaiton, we use the
interrupts instead of accessing to registers continuously.

This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
2016-11-09 18:02:59 +01:00
Laurent MEUNIER ec95aa5701 STM32: I2C: Reset I2C in case of errors to recover
This is to avoid an IP / bus deadlock.

This requires to store scl and sda in order to call the init function.
2016-11-09 18:02:57 +01:00
Laurent MEUNIER 42d89b0665 STM32: I2C: Update Timeout computation
The timeout values are based on for loops and therefore should depend
on the core frequency and the I2C interface frequency.

This patch introduces this computation and base the timeout on the time
it should take to send a byte over the I2C interface. When sending a
number of bytes, this value can also be used.

In the loops, the timeout should also be decreased before the while
condition so that its value is 0 in case the timeout elapsed and this
can be treated as an error.
2016-11-09 18:02:54 +01:00
Laurent MEUNIER 79504a6a38 STM32: I2C: Change the slave API implementation to use ITs
With this new implementation, the slave use the Interrupt
to be notified of a request from master, instead of
accessing to registers continuously.

This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
2016-11-09 17:22:28 +01:00
Laurent MEUNIER d71537bb00 STM32: I2C: use irq helper function 2016-11-09 17:22:28 +01:00
Laurent MEUNIER c2060e34a3 STM32: I2C: Add-up irq handlers
With this commit we define I2C irq handlers that can be used by the driver
in sync mode. This also provides a mecanism for enabling and/or disabling
these handlers

Those handlers will be superseded by MBED ones in case of async mode usage.
2016-11-09 17:22:28 +01:00
Laurent MEUNIER 490437ae29 STM32: I2C: Move up get_i2c_obj
so that it can be used as well in sync mode
2016-11-09 17:22:28 +01:00
Laurent MEUNIER 0bee69023c STM32: I2C: Don't use global init variables
No need to store the init status of each IP.
Init can be called again in case we try to recover.
2016-11-09 17:22:28 +01:00
Laurent MEUNIER 2b53dfc453 STM32: I2C: configure slave address with HAL API
Instead of direct registers access, let's use HAL API.
This makes the code more generic accross STM32 families.
2016-11-09 17:22:28 +01:00
javierpedrido b7882d6e9b Added back USART 6 pins 2016-11-09 12:14:35 -03:00
Michel Jaouen 182c311fbd TARGET_STM : USB FS STM HAL changes 2016-11-09 12:08:45 +01:00
Michel Jaouen 9c4e7173a5 DISCO_L476VG : align memory mapping with ARM 2016-11-09 12:08:41 +01:00
Michel Jaouen c2032c0442 DISCO_L476VG: modify clock for USB support 2016-11-09 12:08:36 +01:00
Bradley Scott 6d3f03c73d STM32F3: DISCO_F303VC - Add missing ADC pin muxing options
Corrects the incorrect PA_5 ADC channel mapping, and removes the
non-existent PB_11 ADC channel mapping.
2016-11-08 17:07:15 -05:00
Bradley Scott 130fddc467 STM32F3: DISCO_F303VC - Add missing UART pin muxing options 2016-11-08 17:04:21 -05:00
andreas.larsson 31a7cd017e Tab -> spaces 2016-11-07 21:59:27 +01:00
andreas.larsson baf519f4c5 Updated ublox ODIN-W2 binaries 2016-11-07 19:11:39 +01:00
Andreas Larsson fde39602b9 Fixed dynamic message queue for scan results 2016-11-07 15:52:59 +01:00
Andreas Larsson a4f09b5fdb Added cbMAIN_dispatchEventQueue 2016-11-07 15:52:58 +01:00
andreas.larsson 32dfe73b09 Added missing checks for wifi_link_out when allocating packets 2016-11-07 15:52:57 +01:00
andreas.larsson fd7c9cc13a Added copying of the wifi_link_out buffer since the buffer might change after call chain has ended. 2016-11-07 15:52:56 +01:00
Martin Kojtal 7eaf32baa0 Merge pull request #3075 from geky/nsapi-error-size-types-2
nsapi - Add standardized return types for size and errors
2016-11-07 11:13:40 +00:00
Christopher Haster b045c8ba00 nsapi - Adopted standardized return types in the Odin wifi interface 2016-11-02 15:37:34 -05:00
Mike Fiore 6cddb4df8b [MTS_MDOT_F411RE] add back SPI3 pins that shouldn't have been removed 2016-11-02 13:41:04 -05:00
Olaf Hagendorf 49fcc3b627 NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now
Through some minor extensions it is now possible to use all available alternate functions of a specific gpio pin. These alternatives exist up to now only as commented lines in PeripheralPins.c.
An API change is not necessary for this new functionality, only several pin definitions.

The new definitions now looks like:

    {PA_0,            ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC1_IN0
    {PA_0_ALT0,  ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC2_IN0 // choice: PA_0 with ADC_1
    {PA_0_ALT1,  ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC3_IN0 // choice: PA_0 with ADC_1

PA_0, PA_0_ALT0 or PA_0_ALT1 has to be used as pin names for the usage of the three possible ADC blocks (ADC1, ADC2, ADC3) connected to the pin (PA_0).
2016-11-01 18:04:55 +01:00
Sam Grove 38a9c84bae Merge pull request #2988 from martinjaeger/master
Update of can_api.c fixing #2987
2016-11-01 10:02:37 -05:00
Martin Jäger eb95c14fa6 Fixing some typos 2016-10-30 16:49:49 +01:00
Martin Kojtal 4a4d09f6d1 Merge pull request #3074 from jamike/TARGET_STM_INIT_GCC_ALIGNEMENT
Target STM - init gcc alignement
2016-10-28 11:04:50 +02:00
Michel Jaouen 4a69072161 INIT:GCC add call to HAL_Init
system_init, stops all on going timer.
gcc _start , perform zero initialized.
=> HAL_Init must be done again also in GCC toolchain
2016-10-27 10:40:28 +02:00
Michel Jaouen b225a5ca97 STM32F1xx : GCC_ARM remove zero bss done at startup.
Zero bss is done after the call to _start.
2016-10-27 10:40:17 +02:00
Michel Jaouen 702f64a6f2 STM32F0xx: GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-27 10:40:02 +02:00
Michel Jaouen 9f20c4641d STM32F0xx : GCC_ARM use a call to _start which performs
zero bss, C++ init and the call to main.
Remove direct call to __libc_init_array and main not needed
as _start is beeing called.
2016-10-27 10:39:02 +02:00
Michel Jaouen af090e3e6e STM32L0xx : GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-27 10:38:56 +02:00
Michel Jaouen 479a1a2715 STM32L1xx : GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-27 10:38:52 +02:00
Michel Jaouen f3b1c0a0c8 STM32L1xx : GCC_ARM a call to _start which performs
zero bss, C++ init and the call to main.
    Remove direct call to __libc_init_array and main not needed
    as _start is beeing called.
2016-10-27 10:38:35 +02:00
Martin Kojtal da377aa5d8 Merge pull request #3121 from monkiineko/master
STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH
2016-10-27 10:12:13 +02:00
Michel Jaouen a711ff360b STM32F7xx : GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-26 14:42:47 +02:00
Michel Jaouen 93a0b9ce60 STM32L4xx : GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-26 14:42:24 +02:00
Michel Jaouen ee22d0a054 STM32F4xx: GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-26 14:41:45 +02:00
Martin Kojtal 7499177a5b Merge pull request #3076 from bcostm/fix_issue-2910_nucleo-f103rb
STM32F1: Correct timer master value reading
2016-10-26 13:55:29 +02:00
Bradley Scott 97eaed7b0a STM32F3: Eliminate two unused variable warnings 2016-10-25 10:59:19 -04:00
Bradley Scott 4f9bdf5ee0 STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH 2016-10-25 10:58:38 -04:00
Martin Kojtal 4d1d1c5b69 Merge pull request #3068 from MultiTechSystems/mdot-pin-updates
MultiTech mDot - clean up PeripheralPins.c and add new pin names
2016-10-25 10:47:59 +02:00
Martin Kojtal 5b67832959 Merge pull request #3054 from andreaslarssonublox/ublox_fix_odin_mbedtls_config
Moved mbedtls config for u-blox ODIN-W2 to macros in target.json
2016-10-20 10:59:05 +01:00
bcostm 8a570cce93 STM32F1: correct the read of timer master value 2016-10-19 16:46:51 +02:00
Michel Jaouen 26f3352f83 STM32F3xxx : GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call _start.
2016-10-19 14:54:43 +02:00
Michel Jaouen 759837aff4 STM32F207: GCC_ARM remove zero bss, in startup.
zero bss is done in libc init after call to _start.
2016-10-19 14:54:41 +02:00
Sam Grove fc39f6b736 Merge pull request #3064 from c1728p9/f429_heap
NUCLEO_F429 - Increase IAR heap size
2016-10-19 05:51:20 -05:00
Sam Grove f1d678f8a4 Merge pull request #3056 from LMESTM/fix_stm32_pull_overwrite
Fix stm32 pull overwrite
2016-10-19 05:50:30 -05:00
Sam Grove 2ae71777aa Merge pull request #3013 from bcostm/check_adcintch_pins
STM32xx - Change how the ADC internal pins are checked before pinmap_…
2016-10-19 05:43:15 -05:00
Sam Grove 5eee95b7f5 Merge pull request #3008 from bcostm/fix_pwm_nucleo-f072rb
NUCLEO_F072RB: Fix wrong timer channel number on pwm PB_5 pin
2016-10-19 05:42:57 -05:00
Russ Butler d854547b0c NUCLEO_F429 - Increase IAR heap size
Increase the IAR heap size from 48KiB to 64KiB. This give enough heap
space to run the TLS encryption examples.
2016-10-18 16:43:28 -05:00
Mike Fiore c6fde7cfce [MTS_MDOT_F411RE] remove duplicate PWMs, fix swapped pins 2016-10-18 09:34:46 -05:00
Laurent MEUNIER 24d82d10ba [STM32F1] Fix pull overwrite
This fix addresses issue #2638 for STM32F1.
The STM32F1 family has a diffeerent register set for pull-up and pull-down
settings.

The same principle to read HW state is applied, as in commit:
[STM32] Fix pull over write to all families
except registers are different.

Also in this patch we make code a bit more linear.
Depending on pin_index, different register and shift index must be used.
Instead of checking this in several place, let's make a check at the
beginning of the function and use local register and shift variables.
2016-10-18 12:16:58 +02:00
Laurent MEUNIER af51027f61 [STM32] Fix pull over write to all families
This applies the same fix as was done for F4 to solve issue #2638.
The fix applies ell to all other families excpet STM32F1.

Basically, to avoid over-writing the pull-up/-down settings, we read the
current state from HW.
2016-10-18 12:16:58 +02:00
andreas.larsson cb113d738e Moved mbedtls config for u-blox ODIN-W2 to macros in target.json 2016-10-18 01:07:48 +02:00
andreas.larsson b8355c2073 Fixed the emac_interface_t struct so that the struct constructor is not used.
We can not rely on the struct constructor to be run since wifi_emac_get_interface can be run from the OdinWiFiInterface constructor before that.
2016-10-18 00:36:30 +02:00
Mike Fiore b6f7b8c463 [MTS_MDOT_F411RE] clean up peripheral pins & add new pin names 2016-10-17 15:36:28 -05:00
Russ Butler 7bcc63b202 Merge pull request #2977 from andreaslarssonublox/ublox_drivers
Ublox drivers
2016-10-14 14:56:06 -05:00
andreas.larsson 394796f47e Added guard for DEVICE_EMAC in wifi_emac_api.cpp 2016-10-14 02:42:53 +02:00
andreas.larsson 62bc6869e8 Added u-blox ODIN-W2 drivers for all toolchains 2016-10-13 23:37:42 +02:00
Sam Grove 08ff689afa Merge pull request #2979 from adustm/STM_F429_F439
New platforms: NUCLEO_F439ZI, NUCLEO_F756ZG, NUCLEO_L486RG
2016-10-13 16:22:36 -05:00
Brian Daniels 5d344e9548 Remove shared spi_s struct from XDOT_L151CC 2016-10-13 12:43:27 -05:00
adustm ff4fca6747 ADD NEW TARGET : NUCLEO_F756ZG, based on existing NUCLEO_F746ZG 2016-10-13 18:29:09 +02:00
adustm 78fd559d11 ADD NEW TARGET : NUCLEO_L486RG, based on existing NUCLEO_L476RG 2016-10-13 18:29:09 +02:00
adustm a07a271fe5 ADD NEW TARGET : NUCLEO_F439ZI, based on existing NUCLEO_F429ZI 2016-10-13 18:29:09 +02:00
Sam Grove 0ef0c617a9 Merge pull request #2999 from jeromecoutant/PR_F303ZE_I2C
NUCLEO_F303ZE: Enable all I2C instances
2016-10-13 11:14:46 -05:00
bcostm a484f51904 STM32xx - Change how the ADC internal pins are checked before pinmap_pinout 2016-10-13 16:28:57 +02:00
Laurent MEUNIER aeac255509 [STM32F303ZE] Update objects definition
STM32F303ZE was introduced in parallel to the changes which consist in
having family wide definitions like device.h file and a common objects
definition.

This target is updated accordingly now to benefit of SPI definitions.
2016-10-13 14:21:02 +02:00
Laurent MEUNIER 446dbe6a0e Clean-up style issues
Fix indentation issues, remove useless comments, correct if/else format
2016-10-13 14:21:02 +02:00
Laurent MEUNIER 1fb5b3f2d0 [STM32F4] SPI Peripheral pin - allow SPI3 to be used
Let's swap default PA_4 pin mapping to SPI_3 otherwise SPI3 cannot be used
2016-10-13 14:21:02 +02:00
Laurent MEUNIER 661b6adb93 [STM32] spi_master_write - rely on HAL
ASYNCH SPI transfer support has been added based on STM HAL services.
To have both ASYNCH and SYNCH work together, we're also moving the
write API to STM HAL instead of direct registers access.
2016-10-13 14:18:21 +02:00
Laurent MEUNIER 0aeea4950c [STM32] Deploy SPI_ASYNCH to all family
the SPI_ASYNCH feature has been already activated for STM32F4.
This patchset makes it supported on all STM32 families by:
- moving spi_s structure at family level instead of board level
- using the F4 spi_api.c reference implementation and making it a common
stm_spi_api.c file which makes maintenance a lot easier.
- the only part that needs to be implemented for each family is the computation
of the clock frequency input to the spi peripheral which is not the same
accross families. So this is what remains in the spi_api.c of each family.

Because of the introduction of the common file, all the above modifications
needs to be done at once.
2016-10-13 14:18:21 +02:00
bcostm f2ceed9e52 Fix wrong timer channel number of pwm PB_5 pin 2016-10-13 10:25:20 +02:00
Sam Grove 217a8fba8e Merge pull request #2972 from betzw/betzw_i2c_wb
Make (synchronous) I2C work again
2016-10-12 17:16:10 -05:00
Sam Grove 35d6682d61 Merge pull request #2970 from andreaslarssonublox/ublox_enable_hw_entropy
Enabled TRNG functionality for UBLOX_EVK_ODIN_W2 target.
2016-10-12 17:15:55 -05:00
Sam Grove f9ee683fa7 Merge pull request #2611 from adustm/STM32_entropy
STM32 hw entropy
2016-10-12 17:06:51 -05:00
jeromecoutant 366f04f60b NUCLEO_F303ZE: Enable all I2C instances 2016-10-12 16:52:26 +02:00
Wolfgang Betz d258c14e1e [STM32F4]: I2C bugfix 'i2c_stop()' timeout
- Remove waiting for 'BTF' flag in 'i2c_stop()':
  When 'i2c_stop()' is called from 'i2c_read()' or 'i2c_write()' flag 'BTF'
  has already been cleared (indirectly) by the calling functions and therefore
  'i2c_stop()' would mistakenly always run into a timeout.
- Delay clock enabling until pins are configured:
  Enabling the I2C bus clock before configuring its pins might in rare
  cases lead to HW faults on the bus.
- Move initialization of 'handle->Instance' to function 'i2c_reset()':
  As 'i2c_reset()' uses '__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BUSY)' field
  'handle->Instance' must have been initialized before doing so. Therefore,
  this operation has been anticipated by moving it from function
  'i2c_frequency()' to function 'i2c_reset()'.
2016-10-12 07:02:42 +02:00
Martin Jäger bc589db42a Update of can_api.c fixing #2987 2016-10-11 21:05:21 +02:00
andreas.larsson 84a25e72f7 Fixed wrong stack pointer 2016-10-10 18:55:46 +02:00
Sam Grove f5fb485dcd Merge pull request #2967 from viquiram/master
Modify the flash size for Nucleo L073RZ.
2016-10-10 10:35:59 -05:00
Sam Grove 8d6e358387 Merge pull request #2947 from bcostm/adcintch_L4
STM32L4xx - Add support of ADC internal channels
2016-10-10 10:35:18 -05:00
Sam Grove 4297042096 Merge pull request #2932 from bcostm/adcintch_F4
STM32F4xx - Fix issue with ADC internal Temperature and VBat channels.
2016-10-10 10:35:06 -05:00
Sam Grove 085dd0925a Merge pull request #2921 from bcostm/serialFC_F0
STM32F0xx - Add missing UART_RTS/CTS pins for Serial Flow Control
2016-10-10 10:34:48 -05:00
andreas.larsson cb97f5dc7f Enabled TRNG functionality for UBLOX_EVK_ODIN_W2 target. 2016-10-10 15:42:47 +02:00
Martin Kojtal 8f492a20a7 Merge pull request #2920 from LMESTM/fix_pull_overwrite
STM32F4: Fix pull overwrite
2016-10-10 10:23:55 +01:00
Martin Kojtal d38d82bbab Merge pull request #2946 from bcostm/adcintch_L0
STM32L0xx: Add support of ADC internal channels
2016-10-10 10:17:06 +01:00
bcostm 246528fe85 Add UART_RTS/CTS pins 2016-10-10 10:23:47 +02:00
adustm f140559526 Add objects.h for L073 2016-10-10 10:12:39 +02:00
adustm bda200e814 rework after directory moves 2016-10-10 10:12:39 +02:00
adustm e189bc7cc8 Change MBEDTLS_ENTROPY_ALT to device has TRNG
update code accordingly
2016-10-10 10:12:39 +02:00
viquiram 1a91fc7abf Update stm32l073xz.sct
Modify the flash size for Nucleo L073RZ.
2016-10-10 09:56:47 +02:00
viquiram 142aa09286 Update stm32l073xz.sct
Modify the flash size for Nucleo L073RZ.
2016-10-10 09:55:45 +02:00
Sam Grove 864ff7754b Merge pull request #2924 from bcostm/adcintch_F2
STM32F2xx - Add support of ADC internal channels (temperature, VRef, VBat)
2016-10-07 11:33:11 -05:00
Sam Grove b3e88c3c72 Merge pull request #2951 from bcostm/adcintch_L1
STM32L1xx - Add support of ADC internal channels
2016-10-07 11:15:50 -05:00
Sam Grove 53a52a1b56 Merge pull request #2930 from bcostm/adcintch_F0
STM32F0xx - Use ADC internal channels specific definitions
2016-10-07 11:13:43 -05:00
Sam Grove ad59be6812 Merge pull request #2928 from bcostm/adcintch_F7
STM32F7xx - Add support of ADC internal channels
2016-10-07 11:13:30 -05:00
Sam Grove eee4db1fe0 Merge pull request #2896 from geky/restructure-cmsis
restructure - Restructure cmsis directory
2016-10-07 11:13:09 -05:00
bcostm 50cb26040a STM32L1xx - Add support of ADC internal channels (Temperature, VRef) 2016-10-06 17:15:16 +02:00
bcostm 49fe84ccd0 STM32L1xx - Use STM_PIN_DATA_EXT macro and obj->channel field to facilitate channels configuration 2016-10-06 16:48:45 +02:00
bcostm 569f64a966 STM32L4xx - Add support of ADC internal channels 2016-10-06 15:41:00 +02:00
bcostm 5f8052a9ef Remove VLCD ADC internal channel on L011 and L031 devices (not present) 2016-10-06 14:58:40 +02:00
bcostm c637477711 Add support of ADC internal channels for L0 devices 2016-10-06 14:53:28 +02:00
bcostm 4207ebf329 Fix issue with Temp and VBat channels. Use internal channels specific definitions. 2016-10-05 16:33:46 +02:00
bcostm 480d784497 Use ADC internal channels specific definitions 2016-10-05 15:20:55 +02:00
bcostm ed411983a0 Use ADC internal channels specific definitions 2016-10-05 15:06:35 +02:00
bcostm dfc2a2d097 Add VBat channel and manage better the internal channels configuration 2016-10-05 14:58:01 +02:00
bcostm 7f14131d5b STM32F7xx - Add support of ADC internal channels 2016-10-05 14:38:02 +02:00
bcostm 354ffe84ab Add channel 17 for Vref 2016-10-05 11:12:47 +02:00
bcostm 007aac86ca Add channel 17 for VRef 2016-10-05 11:02:11 +02:00
bcostm ad431dc613 STM32F2xx - Add support of ADC internal channels (temperature) 2016-10-05 10:25:03 +02:00
bcostm bcd8f2431a STM32F1xx - Add ADC internal channel (Temperature) 2016-10-05 10:06:15 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00
Laurent MEUNIER e8675033f4 [STM32] remove superfluous calls to SystemCoreClockUpdate
Supported toolchains initialization steps have been modified to make sure
that mbed_sdk_initi is called _after_ RAM initialization and _before_ C++
objects creation.

since this was done, there is no need to redundant SystemCoreClockUpdates
in the drivers
2016-10-04 15:08:28 -05:00
Laurent MEUNIER fe9d3174bf INIT:GCC no rtos: Align pre-main initialization steps between TCs
Various toolchains supported in MBED don't follow the same initialization
steps. This can have impacts on platform behavior.

For STM32, it is needed to call the HAL_Init() _after_ the  RAM has been
initialized (sdata from flash / zero initialized data) and _before_ the C++
objects are being created, especially if those objects require support
of tickers for instance.

In GCC, this is easily done because SystemInit is called after the ram
initialisation, so HAL_Init does not need to called from mbed_sdk_init.
this is covered by the changes in mbed_overrides.c files.

This series should solve issue reported here:
STM32 (At least F401) breaks if Tickers are activated in a global object #2115
2016-10-04 14:55:20 -05:00
Laurent MEUNIER 3f81f5df50 [STM32F4] Use previously introduced pin_function_gpiomode
This way the pull-up / pull-down modes would not be overwritten
as first reported in issue #2638
2016-10-04 11:19:24 +02:00
Laurent MEUNIER e516bddc66 [STM32F4] Introduce a function that sets gpio mode w/o changin pull mode
This function reads the pull mode from HW and can then be used
to avoid over-writing the previously set pull-up / pull-down modes.

This is done following reported issue: #2638
2016-10-04 11:19:22 +02:00
andreas.larsson 1d3c63d9bb Changed name for the target UBLOX_C029 to UBLOX_EVK_ODIN_W2 2016-10-03 12:10:50 +02:00
Christopher Haster 0bad622a16 restructure - Moved targets out to top level
hal/targets -> targets
hal/targets.json -> targets/targets.json
2016-09-30 19:18:09 -05:00