Set the channel mux before taking a reading rather than on
initialization. This allows ADC pins on both mux A and B to be used in
the same application.
This commit adds hardware flow control capabilities for the K64F family
of MCUs. This is a backport of these commits:
9bfcfd057277042cc945
with a few changes:
- since the current version of KSDK doesn't seem to have APIs for
manipulating the flow control settings, we change the peripheral
registers directly.
- updated pin maps for RTS/CTS in accordance to the K64F datasheet.
Reported in Issue #2119
There was some inconsistency in serial interrupt handling accross STM32
serial_api.c implementation. In case application wants to be notified of
Tx interrupt, it is mainly interested in transmission complete information,
which is the _TC interrupt.
The _TXE (Transmit Data REgister Empty) is used only within driver
in case SERIAL_ASYNCH is being supported to make the transmission
more efficient.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
As first reported on STM32F3 family in #1682, we need to cope
with periods in the seconds range as well. This is fixed here in
the same way as was done for STM32F3 by using the pre-scaler.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
Some of the objects in object.h are the same for all targets.
Create a place where to define those common definitions, and
start using it for pwm object.
The new period needs to be saved before the duty cycle is updated as
the period is used in pwmout_write function.
Also presclaer shall better be initiliazed properly.
This patch adds BLE Cordio support into MBED HAL. It contains:
* Cordio and TRIM object files
* The Cordio stack header file
* The Cordio library for Beetle Systems precompiled for GCC and ARMCC
The BLE implementation will be provided in a future patch in the mbed-os
repository.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
In Beetle systems eFlash and Cache Flash are always enabled by default.
This patch updates the Mbed SDK Init procedure to reflect the changes in
the eFlash and Cache Flash Drivers provided in a previous patch.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
This patch adds BLE Cordio support into CMSIS. It provides:
* A modification for the linker scripts for both ARMCC and GCC
compilers that adds the cordio specific sections.
* A method to access the Flash stored MAC Address.
The CORDIO_RO_2.1.o and TRIM_2.1.o objects that rappresent the Cordio
firmware will be added by a future patch.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
In Beetle systems eFlash and Cache Flash are always enabled by default.
This patch refines the interface of these drivers to match the
functionalities exposed by the platform.
This patch renames also writel/readl in these drivers to uppercase to follow
acros code convention.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
- changing device.h -> targets.json after rebase
- adding startup and config files for ARM_STD toolchain
- changing all STM32F7xx targets to ARM as default toolchain (instead of uARM before)
- nrf headers synchronized with the one in BLE implementation. This is a
short term fix. The nordic branches use a single nrf SDK and does not
have duplicate headers. Once this branch will be integrated, there will
be no more issues around duplicate headers.
- enable feature BLE in the targets.json. This fix was done a long time
ago in the nordic branch. Without it, it is not possible to compile BLE
examples.
Issue #2074
Assuming that OverSampling is initialized, the baudrate is now correctly
computed inside CMSIS (STM32 HAL) layer. This was not the case before but
most probably was fixed during latest L0 cube firmware upgrade:
commit ce436d5107
Author: svastm <simon.vanson@st.com>
Date: Thu Apr 14 14:39:53 2016 +0200
Update STM32CUBE_L0 from v1.2 to v1.5
- __heap_size__ was used to allocate a fixed size region for the heap in
RW_IRAM1
- __user_setup_stackheap in sys.cpp uses Image$$RW_IRAM1$$ZI$$Limit as the
start of the heap, which leaves the fixed size region unused
Update of STM32L4 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32L1 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32L0 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32F7 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32F3 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Signed-off-by: Erwan GOURIOU <frq07517@st.com>
Update of STM32F1 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32F0 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Update of STM32F4 family CPI clock selection algo.
Maximum SPI clock is obtained from APB domain clock (based on HAL API).
Then algo sets maximum frequency available below requested frequency
Andrzej Puzdrowski
Martin Kojtal
Vincent Coubard
jeromecoutant
Bogdan Marinescu
Hasnain Virk
Russ Butler
Bogdan Marinescu
lrks
svastm
Michel JAOUEN
Laurent MEUNIER
Rohit Grover
Brian Daniels
Michel Jaouen
Erwan Gouriou
Laurent Meunier
Aksel Skauge Mellbye
Steven Cooreman
Andrzej Głąbek
Vincenzo Frascino
adustm
ohagendorf
Jarek Zgoda
Sam Grove
Christopher Haster
Mahadevan Mahesh
Colin Hogben
tomoyuki yamanaka
Erwan GOURIOU
Mike Fiore