Seppo Takalo
02f8fbda62
Merge pull request #11019 from OpenNuvoton/nuvoton_wait-ns
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Nuvoton: Modify wait ns(...) to provide more accurate implementation
2019-07-17 14:30:47 +03:00
Evelyne Donnaes
0a4e5146b0
Merge pull request #11049 from SeppoTakalo/normalize
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Normalize line endings for IM880B startup files.
2019-07-17 09:24:52 +01:00
Arto Kinnunen
9cdfe37783
Merge pull request #10994 from fkjagodzinski/fix-serial_fc_guards
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Add DEVICE_SERIAL_FC guards to serial HAL API
2019-07-15 15:47:37 +03:00
Arto Kinnunen
01484a2226
Merge pull request #11007 from SiliconLabs/fix/fpga_tests/pwm
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Fix PWM output on Silicon Labs targets for large pulsewidths
2019-07-15 15:43:46 +03:00
Arto Kinnunen
b5d8c3860e
Merge pull request #11008 from SiliconLabs/fix/fpga_tests/spi
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Enable FPGA-based SPI testing on Silicon Labs targets
2019-07-15 15:42:55 +03:00
Arto Kinnunen
6ef5e228b5
Merge pull request #11015 from SiliconLabs/fix/fpga_tests/adc
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Fix wrongly declared ADC pinout for EFM32GG11 STK3701A
2019-07-15 15:38:47 +03:00
Arto Kinnunen
5c45fa72a9
Merge pull request #11003 from NXPmicro/Fix_LPC_I2C
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LPC MCUXpresso: Remove extra I2C transaction on byte write
2019-07-15 15:32:02 +03:00
Seppo Takalo
b22641ca18
Normalize line endings for IM880B startup files.
2019-07-15 14:56:22 +03:00
Evelyne Donnaes
22c82dcb9c
Merge pull request #10692 from vmedcy/pr/psoc6-hal
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PSOC6: initial integration of Cypress HAL
2019-07-11 17:28:23 +01:00
Volodymyr Medvid
b6524070eb
PSOC6: TARGET_PSOC6_FUTURE doesn't implement DEVICE_I2CSLAVE
2019-07-11 15:43:25 +03:00
Evelyne Donnaes
7db0e83836
Merge pull request #11013 from tymoteuszblochmobica/revert-10938-iar
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Revert "K64F, STM32F429: IAR linker scripts dynamic heap fix"
2019-07-11 12:18:53 +01:00
Volodymyr Medvid
adfac3c1f9
PSOC6: do not remove QSPI from FUTURE_SEQUANA targets
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Since QSPi is not yet supported by base TARGET_PSOC6,
there is no need to remove the device label from
FUTURE targets that inherit from TARGET_PSOC6.
This will need to be reverted back once the QSPI support
is implemented for Cypress PSOC6 targets.
2019-07-11 12:51:52 +03:00
Volodymyr Medvid
bab34cb467
PSOC6: cleanup DEVICE_QSPI mappings
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Note: device_has: "QSPI" is still disabled for TARGET_PSOC6
(QSPI HAL implementation is incomplete).
2019-07-11 12:50:56 +03:00
Volodymyr Medvid
2524a67c38
Merge remote-tracking branch 'ARMmbed/master' into pr/psoc6-hal
2019-07-11 10:19:03 +01:00
Martin Kojtal
9fdfe3fa30
Merge pull request #11002 from NXPmicro/Add_Restricted_List
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LPC546XX: Add pins to LPCXpresso restricted list
2019-07-11 08:14:20 +01:00
Tymoteusz Bloch
878c93673b
Reverted "K64F, STM32F429: IAR linker scripts dynamic heap fix"
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due to side effect with K64F bootloader application jump after three consecutive HW resets.
2019-07-10 13:30:40 +02:00
Steven Cooreman
35851005ef
Fix wrongly declared ADC pinout for EFM32GG11 STK3701A
2019-07-10 11:27:29 +01:00
Volodymyr Medvid
140b72d3ed
Merge remote-tracking branch 'ARMmbed/master' into pr/psoc6-hal
2019-07-10 10:54:14 +01:00
Steven Cooreman
fb4d898f2e
Allow re-initializing an I2C peripheral
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Allows the FPGA based test to pass, but requires #11004 before it will
2019-07-09 23:37:11 +01:00
Steven Cooreman
6094542bb1
Avoid the FPGA tester using hardware CS which is not supported
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Also implement rudimentary spi_free...
2019-07-09 22:48:37 +01:00
Steven Cooreman
476dc6e46a
Fix for PWM output found by testing against FPGA shield
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Two issues:
* Downcasting too early
* Potential for a uint32_t overflow in an intermediate calculation
Passing test requires #11005 to be merged.
2019-07-09 22:38:53 +01:00
Mahesh Mahadevan
aef60d7edf
LPC MCUXpresso: Remove extra I2C transaction on byte write
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An extra start signal was observed on the bus which was
discovered by the FPGA test shield.
This is because the hardware sends out a transaction as soon
as a write to the START bit. Hence the write to the START
bit is delayed by using a flag.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2019-07-09 16:05:28 -05:00
Mahesh Mahadevan
58ba83b6e4
LPC546XX: Add pins to LPCXpresso restricted list
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FPGA GPIO tests cannot be run on certain pins
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2019-07-09 15:40:55 -05:00
Filip Jagodzinski
4842c87815
RDA5981X: Add SERIAL_FC
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According to comment in the implementation this target supports the
hardware flow control on UART1 peripheral.
This patch fixes build errors after adding DEVICE_SERIAL_FC guards to
hal/serial_api.h.
2019-07-09 16:30:12 +02:00
Filip Jagodzinski
68d222b3d1
MPS2: Fix serial_init when FC is not used
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After adding DEVICE_SERIAL_FC guards to serial_api.h
serial_set_flow_control is not available. In case of this
implementation, this function is a no-op and may be safely removed.
2019-07-09 16:12:32 +02:00
Filip Jagodzinski
86149e59d6
FVP_MPS2: Fix serial_init when FC is not used
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After adding DEVICE_SERIAL_FC guards to serial_api.h
serial_set_flow_control is not available. In case of this
implementation, this function is a no-op and may be safely removed.
2019-07-09 16:05:04 +02:00
Martin Kojtal
647b5817ce
Merge pull request #10982 from jeromecoutant/PR_LPUART
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STM32 LPUART minor update for easy maintenance
2019-07-09 08:33:06 +01:00
Martin Kojtal
358046e472
Merge pull request #10989 from mprse/spi_fpga_basic_test_ext
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SPI FPGA test extension + SPI driver fix (K64F)
2019-07-08 20:42:47 +01:00
Volodymyr Medvid
d77fb26e9f
PSOC6: fix license headers per review feedback
2019-07-08 18:25:03 +03:00
Arto Kinnunen
1264660314
Merge pull request #10972 from 0xc0170/test_target
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add new target IM880B
2019-07-08 16:34:36 +03:00
Martin Kojtal
bd762ce03f
Merge pull request #10466 from jeromecoutant/PR_STM32H7_WATCHDOG
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STM32H7: WATCHDOG and RESET_REASON support
2019-07-08 13:54:40 +01:00
Przemyslaw Stekiel
7d7c1416af
K64F SPI driver: Add the delay between CS assertion and first sclk edge
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FPGA test shield requires at lease half slck period delay between CS assertion and first sclk edge.
2019-07-08 14:54:33 +02:00
Volodymyr Medvid
1501ffe704
PSOC6: remove CY8CKIT-062S2-4343W (not ready for release)
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Also removed _M0 targets that are no longer used.
2019-07-08 14:49:26 +03:00
Volodymyr Medvid
5cc66282dd
PSOC6: remove PSA targets
2019-07-08 14:49:26 +03:00
Volodymyr Medvid
56f1d0613f
PSOC6: remove libwiced_drivers for targets ported to WHD
2019-07-08 14:49:26 +03:00
Volodymyr Medvid
d07ca87816
PSOC6: update Cypress boards to use TARGET_WHD
2019-07-08 14:49:26 +03:00
Volodymyr Medvid
8ede226c16
PSOC6: add WHD sources
2019-07-08 14:24:23 +03:00
Volodymyr Medvid
4f22853c1e
PSOC6: update BSP sources
2019-07-08 14:24:23 +03:00
Volodymyr Medvid
c647531767
PSOC6: update BSP GeneratedSource, add design.modus
2019-07-08 14:24:22 +03:00
Volodymyr Medvid
4bd47e9bca
PSOC6: update to latest psoc6pdl
2019-07-08 14:24:21 +03:00
Volodymyr Medvid
b562dd7895
PSOC6: update Cypress targets to use psoc6csp
2019-07-08 14:24:20 +03:00
Volodymyr Medvid
a9cd9482c0
PSOC6: add psoc6csp asset with Cypress HAL implementation
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PSoC 6 Chip Support Package provides hardware abstraction layer
for Cypress PSoC 6 device peripherals.
2019-07-08 13:26:46 +03:00
Chun-Chieh Li
3d905b0607
[NUC472] Override wait_ns(...) to provide more accurate implementation
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NUC472 series doesn't support cache but supports branch buffer. But it still
cannot provide zero-wait state flash performance.
2019-07-08 17:52:26 +08:00
Chun-Chieh Li
2b9ee2a93f
[NANO130] Override wait_ns(...) to provide more accurate implementation
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NANO100 series doesn't support cache and so cannot provide zero-wait state
flash performance.
2019-07-08 17:52:26 +08:00
Chun-Chieh Li
a03985ea43
[M2351] Refine wait_ns(...) code
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1. Add missing header file for mbed_mpu_manager_lock_ram_execution()/
mbed_mpu_manager_unlock_ram_execution() to avoid compile warning.
2. Locate delay_loop_code() on 16-byte boundary (sync to common version).
3. Optimize delay_loop macro (sync to common version).
2019-07-08 17:51:49 +08:00
Volodymyr Medvid
c9105eb068
PSOC6: use prebuilt CM0+ C arrays instead of HEX images
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Replace the prebuilt CM0+ HEX images with C files that provide the
variable cy_m0p_image placed to the combined ELF image with linker
script. This simplifies build flow of PSoC 6 application and improves
compatibility with IDE export targets. It is still possible to use
the custom prebuilt HEX images for PSA targets that remove CM0P_SLEEP
label and specify the `hex_filename` in targets.json.
Linker scripts are compatible with both scenarios.
2019-07-08 10:41:02 +01:00
Volodymyr Medvid
9d983478d7
PSOC6: add psoc6cm0p asset with prebuilt CM0+ C arrays
2019-07-08 10:33:48 +01:00
Volodymyr Medvid
903085d066
PSOC6: format extra labels for Cypress kits
2019-07-08 10:31:14 +01:00
Arto Kinnunen
3d65ace77a
Merge pull request #10950 from artokin/Update_freescale_K6xF_linker_files
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Enable split heap in K64F/K66F devices
2019-07-08 11:46:30 +03:00
jeromecoutant
8a3fd6a040
STM32 LPUART update
2019-07-05 17:52:41 +02:00