Commit Graph

260 Commits (mbed-os-6.11.0-docs-utf-8-fix)

Author SHA1 Message Date
Cruz Monrreal 63f62165d8
Merge pull request #7565 from OpenNuvoton/nuc472_emac_rst
Nuvoton: Fix NUC472 SD-Host HW IP reset definition
2018-07-31 11:44:01 -05:00
Cruz Monrreal cf84b05473
Merge pull request #6985 from OpenNuvoton/nuvoton_fix_rtosless_heap
Fix heap base/limit error with ARM_LIB_STACK/ARM_LIB_HEAP in RTOS-less
2018-07-31 11:36:42 -05:00
ccli8 313f322cf7 [Nuvoton] Replace __wrap__sbrk with overriding _sbrk
With _sbrk being weak, we can override it directly rather than #if to support heap with
two-region model.
2018-07-26 15:47:25 +08:00
ccli8 d6ae30a728 [Nuvoton] Merge multiple ARM/ARMC6 sys.cpp into one 2018-07-25 10:04:31 +08:00
cyliangtw 240619745d Fixed NUC472 SD & EMAC IP reset define 2018-07-20 18:23:41 +08:00
ccli8 4f04ae489e [Nuvoton] Synchronize lp_ticker code to us_ticker
This is to make us_ticker/lp_ticker code consistent.
2018-06-28 16:34:45 +08:00
ccli8 1fa3374310 [Nuvoton] Remove special handling for dummy interrupt in lp_ticker
It is because dummy interrupt is very rare or pending time caused by it
is very short.
2018-06-28 16:27:37 +08:00
ccli8 310a1fe318 [Nuvoton] Synchronize lp_ticker code to us_ticker
This is to make us_ticker/lp_ticker code consistent.
2018-06-26 13:47:30 +08:00
ccli8 8e11ddf3b6 [Nuvoton] Fix trap in lp_ticker ISR with non-blocking "clear interrupt flag" 2018-06-26 13:47:29 +08:00
ccli8 fe627cb722 [Nuvoton] Synchronize lp_ticker code to us_ticker
This is to make us_ticker/lp_ticker code consistent.
2018-06-26 13:47:27 +08:00
ccli8 86e194d075 [Nuvoton] Reduce blocking code in lp_ticker
1. Introduce S/W interrupt enable/disable to reduce calls to TIMER_EnableInt/TIMER_DisableInt.
2. Allow dummy interrupt because clear interrupt flag is not synchronized.
3. Enable LPTICKER_DELAY_TICKS to make lp_ticker_set_interrupt non-blocking.
2018-06-26 13:47:26 +08:00
ccli8 3f861425da [Nuvoton] Meet new lp_ticker HAL spec (Mbed OS 5.9)
1. Add LPTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in lp_ticker_init
3. Add lp_ticker_free
4. Enable interrupt in lp_ticker_set_interrupt
2018-06-26 13:47:17 +08:00
ccli8 ebd93ba753 [Nuvoton] Meet new us_ticker HAL spec (Mbed OS 5.9)
1. Add USTICKER in device_has option of targets.json file.
2. Disable ticker interrupt in us_ticker_init
3. Add us_ticker_free
4. Enable interrupt in us_ticker_set_interrupt
2018-06-26 13:45:33 +08:00
ccli8 6065e3a943 [Nuvoton] Fix RTC cannot cross reset cycle 2018-05-29 17:22:02 +08:00
ccli8 2cefe7d8d5 [Nuvoton] Power down RTC access from CPU domain in rtc_free
After rtc_free, RTC gets inaccessible from CPU domain but keeps counting.
2018-05-29 10:33:01 +08:00
Bartek Szatkowski 6e9f04bf2f Rename DEVICE_LOWPOWERTIMER to DEVICE_LPTICKER
That's to match DEVICE_USTICKER.
2018-05-25 12:20:09 -05:00
Cruz Monrreal f73415e9f8
Merge pull request #6466 from OpenNuvoton/nuvoton_fix_spi
Nuvoton: Fix issues with SPI
2018-04-16 10:47:51 -05:00
ccli8 571e89048f [Nuvoton] Remove dead code with '#if 0' in SPI 2018-04-09 09:33:52 +08:00
Jimmy Brisson 897885909d
Merge pull request #6394 from OpenNuvoton/nuvoton_fix_ticker
Nuvoton: Fix us_ticker/lp_ticker
2018-03-29 11:58:53 -05:00
ccli8 707de87497 [Nuvoton] Refine SPI code
1. Remove dead code
2. Remove space in empty lines
3. Fix compile warnings
4. Fix some comments
2018-03-26 11:02:54 +08:00
ccli8 7275ee8626 [Nuvoton] Fix SPI DMA transfer
1. Disable unnecessary TX/RX threshold interrupts to avoid potential trap in DMA transfer
2. Start TX/RX DMA transfer simultaneously to fit H/W spec and avoid potential RX FIFO overflow issue
2018-03-26 10:58:18 +08:00
ccli8 9e72756878 [Nuvoton] Use vector rather than SPI_CTL_SPIEN_Msk to judge if asynchronous transfer is on-going (spi_active) 2018-03-26 10:50:14 +08:00
ccli8 643d772cf9 [Nuvoton] Introduce SPI_ENABLE_SYNC/SPI_DISABLE_SYNC to simplify enable/disable control 2018-03-26 10:34:22 +08:00
ccli8 ccec9d75d6 [Nuvoton] Add missing delay in lp_ticker
mbed-os-tests-mbed_drivers-lp_ticker/Test multi ticker test fails inconstantly.
This commit is mainly to fix the issue.
2018-03-26 09:45:59 +08:00
ccli8 5d453ed381 [Nuvoton] Check timer active flag after enabling timer counting in us_ticker/lp_ticker 2018-03-26 09:42:53 +08:00
ccli8 3cd8d3df9f [Nuvoton] Remove unnecessary TIMER_Start in the end of lp_ticker_set_interrupt 2018-03-26 09:27:05 +08:00
ccli8 f0865f8546 [Nuvoton] Fix page size in flash IAP
In Mbed OS, page size is program unit, which is different than FMC definition.
After fixing page size, we can pass NVSTORE test (mbed-os-features-nvstore-tests-nvstore-functionality).
2018-03-22 16:45:01 +08:00
ccli8 7ed3bac85d [Nuvoton] Remove unnecessary UART INT in UART DMA transfer
In UART DMA transfer, it is PDMA INT rather than UART INT to go INT path
2018-03-19 17:52:01 +08:00
Cruz Monrreal f1d493dd0c
Merge pull request #6228 from OpenNuvoton/nuvoton_1timer_ticker
Nuvoton: Rework us_ticker/lp_ticker with one H/W timer
2018-03-05 10:19:56 -06:00
cyliangtw b6ff40e94d [M451/M480/NANO100/NUC472] Define SERIAL and I2C pin name for compatiblity 2018-02-27 11:38:29 +08:00
ccli8 1d7e7fd543 [NUC472/M453/M487/NANO130] Rework us_ticker and lp_ticker with one H/W timer
Originally, we use 2 H/W timers for us_ticker/lp_ticker, one for counting and the other for alarm.
With H/W timer running in continuous mode, we could use just one H/W timer for counting/alarm simultaneously.
2018-02-26 17:41:05 +08:00
Cruz Monrreal 817f9a569c
Merge pull request #5812 from OpenNuvoton/nuvoton_crypto
M487: Support ECP H/W accelerator
2018-02-20 11:53:23 -06:00
Cruz Monrreal aa6835a069
Merge pull request #6048 from OpenNuvoton/nuvoton_ticker
Nuvoton: Rework us_ticker and lp_ticker
2018-02-16 15:59:05 -06:00
ccli8 cfdc72d75e [NUC472/M487] Refine crypto_zeroize/crypto_zeroize32 2018-02-12 14:04:56 +08:00
ccli8 0271df1fa5 [NUC472/M453/M487/NANO130] Rework RTC
The rework includes the following:
1. Support year range beyond H/W RTC 2000~2099.
2. Refine RTC register access with low-power clock source
2018-02-09 10:47:18 +08:00
ccli8 fae160fb9f [NUC472/M453/M487/NANO130] Rework us_ticker and lp_ticker
The rework includes the following:
1. Remove ticker overflow handling because upper layer (mbed_ticker_api.c) has done with it.
   This makes us_ticker/lp_ticker implementation more succinct and avoids potential error.
2. Refine timer register access with low-power clock source
2018-02-07 09:09:39 +08:00
ccli8 160f75d536 [NUC472/M487] Fix warning in crypto 2018-01-22 10:51:12 +08:00
ccli8 f61d9d48c8 [NUC472/M453/M487/NANO130] Add gpio_is_connected 2018-01-18 17:33:03 +08:00
ccli8 a68750473c [M487] Support ECP H/W accelerator 2018-01-09 16:20:41 +08:00
ccli8 67386b9ebd [NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter. 2018-01-05 09:18:26 +08:00
ccli8 a00f8d0e8b [NUC472/M487] Guard from reordering DMA wait and post-wait for crypto modules 2018-01-05 09:18:25 +08:00
ccli8 3a8c1aa687 [NUC472/M487] Use interrupt signal rather than polling to check operation completion in DES alter.
This is to be consistent with PRNG/AES.
2018-01-05 09:18:24 +08:00
ccli8 0c1098483f [NUC472/M487] Refine flow control code between crypto start and crypto ISR 2018-01-05 09:18:24 +08:00
ccli8 e1fbf0f6a7 [NUC472/M487] Add comment for crypto_zeroize 2018-01-05 09:18:24 +08:00
ccli8 9edda18b0f [NUC472] Update BSP crypto driver 2018-01-05 09:18:23 +08:00
ccli8 a0a8a955a9 [NUC472/M487] Strengthen crypto DMA buffer check
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
2018-01-05 09:18:21 +08:00
ccli8 b0228d020d [NUC472/M487] Fix compile error as mbedtls is not included
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
2018-01-05 09:18:20 +08:00
ccli8 6464649c41 [NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG 2018-01-05 09:18:20 +08:00
ccli8 d66074fecc [NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
2018-01-05 09:18:18 +08:00
Martin Kojtal be52ba2156
Merge pull request #5363 from mprse/extended_rtc
Add support and tests for extended RTC
2017-12-12 17:36:44 +00:00
Przemyslaw Stekiel 106561669f Update RTC drivers for extended RTC. 2017-12-05 07:54:02 +01:00
Jimmy Brisson ab1b3ae8d3
Merge pull request #5454 from OpenNuvoton/trng_get_unalignment
Nuvoton: TRNG_Get support 32 bytes unalignment
2017-11-22 10:21:39 -06:00
cyliangtw 288094568c [M487/NUC472/NANO130] fix TRUE/FALSE redefinition 2017-11-16 11:21:20 +00:00
cyliangtw d8a9e35a0c [M487/NUC472] Refine trng_get_bytes for consistency and readability 2017-11-13 12:11:08 +08:00
cyliangtw 2ee058be53 [M487/NUC472] Refine for correctness control 2017-11-10 16:22:35 +08:00
cyliangtw e252b10148 [M487/NUC472] zeroize random data on the stack memory 2017-11-09 16:01:14 +08:00
cyliangtw 76c2c19853 [M487/NUC472] Unified code-path for remaining bytes of TRNG_Get 2017-11-08 19:56:12 +08:00
cyliangtw 4118afa259 [M487/NUC472] TRN_Get support 32 bytes unalignment 2017-11-08 14:23:05 +08:00
ccli8 bf426b0771 [NUC472/M453/M487/NANO130] Remove dead power-down code with mbed OS 3
These power-down code are stale and would be superseded by sleep manager.
2017-09-22 09:42:51 +08:00
ccli8 d4af4ba3a7 [NUC472/M453/M487] Fix RTC hour error with AM/PM 2017-09-20 16:56:34 +08:00
ccli8 83fc132b97 [NUC472] Fix RTC macro function with no arguments in BSP 2017-09-20 16:56:33 +08:00
ccli8 6eb4e11b37 [NUC472/M453/M487] Refine sleep code
1. Remove stale code with mbed OS 3.
2. Remove check for busy peripherals unorganizedly. This would be supported by e.g. official sleep manager.
2017-09-20 16:56:32 +08:00
Jimmy Brisson 91afbce18a Correct Nuvoton compiler detection logic 2017-09-11 13:20:33 -05:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets
remove duplicate sys.cpp
2017-09-11 13:20:32 -05:00
cyliangtw 6b8724b27d [NUC472] Sync SPI mode with NUC472 BSP V3.02.001 2017-08-01 14:40:54 +08:00
ccli8 d885de6ec5 [NUC472/M453] Move target configuration from mbed_lib.json to targets.json 2017-08-01 14:40:48 +08:00
ccli8 8092c3611b [NUC472/M453] Add comment for Receive Time-out IF in SPI HAL 2017-08-01 14:40:42 +08:00
ccli8 c7fcd071e9 [NUC472/M453] Add sanity check for serial format 2017-08-01 14:40:37 +08:00
ccli8 5e335de67e [NUC472/M453] Set LED4 to LED1
No real LED4. Just for passing ATS.
2017-08-01 14:40:31 +08:00
ccli8 ea1de8c9a8 [NUC472/M453] Remove mbed_sdk_init_forced()
1. With mbed OS 5, mbed_sdk_init() is ensured to call before C++ global object constructor.
2. Refine startup file with GCC_ARM toolchain related to this modification.
2017-08-01 14:40:25 +08:00
ccli8 6c9fda4e3e [NUC472/M453] Fix lp_ticker typo 2017-08-01 14:40:20 +08:00
ccli8 ea7a0fdf74 [NUC472/M453] Add comment in gpio_irq_init() 2017-08-01 14:40:14 +08:00
ccli8 46cb684a32 [NUC472] Conform to mbed TLS H/W acceleration support 2017-08-01 14:40:08 +08:00
ccli8 8067f9ac91 [NUC472/M453] Move SystemInit() to register unlock range for perhaps future protected register access 2017-08-01 14:40:02 +08:00
ccli8 2844be6434 [NUC472/M453] Fix RTC time doesn't continue across reset cycle 2017-08-01 14:39:57 +08:00
ccli8 c4df35d1b5 [NUC472/M453] Fix region end address error with IAR toolchain 2017-08-01 14:39:50 +08:00
Jimmy Brisson 1f94ede86c Merge pull request #4744 from deepikabhavnani/spi_issue_4743
Allow user to set default transfer byte for block read
2017-07-24 14:45:30 -05:00
Deepika 1b797e9081 Closed review comments
1. Doxygen and Grammar related
2. Change dummy to spi_fill
3. Remove NXP driver and add default loop in spi block read (same as all
other drivers)
2017-07-21 09:46:22 -05:00
Martin Kojtal 10ea63b8e7 Ticker: add fire interrupt now function
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.

set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.

It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.

The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)

All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
2017-07-13 12:23:25 +01:00
Sam Grove 547320e99c Rename function st_rtc_localtime with _rtc_localtime 2017-06-07 23:24:48 -05:00
Vincent Coubard f880e44145 remove usage of mktime/localtime in favor of dedicated functions.
The use of mktime was causing a fault when called in interrupt handler because on GCC it lock the mutex protecting the environment, To overcome this issue, this patch add dedicated routine to convert a time_t into a tm and vice versa.
In the process mktime has been optimized and is now an order of magnitude faster than the routines present in the C library.
2017-06-07 22:06:22 -05:00
Sam Grove 5f138810a9 Merge pull request #4294 from ARMmbed/feature_cmsis5
Update CMSIS-Core and RTX to version 5
2017-06-02 23:44:32 -05:00
Martin Kojtal e229a49182 Merge pull request #4207 from geky/spi-remove-byte-locking
spi: Add SPI block-write to C++ and HAL for performance
2017-06-01 14:03:36 +02:00
Bartek Szatkowski b97ffe8fdc CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation 2017-05-30 18:55:51 +01:00
Sam Grove d11289b576 Merge pull request #4165 from adustm/can_init
fix #3863 Add an mbed API that allows the init of the CAN at the bus frequency
2017-05-26 10:45:19 -05:00
Christopher Haster c1de19e49e spi: Added default spi_master_block_write implementation to all targets
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
2017-05-25 12:04:58 -05:00
adustm 3d44a3fcc3 add can_init_freq for NUVOTON platforms 2017-05-15 14:27:22 +02:00
ccli8 08c778d18d [NUC472/M453] Change comment for serial_getc/serial_putc 2017-05-09 09:22:41 +08:00
ccli8 e7b737ddad [NUC472/M453] Fix serial error with sync/async calls interlaced
Serial implementation uses different vector handlers for sync/async calls respectively. The issue can be reproduced with the following flow:
1. Register sync mode callback with Serial.attach().
2. Sync call with Serial.putc()/getc().
3. Change to async call with Serial.write()/read().
4. Change back to sync call with Serial.putc()/getc().
Now, vector handller is still for async mode, not for sync mode.

To fix it:
1. Introduce internal function serial_enable_interrupt() for both sync/async vector handler enable/disable.
   Original HAL function serial_irq_set() is reduced to call it for sync mode vector handler enable/disable.
2. Introduce internal function serial_rollback_interrupt() to roll back sync mode vector handler at end of async transfer.
2017-05-02 09:31:09 +08:00
ccli8 32a7e6ba5e [NUC472/M453] Fix pwmout power-down condition 2017-04-20 16:13:37 +08:00
ccli8 e55553e749 [NUC472/M453] Fix DMA channel over-allocate 2017-04-20 14:57:09 +08:00
ccli8 40a9852608 [NUC472] Fix flash algorithm
1. Remove setting of not released register ICPCON
2. Enable FMC_APUEN to update APROM
2017-04-05 11:10:48 +08:00
cyliangtw b55708ec65 [NUC472] remove stray tabs to avoid formatting slips 2017-03-30 09:17:35 +08:00
cyliangtw c9e9052c5d [NUC472/M453] remove redundant comment of flash_api 2017-03-23 20:43:52 +08:00
cyliangtw ab814661e5 [NUC472/M453] Fixed scatterAssert of ROM limit 2017-03-23 15:25:08 +08:00
cyliangtw c1b8509b23 [NUC472] Enable HW AES 2017-03-23 10:03:58 +08:00
cyliangtw 1e163e8848 [NUC472/M453] Support bootloader 2017-03-23 09:54:03 +08:00
ccli8 d554f6e4e0 [NUC472/M453] Support flash 2017-03-23 09:54:03 +08:00
ccli8 5720725a3d [NUC472/M453] Refine serial PDMA code 2017-03-10 16:18:14 +08:00
ccli8 502e8ce2a5 [NUC472/M453] Refine SPI PDMA code 2017-03-10 16:18:14 +08:00
ccli8 867072fe70 [NUC472/M453] Add dma_modbase() to get PDMA base address 2017-03-10 16:18:14 +08:00
ccli8 49a2a221a4 [NUC472/M453] Fix pwmout power-down condition 2017-03-10 16:18:14 +08:00
ccli8 4e96f8b721 [NUC472/M453] Fix PDMA error on timeout 2017-03-10 16:18:14 +08:00
ccli8 1da33e809f [NUC472/M453] Refine pin/peripheral/pin map definitions
Change NUC472 analogin_api.c accordingly
2017-03-10 16:18:14 +08:00
ccli8 4e4c294fa3 [NUC472/M453] Fix incorrect use of peripheral name as peripheral base address 2017-03-10 16:18:14 +08:00
Christopher Haster aff49d8d1e Renamed files in platform to match source names
critical.h     -> mbed_critical.h
sleep.h        -> mbed_sleep.h
toolchain.h    -> mbed_toolchain.h
rtc_time.h     -> mbed_rtc_time.h
semihost_api.h -> mbed_semihost_api.h
wait_api.h     -> mbed_wait_api.h
2017-02-22 18:17:54 -06:00
ccli8 0bd8fb22c4 [NUC472] Support no-XRAM configuration 2017-02-14 09:12:02 +08:00
Sam Grove d8151d7991 Merge pull request #3590 from OpenNuvoton/nuvoton
[NUC472/M453] Export IAR project and other bugfixes
2017-02-13 10:12:02 -06:00
Bartek Szatkowski 6a045a49a9 Platform: Add sleep/deepsleep user facing functions
Add sleep/deepsleep functions to platform layer which are replacing HAL
functions with the same name, rename existing symbols in HAL layer
to hal_sleep/hal_deepsleep. This way sleep functions
are always available, even if target doesn't implement them, which makes
the code using sleep clearer. It also enables us to make decision on in
which builds (debug/release) the sleep will be enabled.
2017-01-19 09:39:29 +00:00
ccli8 0a0b326da6 [NUC472/M453] Change sbrk() allocation to be 32-byte aligned 2017-01-16 09:48:27 +08:00
ccli8 453f60e9c1 [NUC472/M453] Remove power-down support from us_ticker 2017-01-16 09:48:21 +08:00
Martin Kojtal e7361ebc44 Merge pull request #3365 from OpenNuvoton/nuvoton_usb
[NUC472/M453] Support USB device
2016-12-30 12:43:53 +01:00
ccli8 fff8357c1e [NUC472] Fix compile error with Travis CI
Use MBED_CONF_RTOS_PRESENT to filter out mbedtls alternative for mbed OS 2.
2016-12-15 11:43:43 +08:00
cyliangtw e4a5401b9b [NUC472/M453] Fix GCC warnings 2016-12-13 15:41:41 +08:00
ccli8 64e27b2e3d [NUC472/M453] Fix stuck in lp_ticker_init() 2016-12-13 11:10:51 +08:00
cyliangtw ec945db013 [NUC472] Resolve TRNG GCC warning 2016-12-13 11:10:51 +08:00
ccli8 3ff2df1875 [NUC472] Fix compile error for SHA-256 alternative on some condition
Also include non-issue refinement for SHA-1/SHA-256 alternatives.
2016-12-13 11:10:51 +08:00
ccli8 6af60f9b32 [NUC472/M453] Fix PWM clock error in BSP driver 2016-12-13 11:10:51 +08:00
ccli8 f796eb5d2d [NUC472/M453] Change UART RTS/CTS to low level active 2016-12-13 11:10:51 +08:00
ccli8 59e38666ae [NUC472/M453] Fix serial async transfer failed as data with is 16/32 2016-12-13 11:10:51 +08:00
ccli8 8c0948d605 [NUC472/M453] Integrate with Travis CI
1. Add targets into build_travis.py and tests.py.
2. Add target SPI pins into SPI SD test samples.
3. Rename target TOOLCHAIN_GCC_ARM/retarget.c to avoid name collision of compiled retarget.o with platform/retargets.cpp.
2016-12-09 13:46:38 +08:00
ccli8 7f4881fbb2 [NUC472/M453] Support USB device 2016-12-05 15:12:15 +08:00
ccli8 e1995dbe79 [NUC472/M453] Fix spi_master_transfer failed as bit width is 32 2016-11-25 15:32:25 +08:00
ccli8 d24c71fad9 [NUC472/M453] Correct return of i2c_byte_write() on NAK 2016-11-22 13:45:01 +08:00
ccli8 57a22cd4ab [NUC472/M453] Fix CI I2C EEPROM failed 2016-11-22 09:56:54 +08:00
ccli8 f4890f68f1 [NUC472] Remove SPI MOSI1 and MISO1 pins from pinmap
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
2016-11-22 09:56:54 +08:00
ccli8 e1acb06d05 [NUC472] Rename variable name in analog-in 2016-11-22 09:56:53 +08:00
ccli8 35b2ad5a2c [NUC472] Fix CI tests-api-analogin failed
1. Fix UNO pins A5-A7 don't support analog-in by replacing ADC with EADC to implement analog-in HAL.
2. Update CLK driver to fix EADC clock divider setting error. Also fix CLK_Idle() together.
2016-11-22 09:56:53 +08:00
ccli8 e0f97e5c80 [NUC472/M453] Support separate enable of GPIO IRQ de-bounce 2016-11-22 09:56:53 +08:00
ccli8 657d90db2c [NUC472/M453] Fix I2C issues
1. Fix error on return of i2c_byte_write().
2. Fix error in zero-length transfer corner case.
2016-11-22 09:56:53 +08:00
ccli8 4ae76be2ce [NUC472/M453] Reduce (interrupt) stack size from 4 KB to 2 KB 2016-11-07 12:28:20 +08:00
ccli8 c557842d68 [NUC472] Reduce (interrupt) stack size from 12 KB to 4 KB 2016-11-07 10:59:42 +08:00
ccli8 2922de8dff [NUC472/M453] Remove dead code in device.h 2016-11-07 10:59:42 +08:00
ccli8 e09d9a15f5 [NUC472/M453] Support UART H/W module shared by multiple serial S/W objects
1. With GCC_ARM and uARM, some greentea tests fail due to no support for this.
2. Bind UART H/W module to correct serial S/W object for interrupt.
2016-11-07 10:59:42 +08:00
cyliangtw a044a65996 fixed misaligned lines in can_api.c of NUC472 & M453 2016-11-01 11:44:44 +08:00
cyliangtw da8fd8b5b7 remove dead code in can_api.c of NUC472 & M453 2016-11-01 11:29:09 +08:00
cyliangtw 33cfe1f599 remove dead code in device.h of NUC472 & M453 2016-10-28 18:39:56 +08:00
cyliangtw 6889c1368b replace tab by 4 space char 2016-10-27 16:31:29 +08:00
cyliangtw 85c45a5174 [NUC472] Fix SetBaudRate 5% inaccuracy issue 2016-10-21 14:01:17 +08:00
cyliangtw 6e64d730b5 support NUC472 CAN 2016-10-20 15:12:35 +08:00
ccli8 4ec07510b3 [NUC472] Fix PWM1 clock source setting error 2016-10-20 15:12:35 +08:00
ccli8 005f032cae [NUC472] Rename SD_0/SD_1 SD_0_0/SD_0_1 to match real SD H/W 2016-10-20 15:12:31 +08:00
ccli8 6683032999 [NUC472] Fix SD pinmaps are not extern'ed 2016-10-11 10:55:08 +08:00
ccli8 1f2f4e3bb3 [NUC472/M453] Move files to match ARM mbed's restructure
1. Move USBHALHost_M451.cpp and USBHALHost_NUC472.cpp.
2. Move TARGET_M451/mbed_lib.json.
3. Move TARGET_NUC472/crypto.
4. Move TARGET_NUC472/mbed_lib.json.
2016-10-11 10:55:08 +08:00
ccli8 c75d54c668 [NUC472] Fix pin definition error regarding SD, I2C, and SPI
1. Fix pin definition error regarding SD.
2. Fix pin definition error regarding I2C.
3. Fix pin definition error regarding SPI.
4. Add pinmap for SD.
2016-10-11 10:55:08 +08:00
ccli8 c2b9089332 [NUC472] Fix buffer overflow in BSP SD driver 2016-10-11 10:55:08 +08:00
cyliangtw 11c05afc62 support mesh in IAR tool chain 2016-10-11 10:55:08 +08:00
cyliangtw a1b383a604 support mesh in GCC tool chain 2016-10-11 10:55:08 +08:00
ccli8 a9d65e46a3 [NUC472] Fix warnings generated by armcc 2016-10-11 10:55:08 +08:00
ccli8 dfc32409a9 [NUC472/M453] Refine comment for two-region model 2016-10-11 10:55:08 +08:00