Limit NUCLEO_H723ZG toolchain to GCC_ARM only.
This is the only toolchain this target has been tested with yet.
Signed-off-by: Daniel Starke <daniel-email@gmx.net>
- add board specific EMAC setup to connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7
- stm32h7_eth_init.c was derived from the NUCLEO-H743ZI2 code whilst comparing to the output of STM32CubeIDE
- complete board specific code in targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H723xG
- PeripheralPins.c and PinNames.h were created by targets/TARGET_STM/tools/STM32_gen_PeripheralPins.py
- ST ZIO connector pins in PinNames.h have been adapted from NUCLEO-H743ZI2
- CONSOLE_TX and CONSOLE_RX have been interchanged in PinNames.h to match the actual board layout
- startup_stm32h723xx.S was derived from startup_stm32h743xx.S
- stm32h723xg.ld was completely rewritten to match the actual MCU including:
- split heap support
- SRAM2 and SRAM4 support
- crash dump support
- proper use of DTCM as stack
- system_clock.c has been changed to support the maximal main clock speed of 550 MHz
- fix handling of HS in FS mode for the target board in targets/TARGET_STM/USBPhy_STM32.cpp
- add board definition to targets/targets.json and correct linker setup for the chip
Signed-off-by: Daniel Starke <daniel-email@gmx.net>
1. Prepare crypto common code
2. Support list
- SHA
- ECC
NOTE: AES/RSA are to support in other works
NOTE: Compared to M487, M467's SHA supports context save & restore (DMA Cascade mode) and so no software fallback is needed.
NOTE: M467's ECC, following M487, goes partial-module replacement and it can just improve primitives e.g. point addition/doubling by 2X,
and cannot improve high level point multiplication because MbedTLS doesn’t open it.
To improve performance best, full-module replacement is needed.
NOTE: Continuing above, add support for Montgomery curve
1. For GCC, support multi-block .data/.bss initialization
2. HyperRAM is mapped to two regions: 0x0A000000 and 0x80000000
According to default system address map, 0x0A000000 is located at 'Code' region and 0x80000000 at 'RAM' region.
With MPU enabled on Mbed OS, 'Code' region is write-never and 'RAM' region execute-never.
0x80000000 is chosen because 'RAM' regioin is naturally for HyperRAM.
3. Configurable multi-function pins for HBI
4. To locate code/data at external HyperRAM:
- Specify __attribute__((section(".text.nu.exthyperram"))) for RO/.text/readonly section type
Invoke mbed_mpu_manager_lock_ram_execution()/mbed_mpu_manager_unlock_ram_execution() to run HyperRAM code
- Specify __attribute__((section(".data.nu.exthyperram"))) for RW/.data/readwrite section type
- Specify __attribute__((section(".bss.nu.exthyperram"))) for ZI/.bss/zeroinit section type
5. Add readme
1. Based on alpha version BSP (85564a2716548e7b6d6a79a490c6d94a24cf9bcf)
2. Continuing above, tweak BSP:
(1) Add EPWM_ConfigOutputChannel2() to enable below 1Hz and below 1% duty cycle for PWM output (m460_epwm.h/c).
(2) Add dummy RTC_WaitAccessEnable() for consistency with previous ports (m460_rtc.h).
3. Target NuMaker-M467HJ V0.1 board temporarily
4. Support Arduino UNO form factor for NUMAKER_IOT_M467 target
5. Enable export to Keil/IAR project
- tools/arm_pack_manager/index.json
- tools/export/iar/iar_definitions.json
- Add SDK files (updated to match mbed system)
- Implement mbed API files
- Update mbed related configuration (CMakefiles, .json files...)
- Add gcc and arm related files (linker, scatter, startup...)
- Tested with ARM and GCC_ARM toolchain
- GreenTea tests have been executed
Signed-off-by: Sadik.Ozer <Sadik.Ozer@maximintegrated.com>
Jerome Coutant
Deepak V. Shreshti
cyliangtw
Martin Kojtal
Daniel Starke
Chun-Chieh Li
Henrik Persson
Jason Reiss
YahyaTawil
Sadik.Ozer
Wally
Michal Majcherski
bakatrouble
Jookia