mirror of https://github.com/ARMmbed/mbed-os.git
M467: Support HyperRAM
1. For GCC, support multi-block .data/.bss initialization
2. HyperRAM is mapped to two regions: 0x0A000000 and 0x80000000
According to default system address map, 0x0A000000 is located at 'Code' region and 0x80000000 at 'RAM' region.
With MPU enabled on Mbed OS, 'Code' region is write-never and 'RAM' region execute-never.
0x80000000 is chosen because 'RAM' regioin is naturally for HyperRAM.
3. Configurable multi-function pins for HBI
4. To locate code/data at external HyperRAM:
- Specify __attribute__((section(".text.nu.exthyperram"))) for RO/.text/readonly section type
Invoke mbed_mpu_manager_lock_ram_execution()/mbed_mpu_manager_unlock_ram_execution() to run HyperRAM code
- Specify __attribute__((section(".data.nu.exthyperram"))) for RW/.data/readwrite section type
- Specify __attribute__((section(".bss.nu.exthyperram"))) for ZI/.bss/zeroinit section type
5. Add readme
pull/15337/head
Chun-Chieh Li
parent
8da2e31336
commit
0494866f5f
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@ -0,0 +1,67 @@
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# Nuvoton M460 series
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## HyperRAM
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HyperRAM, via Hyper Bus Interface Controller (HBI), is mapped to two regions: `0x0A00_0000`–`0x0BFF_FFFF` and `0x8000_0000`–`0x81FF_FFFF`, through which CPU can direct access.
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### Enable HBI for HyperRAM
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To enable HBI for HyperRAM, create one Mbed OS application configuration file named `mbed_app.json` under root directory of your sample program.
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The file should have the following content which will enable HBI and configure its multi-function pins:
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**mbed_app.json**:
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```json
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{
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......
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"target_overrides": {
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......
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"NUMAKER_IOT_M467": {
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"target.hbi-enable": true,
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"target.hbi-mfp-reg-list": "0x40000534, 0x4000057C, 0x40000590, 0x40000594",
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"target.hbi-mfp-reg-msk-list": "0xFFFFFF00, 0xFFFFFFFF, 0xFFFF0000, 0xFFFFFFFF",
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"target.hbi-mfp-reg-val-list": "0x10101000, 0x10101010, 0x10100000, 0x10101010"
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}
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}
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}
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```
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Where:
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- `hbi-mfp-reg-list`: Comma-separated list of relevant multi-function pin registers
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- `hbi-mfp-reg-msk-list`: Comma-separated list of relevant multi-function pin register masks
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- `hbi-mfp-reg-val-list`: Comma-separated list of relevant multi-function pin register values
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> **_NOTE:_** Make sure your HyperRAM hardware is ready.
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> **_NOTE:_** Change the multi-function pins to align with your hardware.
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### Locate data at HyperRAM
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In the port, the region `0x8000_0000`–`0x81FF_FFFF` is chosen for the goal because on Mbed OS, MPU is enabled and the region is configured to be write-able, which naturally fits HyperRAM.
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To get to the goal, data must place in specified sections:
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**Locate initialized data**
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Initialized data are just like `RW` sections for ARM, `.data` sectionis for GCC_ARM, and `readwrite` sections for IAR.
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To locate them at HyperRAM, place in specified sections named `.data.nu.hyperram`.
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```c++
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__attribute__((section(".data.nu.hyperram")))
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uint32_t my_data = 100;
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```
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**Locate zero-initialized data**
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Zero-initialized data are just like `ZI` sections for ARM, `.bss` sections for GCC_ARM, and `zeroinit` sections for IAR.
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To locate them at HyperRAM, place in specified sections named`.bss.nu.hyperram`.
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```c++
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__attribute__((section(".bss.nu.hyperram")))
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uint32_t my_bss;
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```
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> **_NOTE:_** Don't mis-place in sections,
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or behavior is undefined because C runtime is not correctly initialized for these sections.
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> **_NOTE:_** Check linker-generated .map file to make sure your data are actually located at HyperRAM.
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@ -21,11 +21,19 @@
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#include "../M460_mem.h"
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#define VECTOR_SIZE (4*(16 + 128))
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#if !defined(NU_HYPERRAM_START)
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#define NU_HYPERRAM_START 0x80000000
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#endif
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#if !defined(NU_HYPERRAM_SIZE)
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#define NU_HYPERRAM_SIZE 0x800000
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#endif
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LR_IROM1 MBED_APP_START MBED_APP_SIZE {
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ER_IROM1 MBED_APP_START MBED_APP_SIZE { ; load address = execution address
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*(RESET, +First)
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@ -53,6 +61,12 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE {
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ARM_LIB_HEAP AlignExpr(+0, 16) EMPTY (MBED_RAM_APP_START + MBED_RAM_APP_SIZE - AlignExpr(ImageLimit(RW_IRAM1), 16)) {
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}
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NU_HYPERRAM NU_HYPERRAM_START NU_HYPERRAM_SIZE {
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*(.text.nu.hyperram)
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*(.data.nu.hyperram)
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*(.bss.nu.hyperram)
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}
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}
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ScatterAssert(LoadLimit(LR_IROM1) <= (MBED_APP_START + MBED_APP_SIZE))
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@ -23,7 +23,15 @@
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#include "../M460_mem.h"
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#if !defined(MBED_BOOT_STACK_SIZE)
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#define MBED_BOOT_STACK_SIZE 0x400
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#define MBED_BOOT_STACK_SIZE 0x400
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#endif
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#if !defined(NU_HYPERRAM_START)
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#define NU_HYPERRAM_START 0x80000000
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#endif
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#if !defined(NU_HYPERRAM_SIZE)
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#define NU_HYPERRAM_SIZE 0x800000
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#endif
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M_CRASH_DATA_RAM_SIZE = 0x100;
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@ -34,6 +42,7 @@ MEMORY
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VECTORS (rx) : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
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FLASH (rx) : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x00000400
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RAM_INTERN (rwx) : ORIGIN = MBED_RAM_APP_START, LENGTH = MBED_RAM_APP_SIZE
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HYPERRAM (rwx) : ORIGIN = NU_HYPERRAM_START, LENGTH = NU_HYPERRAM_SIZE
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}
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/**
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@ -79,6 +88,52 @@ SECTIONS
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. = ALIGN(8);
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} > VECTORS
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.copy.table : ALIGN(4)
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{
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__copy_table_start__ = .;
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/* .data located at internal SRAM */
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LONG (LOADADDR(.data))
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LONG (ADDR(.data))
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LONG (SIZEOF(.data))
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/* .text.nu.hyperram located at HyperRAM */
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LONG (LOADADDR(.text.nu.hyperram))
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LONG (ADDR(.text.nu.hyperram))
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LONG (SIZEOF(.text.nu.hyperram))
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/* .data.nu.hyperram located at HyperRAM */
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LONG (LOADADDR(.data.nu.hyperram))
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LONG (ADDR(.data.nu.hyperram))
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LONG (SIZEOF(.data.nu.hyperram))
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__copy_table_end__ = .;
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} > FLASH
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.zero.table : ALIGN(4)
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{
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__zero_table_start__ = .;
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/* .bss located at internal SRAM */
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LONG (ADDR(.bss))
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LONG (SIZEOF(.bss))
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/* .bss.nu.hyperram located at HyperRAM */
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LONG (ADDR(.bss.nu.hyperram))
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LONG (SIZEOF(.bss.nu.hyperram))
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__zero_table_end__ = .;
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} > FLASH
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/* First match used, so place in front of .text */
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.text.nu.hyperram :
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{
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*(.text.nu.hyperram)
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} >HYPERRAM AT>FLASH
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Image$$NU_HYPERRAM$$RO$$Base = ADDR(.text.nu.hyperram);
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Image$$NU_HYPERRAM$$RO$$Limit = ADDR(.text.nu.hyperram) + SIZEOF(.text.nu.hyperram);
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Image$$NU_HYPERRAM$$RO$$Length = SIZEOF(.text.nu.hyperram);
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.text :
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{
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@ -156,7 +211,17 @@ SECTIONS
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. = ALIGN(8);
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__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
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} > RAM_INTERN
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/* First match used, so place in front of .data */
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.data.nu.hyperram :
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{
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*(.data.nu.hyperram)
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} >HYPERRAM AT>FLASH
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Image$$NU_HYPERRAM$$RW$$Base = ADDR(.data.nu.hyperram);
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Image$$NU_HYPERRAM$$RW$$Limit = ADDR(.data.nu.hyperram) + SIZEOF(.data.nu.hyperram);
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Image$$NU_HYPERRAM$$RW$$Length = SIZEOF(.data.nu.hyperram);
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.data :
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{
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PROVIDE( __etext = LOADADDR(.data) );
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@ -205,6 +270,20 @@ SECTIONS
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__uninitialized_end = .;
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} > RAM_INTERN
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/* First match used, so place in front of .bss */
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/* If a variable defined with __attribute__((section())) keyword the
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* variable is treated like an initialized variable. To not waste memory
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* NOLOAD attribute used here. The whole section is zero initialized by
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* adding section information to .zero.table */
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.bss.nu.hyperram (NOLOAD):
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{
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*(.bss.nu.hyperram)
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} > HYPERRAM
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Image$$NU_HYPERRAM$$ZI$$Base = ADDR(.bss.nu.hyperram);
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Image$$NU_HYPERRAM$$ZI$$Limit = ADDR(.bss.nu.hyperram) + SIZEOF(.bss.nu.hyperram);
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Image$$NU_HYPERRAM$$ZI$$Length = SIZEOF(.bss.nu.hyperram);
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.bss (NOLOAD):
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{
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__bss_start__ = .;
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@ -226,5 +305,4 @@ SECTIONS
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PROVIDE(__heap_size = SIZEOF(.heap));
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PROVIDE(__mbed_sbrk_start = ADDR(.heap));
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PROVIDE(__mbed_krbs_start = ADDR(.heap) + SIZEOF(.heap));
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}
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@ -26,6 +26,14 @@ if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
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define symbol MBED_BOOT_STACK_SIZE = 0x400;
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}
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if (!isdefinedsymbol(NU_HYPERRAM_START)) {
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define symbol NU_HYPERRAM_START = 0x80000000;
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}
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if (!isdefinedsymbol(NU_HYPERRAM_SIZE)) {
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define symbol NU_HYPERRAM_SIZE = 0x800000;
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}
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/*-Specials-*/
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define symbol __ICFEDIT_intvec_start__ = MBED_APP_START;
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/*-Memory Regions-*/
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@ -35,6 +43,8 @@ define symbol __ICFEDIT_region_IRAM_start__ = MBED_RAM_APP_START;
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define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 0x100 - 1;
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define symbol __region_CRASH_DATA_RAM_start__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 0x100;
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define symbol __region_CRASH_DATA_RAM_end__ = MBED_RAM_APP_START + MBED_RAM_APP_SIZE - 1;
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define symbol __ICFEDIT_region_HYPERRAM_start__ = NU_HYPERRAM_START;
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define symbol __ICFEDIT_region_HYPERRAM_end__ = NU_HYPERRAM_START + NU_HYPERRAM_SIZE - 1;
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/*-Sizes-*/
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define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE;
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define symbol __ICFEDIT_size_intvec__ = (4 * (16 + 128));
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@ -46,23 +56,42 @@ define memory mem with size = 4G;
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define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
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define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__];
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define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
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define region HYPERRAM_region = mem:[from __ICFEDIT_region_HYPERRAM_start__ to __ICFEDIT_region_HYPERRAM_end__];
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define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
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define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { };
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/* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */
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define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { };
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/* Place .text.nu.hyperram/.data.nu.hyperram/.bss.nu.hyperram together
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*
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* NOTE: Don't use wildcard like .text.nu.hyperram*. This can collide with .text.nu.hyperram*_init or
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* linker-generated initializer for .text.nu.hyperram*.
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* NOTE: Per test, 'section .data.nu.hyperram*' will cause linker-generated initializer (const)
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* also placed here, resulting in large gap, though it can get fixed with
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* 'readwrite section .data.nu.hyperram*'.
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* NOTE: With 'initialize by copy { section .text.nu.hyperram }', .text.nu.hyperram is still taken
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* as readonly (for initializer), resulting in large gap.
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* NOTE: With 'initialize manually { section .text.nu.hyperram }', .text.nu.hyperram becomes readwrite
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* .text.nu.hyperram_init is generated by linker to be readonly. We need to do the initialization
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* for .text.nu.hyperram manually.
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*/
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define block NU_HYPERRAM with alignment = 8 { section .text.nu.hyperram,
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section .data.nu.hyperram,
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section .bss.nu.hyperram };
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/* Define Crash Data Symbols */
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define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
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define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
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initialize by copy { readwrite };
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do not initialize { section .noinit };
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initialize by copy { readwrite };
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initialize manually { section .text.nu.hyperram };
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do not initialize { section .noinit };
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place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
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place in ROM_region { readonly };
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place in ROM_region { readonly };
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place at start of IRAM_region { block CSTACK };
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place in IRAM_region { block IRAMVEC };
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place in IRAM_region { readwrite };
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place in IRAM_region { block HEAP };
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place in HYPERRAM_region { block NU_HYPERRAM };
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@ -16,6 +16,23 @@
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* limitations under the License.
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*/
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#if defined(__GNUC__)
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/* Get around error: conflicting type qualifiers for '__copy_table_start__'
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*
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* cmsis_gcc.h also imports the following symbols but with different type qualifier:
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*
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* __copy_table_start__
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* __copy_table_end__
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* __zero_table_start__
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* __zero_table_end__
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*
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* Define `__PROGRAM_START` to exclude __cmsis_start() in cmsis_gcc.h.
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*/
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#define __PROGRAM_START
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#endif
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#include "M460.h"
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/* Suppress warning messages */
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void __iar_program_start(void);
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#elif defined(__GNUC__)
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extern uint32_t __StackTop;
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extern uint32_t __etext;
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extern uint32_t __data_start__;
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extern uint32_t __data_end__;
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extern uint32_t __bss_start__;
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extern uint32_t __bss_end__;
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extern uint32_t __copy_table_start__;
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extern uint32_t __copy_table_end__;
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extern uint32_t __zero_table_start__;
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extern uint32_t __zero_table_end__;
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#if defined(TOOLCHAIN_GCC_ARM)
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extern void _start(void);
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@ -466,31 +482,73 @@ void Reset_Handler_1(void)
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void Reset_Handler_2(void)
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{
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#if defined(__ARMCC_VERSION)
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__main();
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#elif defined(__ICCARM__)
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__iar_program_start();
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#elif defined(__GNUC__)
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uint32_t *src_ind = (uint32_t *) &__etext;
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uint32_t *dst_ind = (uint32_t *) &__data_start__;
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uint32_t *dst_end = (uint32_t *) &__data_end__;
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/* Move .data section from ROM to RAM */
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if (src_ind != dst_ind) {
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for (; dst_ind < dst_end;) {
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*dst_ind ++ = *src_ind ++;
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/* With 'initialize manually { section .text.nu.hyperram }' in .icf, do the
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* initialization for .text.nu.hyperram manually.
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*
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* NOTE: C runtime not initialized yet, don't invoke memcpy() for safe. */
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{
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/* BSP not defined yet, define it */
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#pragma section=".text.nu.hyperram"
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#pragma section=".text.nu.hyperram_init"
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uint32_t *src_ind = (uint32_t *) __section_begin(".text.nu.hyperram_init");
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uint32_t *src_end = (uint32_t *) __section_end(".text.nu.hyperram_init");
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uint32_t *dst_ind = (uint32_t *) __section_begin(".text.nu.hyperram");
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if (src_ind != dst_ind) {
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for (; src_ind < src_end;) {
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*dst_ind ++ = *src_ind ++;
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}
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}
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}
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/* Initialize .bss section to zero */
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dst_ind = (uint32_t *) &__bss_start__;
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dst_end = (uint32_t *) &__bss_end__;
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if (dst_ind != dst_end) {
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for (; dst_ind < dst_end;) {
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*dst_ind ++ = 0;
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__iar_program_start();
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#elif defined(__GNUC__)
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/* Move (multiple) .data section(s) from ROM to RAM */
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{
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/* Struct of copy table entry which must match linker script */
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typedef struct copy_table_entry_ {
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uint32_t src; // Address to copy from
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uint32_t dst; // Address to copy to
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uint32_t size; // Copy size in bytes
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} copy_table_entry;
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|
||||
copy_table_entry *copy_table_ind = (copy_table_entry *) &__copy_table_start__;
|
||||
copy_table_entry *copy_table_end = (copy_table_entry *) &__copy_table_end__;
|
||||
|
||||
for (; copy_table_ind != copy_table_end; copy_table_ind ++) {
|
||||
uint32_t *src_ind = (uint32_t *) copy_table_ind->src;
|
||||
uint32_t *src_end = (uint32_t *) (copy_table_ind->src + copy_table_ind->size);
|
||||
uint32_t *dst_ind = (uint32_t *) copy_table_ind->dst;
|
||||
if (src_ind != dst_ind) {
|
||||
for (; src_ind < src_end;) {
|
||||
*dst_ind ++ = *src_ind ++;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Initialize (multiple) .bss sections to zero */
|
||||
{
|
||||
/* Struct of zero table entry which must match linker script */
|
||||
typedef struct zero_table_entry_ {
|
||||
uint32_t start; // Address to start zero'ing
|
||||
uint32_t size; // Zero size in bytes
|
||||
} zero_table_entry;
|
||||
|
||||
zero_table_entry *zero_table_ind = (zero_table_entry *) &__zero_table_start__;
|
||||
zero_table_entry *zero_table_end = (zero_table_entry *) &__zero_table_end__;
|
||||
|
||||
for (; zero_table_ind != zero_table_end; zero_table_ind ++) {
|
||||
uint32_t *dst_ind = (uint32_t *) zero_table_ind->start;
|
||||
uint32_t *dst_end = (uint32_t *) (zero_table_ind->start + zero_table_ind->size);
|
||||
|
||||
for (; dst_ind < dst_end; ) {
|
||||
*dst_ind ++ = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -93,4 +93,98 @@ void SystemInit (void)
|
|||
/* Lock protected registers */
|
||||
SYS_LockReg();
|
||||
|
||||
#if defined(MBED_CONF_TARGET_HBI_ENABLE) && MBED_CONF_TARGET_HBI_ENABLE
|
||||
/* Initialize HBI for HyperRAM */
|
||||
void nu_hbi_init(void);
|
||||
nu_hbi_init();
|
||||
#else
|
||||
int32_t nu_hyperram_used(void);
|
||||
if (nu_hyperram_used()) {
|
||||
/* TODO: Report error: HyperRAM used but HBI not enabled */
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* Detect whether or not HyperRAM is used
|
||||
*
|
||||
* NOTE: For Arm Compiler, Image$$region_name doesn't include ZI. To avoid
|
||||
* confusion, use Image$$region_name$$RO/Image$$region_name$$RW/
|
||||
* Image$$region_name$$ZI instead.
|
||||
* NOTE: Compiler e.g. Arm Compiler can optimize assuming (®ion_name$$Limit != ®ion_name$$Base) being true.
|
||||
* Change to (®ion_name$$Limit - ®ion_name$$Base) instead.
|
||||
* NOTE: Compiler e.g. GCC can optimize assuming ®ion_name$$Length being non-zero.
|
||||
* Change to (®ion_name$$Limit - ®ion_name$$Base) instead.
|
||||
*/
|
||||
#if defined(__ARMCC_VERSION) || defined(__GNUC__)
|
||||
extern uint32_t Image$$NU_HYPERRAM$$RO$$Base;
|
||||
extern uint32_t Image$$NU_HYPERRAM$$RO$$Limit;
|
||||
extern uint32_t Image$$NU_HYPERRAM$$RW$$Base;
|
||||
extern uint32_t Image$$NU_HYPERRAM$$RW$$Limit;
|
||||
extern uint32_t Image$$NU_HYPERRAM$$ZI$$Base;
|
||||
extern uint32_t Image$$NU_HYPERRAM$$ZI$$Limit;
|
||||
#define NU_HYPERRAM_USED \
|
||||
((((uint32_t) &Image$$NU_HYPERRAM$$RO$$Limit) - ((uint32_t) &Image$$NU_HYPERRAM$$RO$$Base)) || \
|
||||
(((uint32_t) &Image$$NU_HYPERRAM$$RW$$Limit) - ((uint32_t) &Image$$NU_HYPERRAM$$RW$$Base)) || \
|
||||
(((uint32_t) &Image$$NU_HYPERRAM$$ZI$$Limit) - ((uint32_t) &Image$$NU_HYPERRAM$$ZI$$Base)))
|
||||
#elif defined(__ICCARM__)
|
||||
extern uint32_t NU_HYPERRAM$$Base;
|
||||
extern uint32_t NU_HYPERRAM$$Limit;
|
||||
#define NU_HYPERRAM_USED \
|
||||
(!!(((uint32_t) &NU_HYPERRAM$$Limit) - ((uint32_t) &NU_HYPERRAM$$Base)))
|
||||
#endif
|
||||
|
||||
int32_t nu_hyperram_used(void)
|
||||
{
|
||||
return NU_HYPERRAM_USED;
|
||||
}
|
||||
|
||||
#if defined(MBED_CONF_TARGET_HBI_ENABLE) && MBED_CONF_TARGET_HBI_ENABLE
|
||||
|
||||
/* Simple array size macro without type check */
|
||||
#define _NU_ARRAY_SIZE(arr) (sizeof(arr)/sizeof(arr[0]))
|
||||
|
||||
void nu_hbi_init(void)
|
||||
{
|
||||
/* Configurable HBI multi-function pin
|
||||
*
|
||||
* NOTE: C runtime not initialized yet, locate at ROM region.
|
||||
*/
|
||||
static const uint32_t hbi_mfp_reg_arr[] = {
|
||||
MBED_CONF_TARGET_HBI_MFP_REG_LIST
|
||||
};
|
||||
static const uint32_t hbi_mfp_reg_msk_arr[] = {
|
||||
MBED_CONF_TARGET_HBI_MFP_REG_MSK_LIST
|
||||
};
|
||||
static const uint32_t hbi_mfp_reg_val_arr[] = {
|
||||
MBED_CONF_TARGET_HBI_MFP_REG_VAL_LIST
|
||||
};
|
||||
|
||||
/* Make sure consistent HBI multi-function pin configurations */
|
||||
_Static_assert(_NU_ARRAY_SIZE(hbi_mfp_reg_arr) == _NU_ARRAY_SIZE(hbi_mfp_reg_msk_arr),
|
||||
"Inconsistent HBI MFP register and mask list length");
|
||||
_Static_assert(_NU_ARRAY_SIZE(hbi_mfp_reg_arr) == _NU_ARRAY_SIZE(hbi_mfp_reg_val_arr),
|
||||
"Inconsistent HBI MFP register and value list length");
|
||||
|
||||
/* Unlock protected registers */
|
||||
SYS_UnlockReg();
|
||||
|
||||
/* Initialize HBI module */
|
||||
SYS_ResetModule(HBI_RST);
|
||||
|
||||
/* Enable HBI module clock */
|
||||
CLK_EnableModuleClock(HBI_MODULE);
|
||||
|
||||
/* Set HBI multi-function pins */
|
||||
const uint32_t *reg_pos = hbi_mfp_reg_arr;
|
||||
const uint32_t *reg_end = hbi_mfp_reg_arr + _NU_ARRAY_SIZE(hbi_mfp_reg_arr);
|
||||
const uint32_t *msk_pos = hbi_mfp_reg_msk_arr;
|
||||
const uint32_t *val_pos = hbi_mfp_reg_val_arr;
|
||||
for (; reg_pos != reg_end; reg_pos ++, msk_pos ++, val_pos ++) {
|
||||
M32(*reg_pos) = (M32(*reg_pos) & ~*msk_pos) | *val_pos;
|
||||
}
|
||||
|
||||
/* Lock protected registers */
|
||||
SYS_LockReg();
|
||||
}
|
||||
|
||||
#endif /* #if defined(MBED_CONF_TARGET_HBI_ENABLE) && MBED_CONF_TARGET_HBI_ENABLE */
|
||||
|
|
|
|||
|
|
@ -7414,6 +7414,19 @@
|
|||
"gpio-irq-debounce-sample-rate": {
|
||||
"help": "Select GPIO IRQ debounce sample rate: GPIO_DBCTL_DBCLKSEL_1, GPIO_DBCTL_DBCLKSEL_2, GPIO_DBCTL_DBCLKSEL_4, ..., or GPIO_DBCTL_DBCLKSEL_32768",
|
||||
"value": "GPIO_DBCTL_DBCLKSEL_16"
|
||||
},
|
||||
"hbi-enable": {
|
||||
"help": "Enable HBI for HyperRAM",
|
||||
"options": [false, true]
|
||||
},
|
||||
"hbi-mfp-reg-list": {
|
||||
"help": "Comma separated multi-function pin register list to enable HBI for HyperRAM"
|
||||
},
|
||||
"hbi-mfp-reg-msk-list": {
|
||||
"help": "Comma separated multi-function pin register mask list to enable HBI for HyperRAM"
|
||||
},
|
||||
"hbi-mfp-reg-val-list": {
|
||||
"help": "Comma separated multi-function pin register value list to enable HBI for HyperRAM"
|
||||
}
|
||||
},
|
||||
"inherits": [
|
||||
|
|
@ -7501,7 +7514,11 @@
|
|||
"usb-uart": "UART_0",
|
||||
"usb-uart-tx": "PB_13",
|
||||
"usb-uart-rx": "PB_12",
|
||||
"network-default-interface-type": "WIFI"
|
||||
"network-default-interface-type": "WIFI",
|
||||
"hbi-enable": false,
|
||||
"hbi-mfp-reg-list": "0x40000534, 0x4000057C, 0x40000590, 0x40000594",
|
||||
"hbi-mfp-reg-msk-list": "0xFFFFFF00, 0xFFFFFFFF, 0xFFFF0000, 0xFFFFFFFF",
|
||||
"hbi-mfp-reg-val-list": "0x10101000, 0x10101010, 0x10100000, 0x10101010"
|
||||
}
|
||||
},
|
||||
"MCU_M480": {
|
||||
|
|
|
|||
Loading…
Reference in New Issue