mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #15343 from daniel-starke/complete-nucleo-h723zg
Add proper support for NUCLEO-H723ZG.pull/15352/head
commit
7ab5260e4e
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@ -9,6 +9,8 @@ elseif("NUCLEO_H743ZI" IN_LIST MBED_TARGET_LABELS)
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add_subdirectory(TARGET_NUCLEO_H743ZI)
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elseif("NUCLEO_H743ZI2" IN_LIST MBED_TARGET_LABELS)
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add_subdirectory(TARGET_NUCLEO_H743ZI2)
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elseif("NUCLEO_H723ZG" IN_LIST MBED_TARGET_LABELS)
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add_subdirectory(TARGET_NUCLEO_H723ZG)
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endif()
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target_include_directories(mbed-emac
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@ -0,0 +1,7 @@
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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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target_sources(mbed-emac
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INTERFACE
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stm32h7_eth_init.c
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)
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@ -0,0 +1,163 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2018, STMicroelectronics
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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* 3. Neither the name of STMicroelectronics nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
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#include "stm32h7xx_hal.h"
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#include "platform/mbed_critical.h"
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#define MCO_Pin GPIO_PIN_0
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#define MCO_GPIO_Port GPIOH
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#define RMII_MDC_Pin GPIO_PIN_1
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#define RMII_MDC_GPIO_Port GPIOC
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#define RMII_REF_CLK_Pin GPIO_PIN_1
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#define RMII_REF_CLK_GPIO_Port GPIOA
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#define RMII_MDIO_Pin GPIO_PIN_2
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#define RMII_MDIO_GPIO_Port GPIOA
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#define RMII_CRS_DV_Pin GPIO_PIN_7
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#define RMII_CRS_DV_GPIO_Port GPIOA
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#define RMII_RXD0_Pin GPIO_PIN_4
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#define RMII_RXD0_GPIO_Port GPIOC
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#define RMII_RXD1_Pin GPIO_PIN_5
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#define RMII_RXD1_GPIO_Port GPIOC
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#define RMII_TXD1_Pin GPIO_PIN_13
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#define RMII_TXD1_GPIO_Port GPIOB
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#define TMS_Pin GPIO_PIN_13
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#define TMS_GPIO_Port GPIOA
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#define TCK_Pin GPIO_PIN_14
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#define TCK_GPIO_Port GPIOA
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#define RMII_TX_EN_Pin GPIO_PIN_11
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#define RMII_TX_EN_GPIO_Port GPIOG
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#define RMII_TXD0_Pin GPIO_PIN_13
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#define RMII_TXD0_GPIO_Port GPIOG
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/**
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* Override HAL Eth Init function
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*/
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void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
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{
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GPIO_InitTypeDef GPIO_InitStruct;
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if (heth->Instance == ETH) {
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/* Disable DCache for STM32H7 family */
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core_util_critical_section_enter();
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SCB_DisableDCache();
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core_util_critical_section_exit();
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/* GPIO Ports Clock Enable */
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__HAL_RCC_GPIOH_CLK_ENABLE();
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__HAL_RCC_GPIOC_CLK_ENABLE();
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__HAL_RCC_GPIOA_CLK_ENABLE();
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__HAL_RCC_GPIOB_CLK_ENABLE();
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__HAL_RCC_GPIOG_CLK_ENABLE();
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/* Enable Peripheral clock */
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__HAL_RCC_ETH1MAC_CLK_ENABLE();
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__HAL_RCC_ETH1TX_CLK_ENABLE();
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__HAL_RCC_ETH1RX_CLK_ENABLE();
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/**ETH GPIO Configuration
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PC1 ------> ETH_MDC
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PA1 ------> ETH_REF_CLK
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PA2 ------> ETH_MDIO
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PA7 ------> ETH_CRS_DV
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PC4 ------> ETH_RXD0
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PC5 ------> ETH_RXD1
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PB13 ------> ETH_TXD1
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PG11 ------> ETH_TX_EN
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PG13 ------> ETH_TXD0
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*/
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GPIO_InitStruct.Pin = RMII_MDC_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(RMII_MDC_GPIO_Port, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RMII_REF_CLK_Pin | RMII_MDIO_Pin | RMII_CRS_DV_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RMII_RXD0_Pin | RMII_RXD1_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RMII_TXD1_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(RMII_TXD1_GPIO_Port, &GPIO_InitStruct);
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GPIO_InitStruct.Pin = RMII_TX_EN_Pin | RMII_TXD0_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
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HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
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}
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}
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/**
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* Override HAL Eth DeInit function
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*/
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void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
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{
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if (heth->Instance == ETH) {
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/* Disable Peripheral clock */
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__HAL_RCC_ETH1MAC_CLK_DISABLE();
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__HAL_RCC_ETH1TX_CLK_DISABLE();
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__HAL_RCC_ETH1RX_CLK_DISABLE();
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/**ETH GPIO Configuration
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PC1 ------> ETH_MDC
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PA1 ------> ETH_REF_CLK
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PA2 ------> ETH_MDIO
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PA7 ------> ETH_CRS_DV
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PC4 ------> ETH_RXD0
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PC5 ------> ETH_RXD1
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PB13 ------> ETH_TXD1
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PG11 ------> ETH_TX_EN
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PG13 ------> ETH_TXD0
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*/
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HAL_GPIO_DeInit(GPIOC, RMII_MDC_Pin | RMII_RXD0_Pin | RMII_RXD1_Pin);
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HAL_GPIO_DeInit(GPIOA, RMII_REF_CLK_Pin | RMII_MDIO_Pin | RMII_CRS_DV_Pin);
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HAL_GPIO_DeInit(RMII_TXD1_GPIO_Port, RMII_TXD1_Pin);
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HAL_GPIO_DeInit(GPIOG, RMII_TX_EN_Pin | RMII_TXD0_Pin);
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}
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}
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#endif /* USE_USER_DEFINED_HAL_ETH_MSPINIT */
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@ -1,6 +1,8 @@
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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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add_subdirectory(TARGET_NUCLEO_H723ZG EXCLUDE_FROM_ALL)
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if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
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set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h723xx.S)
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set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32h723xg.ld)
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@ -0,0 +1,17 @@
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# Copyright (c) 2020 ARM Limited. All rights reserved.
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# SPDX-License-Identifier: Apache-2.0
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add_library(mbed-nucleo-h723zg INTERFACE)
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target_sources(mbed-nucleo-h723zg
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INTERFACE
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PeripheralPins.c
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system_clock.c
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)
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target_include_directories(mbed-nucleo-h723zg
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INTERFACE
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.
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)
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target_link_libraries(mbed-nucleo-h723zg INTERFACE mbed-stm32h723xg)
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@ -0,0 +1,643 @@
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/* mbed Microcontroller Library
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* SPDX-License-Identifier: BSD-3-Clause
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******************************************************************************
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*
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* Copyright (c) 2016-2022 STMicroelectronics.
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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******************************************************************************
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*
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* Automatically generated from STM32CubeMX/db/mcu/STM32H723ZGTx.xml
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*/
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#include "PeripheralPins.h"
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#include "mbed_toolchain.h"
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//==============================================================================
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// Notes
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//
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// - The pins mentioned Px_y_ALTz are alternative possibilities which use other
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// HW peripheral instances. You can use them the same way as any other "normal"
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// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board
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// pinout image on mbed.org.
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//
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// - The pins which are connected to other components present on the board have
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// the comment "Connected to xxx". The pin function may not work properly in this
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// case. These pins may not be displayed on the board pinout image on mbed.org.
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// Please read the board reference manual and schematic for more information.
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//
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// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented
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// See https://os.mbed.com/teams/ST/wiki/STDIO for more information.
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//
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//==============================================================================
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//*** ADC ***
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MBED_WEAK const PinMap PinMap_ADC[] = {
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{PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, // ADC1_INP16
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{PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, // ADC1_INP17 // Connected to RMII_REF_CLK
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{PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_INP14 // Connected to RMII_MDIO
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{PA_2_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC2_INP14 // Connected to RMII_MDIO
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{PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_INP15
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{PA_3_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC2_INP15
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{PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC1_INP18
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{PA_4_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, // ADC2_INP18
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{PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC1_INP19
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{PA_5_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 19, 0)}, // ADC2_INP19
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{PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_INP3
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{PA_6_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INP3
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{PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7 // Connected to RMII_CRS_DV
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{PA_7_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7 // Connected to RMII_CRS_DV
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{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9 // Connected to LED_GREEN
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{PB_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9 // Connected to LED_GREEN
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{PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5
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{PB_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5
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{PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10
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{PC_0_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC2_INP10
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{PC_0_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC3_INP10
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{PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_INP11 // Connected to RMII_MDC
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{PC_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC2_INP11 // Connected to RMII_MDC
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{PC_1_ALT1, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC3_INP11 // Connected to RMII_MDC
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{PC_2C, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC3_INP0
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{PC_3C, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC3_INP1
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{PC_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_INP4 // Connected to RMII_RXD0
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{PC_4_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC2_INP4 // Connected to RMII_RXD0
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{PC_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_INP8 // Connected to RMII_RXD1
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{PC_5_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC2_INP8 // Connected to RMII_RXD1
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{PF_3, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC3_INP5
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{PF_4, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC3_INP9
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{PF_5, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC3_INP4
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{PF_6, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC3_INP8
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{PF_7, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC3_INP3
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{PF_8, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC3_INP7
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{PF_9, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC3_INP2
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{PF_10, ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC3_INP6
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{PF_11, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_INP2
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{PF_12, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_INP6
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{PF_13, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC2_INP2
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{PF_14, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC2_INP6
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{NC, NC, 0}
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};
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MBED_WEAK const PinMap PinMap_ADC_Internal[] = {
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{ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)},
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{ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)},
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{ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)},
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{NC, NC, 0}
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};
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//*** DAC ***
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MBED_WEAK const PinMap PinMap_DAC[] = {
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{PA_4, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // DAC1_OUT1
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{PA_5, DAC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // DAC1_OUT2
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{NC, NC, 0}
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};
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//*** I2C ***
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MBED_WEAK const PinMap PinMap_I2C_SDA[] = {
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{PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
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{PB_7_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
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{PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
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{PB_9_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
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{PB_11, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
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{PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
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{PC_9_ALT0, I2C_5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PC_10, I2C_5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)},
|
||||
{PD_13, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{PF_0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PF_0_ALT0, I2C_5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PF_15, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_I2C_SCL[] = {
|
||||
{PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)},
|
||||
{PA_8_ALT0, I2C_5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_6_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)},
|
||||
{PB_8_ALT0, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C4)},
|
||||
{PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PC_11, I2C_5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C5)},
|
||||
{PD_12, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{PF_1, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)},
|
||||
{PF_1_ALT0, I2C_5, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF6_I2C5)},
|
||||
{PF_14, I2C_4, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C4)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** PWM ***
|
||||
|
||||
// TIM5 cannot be used because already used by the us_ticker
|
||||
// (update us_ticker_data.h file if another timer is chosen)
|
||||
MBED_WEAK const PinMap PinMap_PWM[] = {
|
||||
{PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
// {PA_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1
|
||||
{PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to RMII_REF_CLK
|
||||
// {PA_1, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 // Connected to RMII_REF_CLK
|
||||
{PA_1_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N // Connected to RMII_REF_CLK
|
||||
{PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to RMII_MDIO
|
||||
// {PA_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 // Connected to RMII_MDIO
|
||||
{PA_2_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1 // Connected to RMII_MDIO
|
||||
{PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
// {PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4
|
||||
{PA_3_ALT0, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PA_5_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N
|
||||
{PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PA_6_ALT0, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
{PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N // Connected to RMII_CRS_DV
|
||||
{PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 // Connected to RMII_CRS_DV
|
||||
{PA_7_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 1, 1)}, // TIM8_CH1N // Connected to RMII_CRS_DV
|
||||
{PA_7_ALT2, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1 // Connected to RMII_CRS_DV
|
||||
{PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 // Connected to USB_FS_VBUS
|
||||
{PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 // Connected to USB_FS_ID
|
||||
{PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 // Connected to USB_FS_DM
|
||||
{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
|
||||
{PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N // Connected to LED_GREEN
|
||||
{PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 // Connected to LED_GREEN
|
||||
{PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N // Connected to LED_GREEN
|
||||
{PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to SWO
|
||||
{PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PB_6_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
|
||||
{PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PB_7_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
|
||||
{PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PB_8_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PB_9_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3
|
||||
{PB_11, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4
|
||||
{PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N // Connected to RMII_TXD1
|
||||
{PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N // Connected to LED_RED
|
||||
{PB_14_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N // Connected to LED_RED
|
||||
{PB_14_ALT1, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM12, 1, 0)}, // TIM12_CH1 // Connected to LED_RED
|
||||
{PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PB_15_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
|
||||
{PB_15_ALT1, PWM_12, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM12, 2, 0)}, // TIM12_CH2
|
||||
{PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1
|
||||
{PC_6_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 1, 0)}, // TIM8_CH1
|
||||
{PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2
|
||||
{PC_7_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 2, 0)}, // TIM8_CH2
|
||||
{PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
|
||||
{PC_8_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 3, 0)}, // TIM8_CH3
|
||||
{PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
|
||||
{PC_9_ALT0, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF3_TIM8, 4, 0)}, // TIM8_CH4
|
||||
{PC_12, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PD_12, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1
|
||||
{PD_13, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2
|
||||
{PD_14, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3
|
||||
{PD_15, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4
|
||||
{PE_4, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM15, 1, 1)}, // TIM15_CH1N
|
||||
{PE_5, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM15, 1, 0)}, // TIM15_CH1
|
||||
{PE_6, PWM_15, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF4_TIM15, 2, 0)}, // TIM15_CH2
|
||||
{PE_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N
|
||||
{PE_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1
|
||||
{PE_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
|
||||
{PE_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2
|
||||
{PE_12, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
|
||||
{PE_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3
|
||||
{PE_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4
|
||||
{PF_0, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PF_1, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2
|
||||
{PF_2, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{PF_3, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 4, 0)}, // TIM23_CH4
|
||||
{PF_6, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM16, 1, 0)}, // TIM16_CH1
|
||||
{PF_6_ALT0, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PF_7, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM17, 1, 0)}, // TIM17_CH1
|
||||
{PF_7_ALT0, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2
|
||||
{PF_8, PWM_13, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_TIM13, 1, 0)}, // TIM13_CH1
|
||||
{PF_8_ALT0, PWM_16, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM16, 1, 1)}, // TIM16_CH1N
|
||||
{PF_8_ALT1, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{PF_9, PWM_14, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_TIM14, 1, 0)}, // TIM14_CH1
|
||||
{PF_9_ALT0, PWM_17, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF1_TIM17, 1, 1)}, // TIM17_CH1N
|
||||
{PF_9_ALT1, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 4, 0)}, // TIM23_CH4
|
||||
{PF_11, PWM_24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF14_TIM24, 1, 0)}, // TIM24_CH1
|
||||
{PF_12, PWM_24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF14_TIM24, 2, 0)}, // TIM24_CH2
|
||||
{PF_13, PWM_24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF14_TIM24, 3, 0)}, // TIM24_CH3
|
||||
{PF_14, PWM_24, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF14_TIM24, 4, 0)}, // TIM24_CH4
|
||||
{PG_12, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 1, 0)}, // TIM23_CH1
|
||||
{PG_13, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 2, 0)}, // TIM23_CH2 // Connected to RMII_TXD0
|
||||
{PG_14, PWM_23, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF13_TIM23, 3, 0)}, // TIM23_CH3
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** SERIAL ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_UART_TX[] = {
|
||||
{PA_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to RMII_MDIO
|
||||
{PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_FS_VBUS
|
||||
{PA_9_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, // Connected to USB_FS_VBUS
|
||||
{PA_12, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, // Connected to USB_FS_DP
|
||||
{PA_15, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_4, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_6_ALT0, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_6_ALT1, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
|
||||
{PB_9, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_13, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)}, // Connected to RMII_TXD1
|
||||
{PB_14, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)}, // Connected to LED_RED
|
||||
{PC_6, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PC_10, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_10_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_5, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_8, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_RX
|
||||
{PD_15, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PE_1, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)}, // Connected to LED_YELLOW
|
||||
{PE_3, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_USART10)},
|
||||
{PE_8, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_1, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PG_12, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PG_14, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_UART_RX[] = {
|
||||
{PA_1, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // Connected to RMII_REF_CLK
|
||||
{PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_8, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)},
|
||||
{PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_FS_ID
|
||||
{PA_10_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, // Connected to USB_FS_ID
|
||||
{PA_11, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_UART4)}, // Connected to USB_FS_DM
|
||||
{PB_3, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART7)}, // Connected to SWO
|
||||
{PB_5, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)},
|
||||
{PB_7_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_LPUART)},
|
||||
{PB_8, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PB_12, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF14_UART5)},
|
||||
{PB_15, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART1)},
|
||||
{PC_7, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PC_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PC_11_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PD_2, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_6, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_9, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to STDIO_UART_TX
|
||||
{PD_14, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PE_0, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_2, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{PE_7, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_6, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_0, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PG_9, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_11, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)}, // Connected to RMII_TX_EN
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_UART_RTS[] = {
|
||||
{PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to RMII_REF_CLK
|
||||
{PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_FS_DP
|
||||
{PA_12_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, // Connected to USB_FS_DP
|
||||
{PA_15, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PB_14, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to LED_RED
|
||||
{PB_14_ALT0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // Connected to LED_RED
|
||||
{PC_8, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_4, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_12, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_13, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PD_15, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_9, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_8, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_8, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{PG_14, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_UART_CTS[] = {
|
||||
{PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to USB_FS_DM
|
||||
{PA_11_ALT0, LPUART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_LPUART)}, // Connected to USB_FS_DM
|
||||
{PB_0, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)}, // Connected to LED_GREEN
|
||||
{PB_13, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)}, // Connected to RMII_TXD1
|
||||
{PB_15, UART_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART4)},
|
||||
{PC_9, UART_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART5)},
|
||||
{PD_0, UART_9, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_UART9)},
|
||||
{PD_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)},
|
||||
{PD_11, UART_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART3)},
|
||||
{PD_14, UART_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_UART8)},
|
||||
{PE_10, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PF_9, UART_7, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_UART7)},
|
||||
{PG_13, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)}, // Connected to RMII_TXD0
|
||||
{PG_13_ALT0, UART_10, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_USART10)}, // Connected to RMII_TXD0
|
||||
{PG_15, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART6)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** SPI ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_SPI_MOSI[] = {
|
||||
{PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to RMII_CRS_DV
|
||||
{PA_7_ALT0, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SPI6)}, // Connected to RMII_CRS_DV
|
||||
{PB_2, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SPI3)},
|
||||
{PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SPI3)},
|
||||
{PB_5_ALT1, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SPI6)},
|
||||
{PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PC_1, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to RMII_MDC
|
||||
{PC_3C, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PD_6, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI3)},
|
||||
{PD_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PE_6, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||
{PE_14, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||
{PF_9, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)},
|
||||
{PF_11, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)},
|
||||
{PG_14, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_SPI_MISO[] = {
|
||||
{PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_6_ALT0, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SPI6)},
|
||||
{PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PB_4_ALT1, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SPI6)},
|
||||
{PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to LED_RED
|
||||
{PC_2C, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PE_5, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||
{PE_13, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||
{PF_8, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)},
|
||||
{PG_9, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PG_12, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_SPI_SCLK[] = {
|
||||
{PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_5_ALT0, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SPI6)},
|
||||
{PA_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to USB_FS_VBUS
|
||||
{PA_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to USB_FS_DP
|
||||
{PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to SWO
|
||||
{PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to SWO
|
||||
{PB_3_ALT1, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SPI6)}, // Connected to SWO
|
||||
{PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to RMII_TXD1
|
||||
{PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PC_12, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)},
|
||||
{PD_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PE_2, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||
{PE_12, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||
{PF_7, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)},
|
||||
{PG_11, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to RMII_TX_EN
|
||||
{PG_13, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)}, // Connected to RMII_TXD0
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_SPI_SSEL[] = {
|
||||
{PA_0, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)},
|
||||
{PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PA_4_ALT1, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF8_SPI6)},
|
||||
{PA_11, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, // Connected to USB_FS_DM
|
||||
{PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)},
|
||||
{PA_15_ALT1, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SPI6)},
|
||||
{PB_4, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SPI2)},
|
||||
{PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)},
|
||||
{PE_4, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||
{PE_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)},
|
||||
{PF_6, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI5)},
|
||||
{PG_8, SPI_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI6)},
|
||||
{PG_10, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** CAN ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_CAN_RD[] = {
|
||||
{PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, // Connected to USB_FS_DM
|
||||
{PB_5, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_12, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PD_0, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PD_12, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_FDCAN3)},
|
||||
{PF_6, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{PG_10, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_CAN_TD[] = {
|
||||
{PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)}, // Connected to USB_FS_DP
|
||||
{PB_6, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)},
|
||||
{PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PB_13, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN2)}, // Connected to RMII_TXD1
|
||||
{PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_FDCAN1)},
|
||||
{PD_13, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_FDCAN3)},
|
||||
{PF_7, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{PG_9, CAN_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF2_FDCAN3)},
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** QUADSPI ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_DATA0[] = {
|
||||
{PA_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0 // Connected to RMII_MDIO
|
||||
{PB_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PB_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_3C, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PD_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PF_0, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO0
|
||||
{PF_8, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_DATA1[] = {
|
||||
{PB_0, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1 // Connected to LED_GREEN
|
||||
{PC_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PD_12, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PF_1, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO1
|
||||
{PF_9, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_DATA2[] = {
|
||||
{PA_3, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PA_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 // Connected to RMII_CRS_DV
|
||||
{PB_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 // Connected to RMII_TXD1
|
||||
{PC_2C, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PE_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PF_2, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO2
|
||||
{PF_7, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_DATA3[] = {
|
||||
{PA_1, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3 // Connected to RMII_REF_CLK
|
||||
{PA_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PD_13, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PF_3, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO3
|
||||
{PF_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_SCLK[] = {
|
||||
{PA_3, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PB_2, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PF_4, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_CLK
|
||||
{PF_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_QSPI_SSEL[] = {
|
||||
{PB_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PB_10, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PC_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PE_11, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PG_6, QSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PG_12, QSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** OCTOSPI ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DATA0[] = {
|
||||
{PA_2, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0 // Connected to RMII_MDIO
|
||||
{PB_1, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PB_12, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_3C, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PC_9, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PD_11, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{PF_0, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO0
|
||||
{PF_8, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO0
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DATA1[] = {
|
||||
{PB_0, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1 // Connected to LED_GREEN
|
||||
{PC_10, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PD_12, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{PF_1, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO1
|
||||
{PF_9, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO1
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DATA2[] = {
|
||||
{PA_3, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PA_7, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 // Connected to RMII_CRS_DV
|
||||
{PB_13, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2 // Connected to RMII_TXD1
|
||||
{PC_2C, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PE_2, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{PF_2, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO2
|
||||
{PF_7, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO2
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DATA3[] = {
|
||||
{PA_1, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3 // Connected to RMII_REF_CLK
|
||||
{PA_6, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF6_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PD_13, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{PF_3, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO3
|
||||
{PF_6, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO3
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DATA4[] = {
|
||||
{PC_1, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4 // Connected to RMII_MDC
|
||||
{PD_4, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PE_7, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO4
|
||||
{PG_0, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO4
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DATA5[] = {
|
||||
{PC_2C, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PD_5, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PE_8, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO5
|
||||
{PG_1, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO5
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DATA6[] = {
|
||||
{PC_3C, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF4_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PD_6, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PE_9, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PG_9, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO6
|
||||
{PG_10, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO6
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DATA7[] = {
|
||||
{PD_7, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{PE_10, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{PG_11, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_IO7 // Connected to RMII_TX_EN
|
||||
{PG_14, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_IO7
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_DQS[] = {
|
||||
{PA_1, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_DQS // Connected to RMII_REF_CLK
|
||||
{PB_2, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_DQS
|
||||
{PC_5, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_DQS // Connected to RMII_RXD1
|
||||
{PF_12, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_DQS
|
||||
{PG_7, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_DQS // Connected to USB_FS_OVCR
|
||||
{PG_15, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_DQS
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_SCLK[] = {
|
||||
{PA_3, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF12_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PB_2, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{PF_4, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P2)}, // OCTOSPIM_P2_CLK
|
||||
{PF_10, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_CLK
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
MBED_WEAK const PinMap PinMap_OSPI_SSEL[] = {
|
||||
{PB_6, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PB_10, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PC_11, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF9_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PE_11, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF11_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PG_6, OSPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OCTOSPIM_P1)}, // OCTOSPIM_P1_NCS
|
||||
{PG_12, OSPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_OCTOSPIM_P2)}, // OCTOSPIM_P2_NCS
|
||||
{NC, NC, 0}
|
||||
};
|
||||
|
||||
//*** USBDEVICE ***
|
||||
|
||||
MBED_WEAK const PinMap PinMap_USB_HS[] = {
|
||||
#if (MBED_CONF_TARGET_USB_SPEED == USE_USB_HS_IN_FS)
|
||||
// {PA_8, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_SOF
|
||||
{PA_9, USB_HS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF_NONE)}, // USB_OTG_HS_VBUS // Connected to USB_FS_VBUS
|
||||
{PA_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ID // Connected to USB_FS_ID
|
||||
{PA_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DM // Connected to USB_FS_DM
|
||||
{PA_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF_NONE)}, // USB_OTG_HS_DP // Connected to USB_FS_DP
|
||||
#else /* MBED_CONF_TARGET_USB_SPEED */
|
||||
{PA_3, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D0
|
||||
{PA_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_CK
|
||||
{PB_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D1 // Connected to LED_GREEN
|
||||
{PB_1, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D2
|
||||
{PB_5, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D7
|
||||
{PB_10, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D3
|
||||
{PB_11, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D4
|
||||
{PB_12, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D5
|
||||
{PB_13, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_D6 // Connected to RMII_TXD1
|
||||
{PC_0, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_STP
|
||||
{PC_2C, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_DIR
|
||||
{PC_3C, USB_HS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG1_HS)}, // USB_OTG_HS_ULPI_NXT
|
||||
#endif /* MBED_CONF_TARGET_USB_SPEED */
|
||||
{NC, NC, 0}
|
||||
};
|
|
@ -0,0 +1,423 @@
|
|||
/* mbed Microcontroller Library
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2016-2022 STMicroelectronics.
|
||||
* All rights reserved.
|
||||
*
|
||||
* This software component is licensed by ST under BSD 3-Clause license,
|
||||
* the "License"; You may not use this file except in compliance with the
|
||||
* License. You may obtain a copy of the License at:
|
||||
* opensource.org/licenses/BSD-3-Clause
|
||||
*
|
||||
******************************************************************************
|
||||
*
|
||||
* Automatically generated from STM32CubeMX/db/mcu/STM32H723ZGTx.xml
|
||||
*/
|
||||
|
||||
/* MBED TARGET LIST: NUCLEO_H723ZGT */
|
||||
|
||||
#ifndef MBED_PINNAMES_H
|
||||
#define MBED_PINNAMES_H
|
||||
|
||||
#include "cmsis.h"
|
||||
#include "PinNamesTypes.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
#define DUAL_PAD 0xF00
|
||||
|
||||
typedef enum {
|
||||
ALT0 = 0x100,
|
||||
ALT1 = 0x200,
|
||||
ALT2 = 0x300,
|
||||
} ALTx;
|
||||
|
||||
typedef enum {
|
||||
PA_0 = 0x00,
|
||||
PA_1 = 0x01,
|
||||
PA_1_ALT0 = PA_1 | ALT0, // same pin used for alternate HW
|
||||
PA_2 = 0x02,
|
||||
PA_2_ALT0 = PA_2 | ALT0, // same pin used for alternate HW
|
||||
PA_3 = 0x03,
|
||||
PA_3_ALT0 = PA_3 | ALT0, // same pin used for alternate HW
|
||||
PA_4 = 0x04,
|
||||
PA_4_ALT0 = PA_4 | ALT0, // same pin used for alternate HW
|
||||
PA_4_ALT1 = PA_4 | ALT1, // same pin used for alternate HW
|
||||
PA_5 = 0x05,
|
||||
PA_5_ALT0 = PA_5 | ALT0, // same pin used for alternate HW
|
||||
PA_6 = 0x06,
|
||||
PA_6_ALT0 = PA_6 | ALT0, // same pin used for alternate HW
|
||||
PA_7 = 0x07,
|
||||
PA_7_ALT0 = PA_7 | ALT0, // same pin used for alternate HW
|
||||
PA_7_ALT1 = PA_7 | ALT1, // same pin used for alternate HW
|
||||
PA_7_ALT2 = PA_7 | ALT2, // same pin used for alternate HW
|
||||
PA_8 = 0x08,
|
||||
PA_8_ALT0 = PA_8 | ALT0, // same pin used for alternate HW
|
||||
PA_9 = 0x09,
|
||||
PA_9_ALT0 = PA_9 | ALT0, // same pin used for alternate HW
|
||||
PA_10 = 0x0A,
|
||||
PA_10_ALT0 = PA_10 | ALT0, // same pin used for alternate HW
|
||||
PA_11 = 0x0B,
|
||||
PA_11_ALT0 = PA_11 | ALT0, // same pin used for alternate HW
|
||||
PA_12 = 0x0C,
|
||||
PA_12_ALT0 = PA_12 | ALT0, // same pin used for alternate HW
|
||||
PA_13 = 0x0D,
|
||||
PA_14 = 0x0E,
|
||||
PA_15 = 0x0F,
|
||||
PA_15_ALT0 = PA_15 | ALT0, // same pin used for alternate HW
|
||||
PA_15_ALT1 = PA_15 | ALT1, // same pin used for alternate HW
|
||||
PB_0 = 0x10,
|
||||
PB_0_ALT0 = PB_0 | ALT0, // same pin used for alternate HW
|
||||
PB_0_ALT1 = PB_0 | ALT1, // same pin used for alternate HW
|
||||
PB_1 = 0x11,
|
||||
PB_1_ALT0 = PB_1 | ALT0, // same pin used for alternate HW
|
||||
PB_1_ALT1 = PB_1 | ALT1, // same pin used for alternate HW
|
||||
PB_2 = 0x12,
|
||||
PB_3 = 0x13,
|
||||
PB_3_ALT0 = PB_3 | ALT0, // same pin used for alternate HW
|
||||
PB_3_ALT1 = PB_3 | ALT1, // same pin used for alternate HW
|
||||
PB_4 = 0x14,
|
||||
PB_4_ALT0 = PB_4 | ALT0, // same pin used for alternate HW
|
||||
PB_4_ALT1 = PB_4 | ALT1, // same pin used for alternate HW
|
||||
PB_5 = 0x15,
|
||||
PB_5_ALT0 = PB_5 | ALT0, // same pin used for alternate HW
|
||||
PB_5_ALT1 = PB_5 | ALT1, // same pin used for alternate HW
|
||||
PB_6 = 0x16,
|
||||
PB_6_ALT0 = PB_6 | ALT0, // same pin used for alternate HW
|
||||
PB_6_ALT1 = PB_6 | ALT1, // same pin used for alternate HW
|
||||
PB_7 = 0x17,
|
||||
PB_7_ALT0 = PB_7 | ALT0, // same pin used for alternate HW
|
||||
PB_8 = 0x18,
|
||||
PB_8_ALT0 = PB_8 | ALT0, // same pin used for alternate HW
|
||||
PB_9 = 0x19,
|
||||
PB_9_ALT0 = PB_9 | ALT0, // same pin used for alternate HW
|
||||
PB_10 = 0x1A,
|
||||
PB_11 = 0x1B,
|
||||
PB_12 = 0x1C,
|
||||
PB_13 = 0x1D,
|
||||
PB_14 = 0x1E,
|
||||
PB_14_ALT0 = PB_14 | ALT0, // same pin used for alternate HW
|
||||
PB_14_ALT1 = PB_14 | ALT1, // same pin used for alternate HW
|
||||
PB_15 = 0x1F,
|
||||
PB_15_ALT0 = PB_15 | ALT0, // same pin used for alternate HW
|
||||
PB_15_ALT1 = PB_15 | ALT1, // same pin used for alternate HW
|
||||
PC_0 = 0x20,
|
||||
PC_0_ALT0 = PC_0 | ALT0, // same pin used for alternate HW
|
||||
PC_0_ALT1 = PC_0 | ALT1, // same pin used for alternate HW
|
||||
PC_1 = 0x21,
|
||||
PC_1_ALT0 = PC_1 | ALT0, // same pin used for alternate HW
|
||||
PC_1_ALT1 = PC_1 | ALT1, // same pin used for alternate HW
|
||||
PC_2 = 0x22,
|
||||
PC_2C = PC_2 | DUAL_PAD, // dual pad
|
||||
PC_3 = 0x23,
|
||||
PC_3C = PC_3 | DUAL_PAD, // dual pad
|
||||
PC_4 = 0x24,
|
||||
PC_4_ALT0 = PC_4 | ALT0, // same pin used for alternate HW
|
||||
PC_5 = 0x25,
|
||||
PC_5_ALT0 = PC_5 | ALT0, // same pin used for alternate HW
|
||||
PC_6 = 0x26,
|
||||
PC_6_ALT0 = PC_6 | ALT0, // same pin used for alternate HW
|
||||
PC_7 = 0x27,
|
||||
PC_7_ALT0 = PC_7 | ALT0, // same pin used for alternate HW
|
||||
PC_8 = 0x28,
|
||||
PC_8_ALT0 = PC_8 | ALT0, // same pin used for alternate HW
|
||||
PC_9 = 0x29,
|
||||
PC_9_ALT0 = PC_9 | ALT0, // same pin used for alternate HW
|
||||
PC_10 = 0x2A,
|
||||
PC_10_ALT0 = PC_10 | ALT0, // same pin used for alternate HW
|
||||
PC_11 = 0x2B,
|
||||
PC_11_ALT0 = PC_11 | ALT0, // same pin used for alternate HW
|
||||
PC_12 = 0x2C,
|
||||
PC_13 = 0x2D,
|
||||
PC_14 = 0x2E,
|
||||
PC_15 = 0x2F,
|
||||
PD_0 = 0x30,
|
||||
PD_1 = 0x31,
|
||||
PD_2 = 0x32,
|
||||
PD_3 = 0x33,
|
||||
PD_4 = 0x34,
|
||||
PD_5 = 0x35,
|
||||
PD_6 = 0x36,
|
||||
PD_7 = 0x37,
|
||||
PD_8 = 0x38,
|
||||
PD_9 = 0x39,
|
||||
PD_10 = 0x3A,
|
||||
PD_11 = 0x3B,
|
||||
PD_12 = 0x3C,
|
||||
PD_13 = 0x3D,
|
||||
PD_14 = 0x3E,
|
||||
PD_15 = 0x3F,
|
||||
PE_0 = 0x40,
|
||||
PE_1 = 0x41,
|
||||
PE_2 = 0x42,
|
||||
PE_3 = 0x43,
|
||||
PE_4 = 0x44,
|
||||
PE_5 = 0x45,
|
||||
PE_6 = 0x46,
|
||||
PE_7 = 0x47,
|
||||
PE_8 = 0x48,
|
||||
PE_9 = 0x49,
|
||||
PE_10 = 0x4A,
|
||||
PE_11 = 0x4B,
|
||||
PE_12 = 0x4C,
|
||||
PE_13 = 0x4D,
|
||||
PE_14 = 0x4E,
|
||||
PE_15 = 0x4F,
|
||||
PF_0 = 0x50,
|
||||
PF_0_ALT0 = PF_0 | ALT0, // same pin used for alternate HW
|
||||
PF_1 = 0x51,
|
||||
PF_1_ALT0 = PF_1 | ALT0, // same pin used for alternate HW
|
||||
PF_2 = 0x52,
|
||||
PF_3 = 0x53,
|
||||
PF_4 = 0x54,
|
||||
PF_5 = 0x55,
|
||||
PF_6 = 0x56,
|
||||
PF_6_ALT0 = PF_6 | ALT0, // same pin used for alternate HW
|
||||
PF_7 = 0x57,
|
||||
PF_7_ALT0 = PF_7 | ALT0, // same pin used for alternate HW
|
||||
PF_8 = 0x58,
|
||||
PF_8_ALT0 = PF_8 | ALT0, // same pin used for alternate HW
|
||||
PF_8_ALT1 = PF_8 | ALT1, // same pin used for alternate HW
|
||||
PF_9 = 0x59,
|
||||
PF_9_ALT0 = PF_9 | ALT0, // same pin used for alternate HW
|
||||
PF_9_ALT1 = PF_9 | ALT1, // same pin used for alternate HW
|
||||
PF_10 = 0x5A,
|
||||
PF_11 = 0x5B,
|
||||
PF_12 = 0x5C,
|
||||
PF_13 = 0x5D,
|
||||
PF_14 = 0x5E,
|
||||
PF_15 = 0x5F,
|
||||
PG_0 = 0x60,
|
||||
PG_1 = 0x61,
|
||||
PG_2 = 0x62,
|
||||
PG_3 = 0x63,
|
||||
PG_4 = 0x64,
|
||||
PG_5 = 0x65,
|
||||
PG_6 = 0x66,
|
||||
PG_7 = 0x67,
|
||||
PG_8 = 0x68,
|
||||
PG_9 = 0x69,
|
||||
PG_10 = 0x6A,
|
||||
PG_11 = 0x6B,
|
||||
PG_12 = 0x6C,
|
||||
PG_13 = 0x6D,
|
||||
PG_13_ALT0 = PG_13 | ALT0, // same pin used for alternate HW
|
||||
PG_14 = 0x6E,
|
||||
PG_15 = 0x6F,
|
||||
PH_0 = 0x70,
|
||||
PH_1 = 0x71,
|
||||
|
||||
/**** ADC internal channels ****/
|
||||
|
||||
ADC_TEMP = 0xF0, // Internal pin virtual value
|
||||
ADC_VREF = 0xF1, // Internal pin virtual value
|
||||
ADC_VBAT = 0xF2, // Internal pin virtual value
|
||||
|
||||
#ifdef TARGET_FF_ARDUINO_UNO
|
||||
// Arduino Uno (Rev3) pins
|
||||
ARDUINO_UNO_A0 = PA_3,
|
||||
ARDUINO_UNO_A1 = PC_0,
|
||||
ARDUINO_UNO_A2 = PC_3C,
|
||||
ARDUINO_UNO_A3 = PB_1,
|
||||
ARDUINO_UNO_A4 = PC_2C,
|
||||
ARDUINO_UNO_A5 = PF_10,
|
||||
|
||||
ARDUINO_UNO_D0 = PB_7,
|
||||
ARDUINO_UNO_D1 = PB_6,
|
||||
ARDUINO_UNO_D2 = PG_14,
|
||||
ARDUINO_UNO_D3 = PE_13,
|
||||
ARDUINO_UNO_D4 = PE_14,
|
||||
ARDUINO_UNO_D5 = PE_11,
|
||||
ARDUINO_UNO_D6 = PE_9,
|
||||
ARDUINO_UNO_D7 = PG_12,
|
||||
ARDUINO_UNO_D8 = PF_3,
|
||||
ARDUINO_UNO_D9 = PD_15,
|
||||
ARDUINO_UNO_D10 = PD_14,
|
||||
ARDUINO_UNO_D11 = STM32_D11_SPI_ETHERNET_PIN, /* config in targets.json file */
|
||||
ARDUINO_UNO_D12 = PA_6,
|
||||
ARDUINO_UNO_D13 = PA_5,
|
||||
ARDUINO_UNO_D14 = PB_9,
|
||||
ARDUINO_UNO_D15 = PB_8,
|
||||
#endif
|
||||
|
||||
// ST ZIO connector extending Arduino Uno
|
||||
A6 = PF_4,
|
||||
A7 = PF_5,
|
||||
A8 = PF_6,
|
||||
D16 = PC_6,
|
||||
D17 = PB_15,
|
||||
D18 = PB_13,
|
||||
D19 = PB_12,
|
||||
D20 = PA_15,
|
||||
D21 = PC_7,
|
||||
D22 = PB_5,
|
||||
D23 = PB_3,
|
||||
D24 = PA_4,
|
||||
D25 = PB_4,
|
||||
D26 = PG_6,
|
||||
D27 = PB_2,
|
||||
D28 = PD_13,
|
||||
D29 = PD_12,
|
||||
D30 = PD_11,
|
||||
D31 = PE_2,
|
||||
D32 = PA_0,
|
||||
D33 = PB_0,
|
||||
D34 = PE_0,
|
||||
D35 = PB_11,
|
||||
D36 = PB_10,
|
||||
D37 = PE_15,
|
||||
D38 = PE_6,
|
||||
D39 = PE_12,
|
||||
D40 = PE_10,
|
||||
D41 = PE_7,
|
||||
D42 = PE_8,
|
||||
D43 = PC_8,
|
||||
D44 = PC_9,
|
||||
D45 = PC_10,
|
||||
D46 = PC_11,
|
||||
D47 = PC_12,
|
||||
D48 = PD_2,
|
||||
D49 = PG_2,
|
||||
D50 = PG_3,
|
||||
D51 = PD_7,
|
||||
D52 = PD_6,
|
||||
D53 = PD_5,
|
||||
D54 = PD_4,
|
||||
D55 = PD_3,
|
||||
D56 = PE_2,
|
||||
D57 = PE_4,
|
||||
D58 = PE_5,
|
||||
D59 = PE_6,
|
||||
D60 = PE_3,
|
||||
D61 = PF_8,
|
||||
D62 = PF_7,
|
||||
D63 = PF_9,
|
||||
D64 = PG_1,
|
||||
D65 = PG_0,
|
||||
D66 = PD_1,
|
||||
D67 = PD_0,
|
||||
D68 = PF_0,
|
||||
D69 = PF_1,
|
||||
D70 = PF_2,
|
||||
D71 = PE_2,
|
||||
D72 = PB_2,
|
||||
|
||||
// STDIO for console print
|
||||
#ifdef MBED_CONF_TARGET_STDIO_UART_TX
|
||||
CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX,
|
||||
#else
|
||||
CONSOLE_TX = PD_8,
|
||||
#endif
|
||||
#ifdef MBED_CONF_TARGET_STDIO_UART_RX
|
||||
CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX,
|
||||
#else
|
||||
CONSOLE_RX = PD_9,
|
||||
#endif
|
||||
|
||||
/**** USB FS pins ****/
|
||||
USB_OTG_FS_DM = PA_11,
|
||||
USB_OTG_FS_DP = PA_12,
|
||||
USB_OTG_FS_ID = PA_10,
|
||||
USB_OTG_FS_SOF = PA_8,
|
||||
USB_OTG_FS_VBUS = PA_9,
|
||||
|
||||
/**** USB HS pins ****/
|
||||
USB_OTG_HS_DM = PA_11,
|
||||
USB_OTG_HS_DP = PA_12,
|
||||
USB_OTG_HS_ID = PA_10,
|
||||
USB_OTG_HS_SOF = PA_8,
|
||||
USB_OTG_HS_ULPI_CK = PA_5,
|
||||
USB_OTG_HS_ULPI_D0 = PA_3,
|
||||
USB_OTG_HS_ULPI_D1 = PB_0,
|
||||
USB_OTG_HS_ULPI_D2 = PB_1,
|
||||
USB_OTG_HS_ULPI_D3 = PB_10,
|
||||
USB_OTG_HS_ULPI_D4 = PB_11,
|
||||
USB_OTG_HS_ULPI_D5 = PB_12,
|
||||
USB_OTG_HS_ULPI_D6 = PB_13,
|
||||
USB_OTG_HS_ULPI_D7 = PB_5,
|
||||
USB_OTG_HS_ULPI_DIR = PC_2C,
|
||||
USB_OTG_HS_ULPI_NXT = PC_3C,
|
||||
USB_OTG_HS_ULPI_STP = PC_0,
|
||||
USB_OTG_HS_VBUS = PA_9,
|
||||
|
||||
/**** ETHERNET pins ****/
|
||||
ETH_COL = PA_3,
|
||||
ETH_CRS = PA_0,
|
||||
ETH_CRS_DV = PA_7,
|
||||
ETH_MDC = PC_1,
|
||||
ETH_MDIO = PA_2,
|
||||
ETH_PPS_OUT = PG_8,
|
||||
ETH_PPS_OUT_ALT0 = PB_5,
|
||||
ETH_REF_CLK = PA_1,
|
||||
ETH_RXD0 = PC_4,
|
||||
ETH_RXD1 = PC_5,
|
||||
ETH_RXD2 = PB_0,
|
||||
ETH_RXD3 = PB_1,
|
||||
ETH_RX_CLK = PA_1,
|
||||
ETH_RX_DV = PA_7,
|
||||
ETH_RX_ER = PB_10,
|
||||
ETH_TXD0 = PB_12,
|
||||
ETH_TXD0_ALT0 = PG_13,
|
||||
ETH_TXD1 = PB_13,
|
||||
ETH_TXD1_ALT0 = PG_12,
|
||||
ETH_TXD1_ALT1 = PG_14,
|
||||
ETH_TXD2 = PC_2C,
|
||||
ETH_TXD3 = PE_2,
|
||||
ETH_TXD3_ALT0 = PB_8,
|
||||
ETH_TX_CLK = PC_3C,
|
||||
ETH_TX_EN = PB_11,
|
||||
ETH_TX_EN_ALT0 = PG_11,
|
||||
ETH_TX_ER = PB_2,
|
||||
ETH_TX_ER_ALT0 = PA_9,
|
||||
|
||||
/**** OSCILLATOR pins ****/
|
||||
RCC_OSC32_IN = PC_14,
|
||||
RCC_OSC32_OUT = PC_15,
|
||||
RCC_OSC_IN = PH_0,
|
||||
RCC_OSC_OUT = PH_1,
|
||||
|
||||
/**** DEBUG pins ****/
|
||||
DEBUG_JTCK_SWCLK = PA_14,
|
||||
DEBUG_JTDI = PA_15,
|
||||
DEBUG_JTDO_SWO = PB_3,
|
||||
DEBUG_JTMS_SWDIO = PA_13,
|
||||
DEBUG_JTRST = PB_4,
|
||||
DEBUG_TRACECLK = PE_2,
|
||||
DEBUG_TRACED0 = PE_3,
|
||||
DEBUG_TRACED0_ALT0 = PC_1,
|
||||
DEBUG_TRACED0_ALT1 = PG_13,
|
||||
DEBUG_TRACED1 = PE_4,
|
||||
DEBUG_TRACED1_ALT0 = PC_8,
|
||||
DEBUG_TRACED1_ALT1 = PG_14,
|
||||
DEBUG_TRACED2 = PE_5,
|
||||
DEBUG_TRACED2_ALT0 = PD_2,
|
||||
DEBUG_TRACED3 = PE_6,
|
||||
DEBUG_TRACED3_ALT0 = PC_12,
|
||||
DEBUG_TRGIO = PC_7,
|
||||
PWR_CSLEEP = PC_3C,
|
||||
PWR_CSTOP = PC_2C,
|
||||
PWR_NDSTOP2 = PA_5,
|
||||
PWR_PVD_IN = PB_7,
|
||||
SYS_PWR_WKUP1 = PA_0,
|
||||
SYS_PWR_WKUP2 = PA_2,
|
||||
SYS_PWR_WKUP4 = PC_13,
|
||||
SYS_PWR_WKUP6 = PC_1,
|
||||
|
||||
// Not connected
|
||||
NC = (int)0xFFFFFFFF
|
||||
} PinName;
|
||||
|
||||
// Standardized LED and button names
|
||||
#define LED1 PB_0 // LED_GREEN
|
||||
#define LED2 PB_14 // LED_RED
|
||||
#define LED3 PE_1 // LED_YELLOW
|
||||
#define BUTTON1 PC_13 // B1 (Blue_User_Button)
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -61,39 +61,36 @@ defined in linker script */
|
|||
Reset_Handler:
|
||||
ldr sp, =_estack /* set stack pointer */
|
||||
|
||||
/* Call the clock system initialization function.*/
|
||||
bl SystemInit
|
||||
|
||||
/* Copy the data segment initializers from flash to SRAM */
|
||||
ldr r0, =_sdata
|
||||
ldr r1, =_edata
|
||||
ldr r2, =_sidata
|
||||
movs r3, #0
|
||||
b LoopCopyDataInit
|
||||
movs r1, #0
|
||||
b LoopCopyDataInit
|
||||
|
||||
CopyDataInit:
|
||||
ldr r4, [r2, r3]
|
||||
str r4, [r0, r3]
|
||||
adds r3, r3, #4
|
||||
ldr r3, =_sidata
|
||||
ldr r3, [r3, r1]
|
||||
str r3, [r0, r1]
|
||||
adds r1, r1, #4
|
||||
|
||||
LoopCopyDataInit:
|
||||
adds r4, r0, r3
|
||||
cmp r4, r1
|
||||
bcc CopyDataInit
|
||||
ldr r0, =_sdata
|
||||
ldr r3, =_edata
|
||||
adds r2, r0, r1
|
||||
cmp r2, r3
|
||||
bcc CopyDataInit
|
||||
ldr r2, =_sbss
|
||||
b LoopFillZerobss
|
||||
/* Zero fill the bss segment. */
|
||||
ldr r2, =_sbss
|
||||
ldr r4, =_ebss
|
||||
movs r3, #0
|
||||
b LoopFillZerobss
|
||||
|
||||
FillZerobss:
|
||||
str r3, [r2]
|
||||
adds r2, r2, #4
|
||||
movs r3, #0
|
||||
str r3, [r2], #4
|
||||
|
||||
LoopFillZerobss:
|
||||
cmp r2, r4
|
||||
bcc FillZerobss
|
||||
ldr r3, = _ebss
|
||||
cmp r2, r3
|
||||
bcc FillZerobss
|
||||
|
||||
/* Call the clock system initialization function.*/
|
||||
bl SystemInit
|
||||
bl _start
|
||||
bx lr
|
||||
bx lr
|
||||
|
|
|
@ -26,19 +26,29 @@
|
|||
#define MBED_APP_SIZE MBED_ROM_SIZE
|
||||
#endif
|
||||
|
||||
M_CRASH_DATA_RAM_SIZE = 0x100;
|
||||
|
||||
#if !defined(MBED_CONF_TARGET_BOOT_STACK_SIZE)
|
||||
/* This value is normally defined by the tools
|
||||
to 0x1000 for bare metal and 0x400 for RTOS */
|
||||
#define MBED_CONF_TARGET_BOOT_STACK_SIZE 0x400
|
||||
#endif
|
||||
|
||||
/* Round up VECTORS_SIZE to 8 bytes */
|
||||
#define VECTORS_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||
STACK_SIZE = MBED_CONF_TARGET_BOOT_STACK_SIZE;
|
||||
|
||||
/* Round up MBED_VECTTABLE_RAM_SIZE to 8 bytes */
|
||||
#define MBED_VECTTABLE_RAM_SIZE (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
|
||||
#define MBED_RAM0_START (MBED_RAM_START + MBED_VECTTABLE_RAM_SIZE)
|
||||
#define MBED_RAM0_SIZE (MBED_RAM_SIZE - MBED_VECTTABLE_RAM_SIZE)
|
||||
|
||||
MEMORY
|
||||
{
|
||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||
RAM (rwx) : ORIGIN = MBED_RAM_START + VECTORS_SIZE, LENGTH = MBED_RAM_SIZE - VECTORS_SIZE
|
||||
FLASH (rx) : ORIGIN = MBED_APP_START, LENGTH = MBED_APP_SIZE
|
||||
SRAM_DTC (xrw) : ORIGIN = MBED_RAM0_START, LENGTH = MBED_RAM0_SIZE
|
||||
SRAM (xrw) : ORIGIN = MBED_RAM1_START, LENGTH = MBED_RAM1_SIZE
|
||||
SRAM_LOWER (xrw) : ORIGIN = 0x30000000, LENGTH = 32K
|
||||
SRAM_UPPER (xrw) : ORIGIN = 0x38000000, LENGTH = 16K
|
||||
SRAM_ITC (xrw) : ORIGIN = 0x00000000, LENGTH = 64K
|
||||
}
|
||||
|
||||
/* Linker script to place sections and symbol values. Should be used together
|
||||
|
@ -113,7 +123,48 @@ SECTIONS
|
|||
|
||||
__etext = .;
|
||||
_sidata = .;
|
||||
|
||||
|
||||
.crash_data_ram :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__CRASH_DATA_RAM__ = .;
|
||||
__CRASH_DATA_RAM_START__ = .; /* Create a global symbol at data start */
|
||||
KEEP(*(.keep.crash_data_ram))
|
||||
*(.m_crash_data_ram) /* This is a user defined section */
|
||||
. += M_CRASH_DATA_RAM_SIZE;
|
||||
. = ALIGN(8);
|
||||
__CRASH_DATA_RAM_END__ = .; /* Define a global symbol at data end */
|
||||
} > SRAM_UPPER
|
||||
|
||||
/* .stack section doesn't contains any symbols. It is only
|
||||
* used for linker to reserve space for the isr stack section
|
||||
* WARNING: .stack should come immediately after the last secure memory
|
||||
* section. This provides stack overflow detection. */
|
||||
.stack (NOLOAD):
|
||||
{
|
||||
__StackLimit = .;
|
||||
*(.stack*);
|
||||
. += STACK_SIZE - (. - __StackLimit);
|
||||
} > SRAM_DTC
|
||||
|
||||
/* Set stack top to end of SRAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ADDR(.stack) + SIZEOF(.stack);
|
||||
_estack = __StackTop;
|
||||
__StackLimit = ADDR(.stack);
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Place holder for additional heap */
|
||||
.heap_0 (COPY):
|
||||
{
|
||||
__mbed_sbrk_start_0 = .;
|
||||
. += (ORIGIN(SRAM_DTC) + LENGTH(SRAM_DTC) - .);
|
||||
__mbed_krbs_start_0 = .;
|
||||
} > SRAM_DTC
|
||||
|
||||
/* Check if heap exceeds SRAM_DTC */
|
||||
ASSERT(__mbed_krbs_start_0 <= (ORIGIN(SRAM_DTC)+LENGTH(SRAM_DTC)), "Heap is too big for SRAM_DTC")
|
||||
|
||||
.data : AT (__etext)
|
||||
{
|
||||
__data_start__ = .;
|
||||
|
@ -147,7 +198,10 @@ SECTIONS
|
|||
__data_end__ = .;
|
||||
_edata = .;
|
||||
|
||||
} > RAM
|
||||
} > SRAM
|
||||
|
||||
/* Check if bss exceeds SRAM */
|
||||
ASSERT(__data_end__ <= (ORIGIN(SRAM)+LENGTH(SRAM)), ".data is too big for SRAM")
|
||||
|
||||
/* Uninitialized data section
|
||||
* This region is not initialized by the C/C++ library and can be used to
|
||||
|
@ -160,8 +214,8 @@ SECTIONS
|
|||
KEEP(*(.keep.uninitialized))
|
||||
. = ALIGN(32);
|
||||
__uninitialized_end = .;
|
||||
} > RAM
|
||||
|
||||
} > SRAM
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
|
@ -172,32 +226,22 @@ SECTIONS
|
|||
. = ALIGN(8);
|
||||
__bss_end__ = .;
|
||||
_ebss = .;
|
||||
} > RAM
|
||||
} > SRAM
|
||||
|
||||
/* Check if bss exceeds SRAM */
|
||||
ASSERT(__bss_end__ <= (ORIGIN(SRAM)+LENGTH(SRAM)), "BSS is too big for SRAM")
|
||||
|
||||
.heap (COPY):
|
||||
{
|
||||
__end__ = .;
|
||||
PROVIDE(end = .);
|
||||
end = __end__;
|
||||
__mbed_sbrk_start = .;
|
||||
*(.heap*)
|
||||
. = ORIGIN(RAM) + LENGTH(RAM) - MBED_CONF_TARGET_BOOT_STACK_SIZE;
|
||||
. += (ORIGIN(SRAM) + LENGTH(SRAM) - .);
|
||||
__mbed_krbs_start = .;
|
||||
__HeapLimit = .;
|
||||
} > RAM
|
||||
} > SRAM
|
||||
|
||||
/* .stack_dummy section doesn't contains any symbols. It is only
|
||||
* used for linker to calculate size of stack sections, and assign
|
||||
* values to stack symbols later */
|
||||
.stack_dummy (COPY):
|
||||
{
|
||||
*(.stack*)
|
||||
} > RAM
|
||||
|
||||
/* Set stack top to end of RAM, and stack limit move down by
|
||||
* size of stack_dummy section */
|
||||
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
|
||||
_estack = __StackTop;
|
||||
__StackLimit = __StackTop - MBED_CONF_TARGET_BOOT_STACK_SIZE;
|
||||
PROVIDE(__stack = __StackTop);
|
||||
|
||||
/* Check if data + heap + stack exceeds RAM limit */
|
||||
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
|
||||
/* Check if data + heap exceeds SRAM limit */
|
||||
ASSERT(__HeapLimit <= (ORIGIN(SRAM)+LENGTH(SRAM)), "Heap is too big for SRAM")
|
||||
}
|
||||
|
|
|
@ -25,20 +25,28 @@
|
|||
#define MBED_ROM_SIZE 0x100000 // 1 MB
|
||||
#endif
|
||||
|
||||
// 0x20000000 - 0x2001FFFF 128K DTCM
|
||||
// 0x24000000 - 0x2404FFFF 320K AXI SRAM
|
||||
// 0x30000000 - 0x30003FFF 16K SRAM1
|
||||
// 0x30004000 - 0x30007FFF 16K SRAM2
|
||||
// 0x38000000 - 0x38003FFF 16K SRAM4
|
||||
|
||||
#if !defined(MBED_RAM_START)
|
||||
#define MBED_RAM_START 0x24000000
|
||||
#define MBED_RAM_START 0x20000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM_SIZE)
|
||||
// 0x38000000 - 0x38003FFF 16K SRAM4
|
||||
// 0x30004000 - 0x30007FFF 16K SRAM2
|
||||
// 0x30000000 - 0x30003FFF 16K SRAM1
|
||||
// 0x24000000 - 0x2404FFFF 320K AXI SRAM
|
||||
// 0x20000000 - 0x2001FFFF 128K DTCM
|
||||
#define MBED_RAM_SIZE 0x50000 // 320 KB
|
||||
#define MBED_RAM_SIZE 0x20000 // 128 KB
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM1_START)
|
||||
#define MBED_RAM_1START 0x24000000
|
||||
#endif
|
||||
|
||||
#if !defined(MBED_RAM1_SIZE)
|
||||
#define MBED1_RAM_SIZE 0x50000 // 320 KB
|
||||
#endif
|
||||
|
||||
#define NVIC_NUM_VECTORS 180
|
||||
#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
|
||||
|
||||
#endif
|
||||
|
|
|
@ -20,12 +20,12 @@
|
|||
* | 2- USE_PLL_HSE_XTAL (external 8 MHz xtal)
|
||||
* | 3- USE_PLL_HSI (internal 64 MHz clock)
|
||||
*--------------------------------------------------------------------
|
||||
* SYSCLK(MHz) | 480
|
||||
* AHBCLK (MHz) | 240
|
||||
* APB1CLK (MHz) | 120
|
||||
* APB2CLK (MHz) | 120
|
||||
* APB3CLK (MHz) | 120
|
||||
* APB4CLK (MHz) | 120
|
||||
* SYSCLK(MHz) | 550
|
||||
* AHBCLK (MHz) | 275
|
||||
* APB1CLK (MHz) | 137.5
|
||||
* APB2CLK (MHz) | 137.5
|
||||
* APB3CLK (MHz) | 137.5
|
||||
* APB4CLK (MHz) | 137.5
|
||||
* USB capable (48 MHz) | YES
|
||||
*--------------------------------------------------------------------
|
||||
**/
|
||||
|
@ -85,17 +85,23 @@ void SetSysClock(void)
|
|||
/******************************************************************************/
|
||||
MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
||||
{
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/* Supply configuration update enable */
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
|
||||
/* Configure the main internal regulator output voltage */
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
|
||||
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
|
||||
/* Enable HSE Oscillator and activate PLL with HSE as source */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
|
||||
/* Configure LSE Drive Capability */
|
||||
HAL_PWR_EnableBkUpAccess();
|
||||
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
|
||||
|
||||
/* Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure. */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
|
||||
if (bypass) {
|
||||
RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
|
||||
} else {
|
||||
|
@ -104,38 +110,36 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
|||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
||||
#if HSE_VALUE==8000000
|
||||
RCC_OscInitStruct.PLL.PLLM = 4; // 2 MHz
|
||||
RCC_OscInitStruct.PLL.PLLN = 275; // 550 MHz
|
||||
#else
|
||||
#error Unsupported externall clock value, check HSE_VALUE define
|
||||
#endif
|
||||
RCC_OscInitStruct.PLL.PLLP = 1; // PLLCLK = SYSCLK = 550 MHz
|
||||
RCC_OscInitStruct.PLL.PLLQ = 5;
|
||||
RCC_OscInitStruct.PLL.PLLR = 2;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 0;
|
||||
RCC_OscInitStruct.PLL.PLLM = 1; // 8 MHz
|
||||
RCC_OscInitStruct.PLL.PLLN = 68; // 550 MHz (see PLLFRACN)
|
||||
RCC_OscInitStruct.PLL.PLLP = 1; // 550 MHz
|
||||
RCC_OscInitStruct.PLL.PLLQ = 5; // 110 MHz
|
||||
RCC_OscInitStruct.PLL.PLLR = 2; // 275 MHz
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_1;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 6144;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Select PLL as system clock source and configure bus clocks dividers */
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
|
||||
RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 |
|
||||
RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_D3PCLK1;
|
||||
/* Initializes the CPU, AHB and APB buses clocks */
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
#if DEVICE_USBDEVICE
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
|
||||
|
@ -155,6 +159,67 @@ MBED_WEAK uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
|
|||
/******************************************************************************/
|
||||
uint8_t SetSysClock_PLL_HSI(void)
|
||||
{
|
||||
return 0; // FAIL
|
||||
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
|
||||
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
|
||||
|
||||
/* Supply configuration update enable */
|
||||
HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
|
||||
|
||||
/* Configure the main internal regulator output voltage */
|
||||
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
|
||||
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
||||
|
||||
/* Configure LSE Drive Capability */
|
||||
HAL_PWR_EnableBkUpAccess();
|
||||
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
|
||||
|
||||
/* Initializes the RCC Oscillators according to the specified parameters
|
||||
* in the RCC_OscInitTypeDef structure. */
|
||||
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI;
|
||||
RCC_OscInitStruct.HSIState = RCC_HSI_DIV1;
|
||||
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
|
||||
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
|
||||
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
||||
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
|
||||
RCC_OscInitStruct.PLL.PLLM = 4; // 16 MHz
|
||||
RCC_OscInitStruct.PLL.PLLN = 34; // 550 MHz (see PLLFRACN)
|
||||
RCC_OscInitStruct.PLL.PLLP = 1; // 550 MHz
|
||||
RCC_OscInitStruct.PLL.PLLQ = 5; // 110 MHz
|
||||
RCC_OscInitStruct.PLL.PLLR = 2; // 275 MHz
|
||||
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_3;
|
||||
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
||||
RCC_OscInitStruct.PLL.PLLFRACN = 3072;
|
||||
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
/* Initializes the CPU, AHB and APB buses clocks */
|
||||
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|
||||
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
|
||||
|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
|
||||
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
||||
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
||||
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
||||
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
||||
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
||||
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
||||
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
||||
|
||||
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
#if DEVICE_USBDEVICE
|
||||
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
|
||||
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
|
||||
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
|
||||
return 0; // FAIL
|
||||
}
|
||||
|
||||
HAL_PWREx_EnableUSBVoltageDetector();
|
||||
#endif /* DEVICE_USBDEVICE */
|
||||
|
||||
return 1; // OK
|
||||
}
|
||||
#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */
|
||||
|
|
|
@ -264,8 +264,17 @@ void USBPhyHw::init(USBPhyEvents *events)
|
|||
hpcd.Init.vbus_sensing_enable = DISABLE;
|
||||
hpcd.Init.use_external_vbus = DISABLE;
|
||||
|
||||
#ifdef __HAL_RCC_OTGPHYC_CLK_ENABLE
|
||||
__HAL_RCC_OTGPHYC_CLK_ENABLE();
|
||||
#endif
|
||||
__HAL_RCC_USB_OTG_HS_CLK_ENABLE();
|
||||
|
||||
#ifdef __HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE
|
||||
__HAL_RCC_USB1_OTG_HS_ULPI_CLK_SLEEP_DISABLE();
|
||||
#endif
|
||||
#ifdef __HAL_RCC_USB2_OTG_HS_ULPI_CLK_SLEEP_DISABLE
|
||||
__HAL_RCC_USB2_OTG_HS_ULPI_CLK_SLEEP_DISABLE();
|
||||
#endif
|
||||
#ifdef __HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE
|
||||
__HAL_RCC_USB1_OTG_FS_ULPI_CLK_SLEEP_DISABLE();
|
||||
#endif
|
||||
|
|
|
@ -3203,18 +3203,16 @@
|
|||
],
|
||||
"public": false,
|
||||
"core": "Cortex-M7FD",
|
||||
"mbed_rom_start": "0x08000000",
|
||||
"mbed_rom_size": "0x100000",
|
||||
"mbed_ram_start": "0x24000000",
|
||||
"mbed_ram_size": "0x50000",
|
||||
"extra_labels_add": [
|
||||
"STM32H723xG"
|
||||
],
|
||||
"macros_add": [
|
||||
"MBED_SPLIT_HEAP",
|
||||
"STM32H723xx"
|
||||
],
|
||||
"overrides": {
|
||||
"system_power_supply": "PWR_LDO_SUPPLY"
|
||||
"system_power_supply": "PWR_LDO_SUPPLY",
|
||||
"i2c_timing_value_algo": true
|
||||
}
|
||||
},
|
||||
"MCU_STM32H725xE": {
|
||||
|
@ -3304,6 +3302,49 @@
|
|||
],
|
||||
"device_name": "STM32H743ZITx"
|
||||
},
|
||||
"NUCLEO_H723ZG": {
|
||||
"inherits": [
|
||||
"MCU_STM32H723xG"
|
||||
],
|
||||
"supported_toolchains": [
|
||||
"GCC_ARM"
|
||||
],
|
||||
"extra_labels_add": [
|
||||
"STM32H723ZG"
|
||||
],
|
||||
"config": {
|
||||
"hse_value": {
|
||||
"help": "HSE default value is 25MHz in HAL",
|
||||
"value": "8000000",
|
||||
"macro_name": "HSE_VALUE"
|
||||
},
|
||||
"d11_configuration": {
|
||||
"help": "Value: PB_5 for the default board configuration, PA_7 in case of solder bridge update (SB33 on/ SB35 off)",
|
||||
"value": "PB_5",
|
||||
"macro_name": "STM32_D11_SPI_ETHERNET_PIN"
|
||||
},
|
||||
"usb_speed": {
|
||||
"help": "USE_USB_OTG_HS or USE_USB_HS_IN_FS",
|
||||
"value": "USE_USB_HS_IN_FS"
|
||||
}
|
||||
},
|
||||
"device_has_add": [
|
||||
"EMAC",
|
||||
"USBDEVICE"
|
||||
],
|
||||
"overrides": {
|
||||
"clock_source": "USE_PLL_HSE_EXTC",
|
||||
"lse_available": 1,
|
||||
"network-default-interface-type": "ETHERNET"
|
||||
},
|
||||
"supported_form_factors": [
|
||||
"ARDUINO_UNO"
|
||||
],
|
||||
"detect_code": [
|
||||
"0836"
|
||||
],
|
||||
"device_name": "STM32H723ZGTx"
|
||||
},
|
||||
"MCU_STM32H745xI": {
|
||||
"inherits": [
|
||||
"MCU_STM32H7"
|
||||
|
|
Loading…
Reference in New Issue