Commit Graph

101 Commits (e2048b06b2c4aeddc36be4353855f523a43427d6)

Author SHA1 Message Date
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 03dd8d3e22 STM32L4 USB pins addition 2019-10-21 17:11:55 +02:00
jeromecoutant 8cd00b3468 STM32L4: Add OSPI IP support in fallback QSPI mode
For STM32 platforms that embed an OSPI IP, we're offering
a QSPI fallback support with this commit.

When OSPI is supported in mbed, we can consider adding full
OSPI support
2019-08-23 15:18:48 +02:00
jeromecoutant 96a773a0e6 STM32L4: update drivers version to CUBE V1.14.0 2019-07-19 13:15:07 +02:00
Vincent Veron 31eb49b918 TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
Extend to all STM targets the work done on PR10752.

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-06-14 14:15:56 +02:00
jeromecoutant d919498745 STM32: common cmsis.h and device.h 2019-05-27 16:27:41 +02:00
Guillermo Alonso 70bc390410 added QSPI support to target RHOMBIO_L476DMW1K 2019-05-07 15:44:09 +02:00
Martin Kojtal 1de0712272
Merge pull request #9944 from deepikabhavnani/stm32_splitheap
GCC - Add support to split heap across 2-RAM banks
2019-04-30 11:02:51 +01:00
Juho Eskeli 443974b864 STM32L4xx: IAR linker file updated to better use available memory 2019-04-23 12:53:53 +03:00
Deepika 1576fb0aaa Add support for split heap in ST devices 2019-04-09 12:08:49 -05:00
Deepika 36c7b2de86 uARM - Move heap region after IRAM1
ARM_LIB_HEAP start is aligned to IRAM1 end, hence should be placed next to
RW_IRAM1 i.e. no other region in between.
2019-04-09 12:01:01 -05:00
Deepika 122549910e Add Crash report section to all uARM files 2019-02-28 19:54:38 -06:00
deepikabhavnani 0dc5561991 Guard RAM start and size defines 2019-02-28 19:54:38 -06:00
deepikabhavnani b598dc1f46 Target_STM: Add ARM_LIB_STACK and ARM_LIB_HEAP section
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
2019-02-28 19:54:28 -06:00
Guillermo Alonso 16628d7b8d Change in license identifier, removed commented dead code
Change in license identifier
Removed commented dead code
Removed some tab space
2019-02-21 11:55:41 +01:00
Guillermo Alonso faf03e02dc added licence identifier texts 2019-02-20 17:48:07 +01:00
Guillermo Alonso 7b2abc75c2 Added new target RHOMBIO_L476DMW1K 2019-02-20 12:10:53 +01:00
Martin Kojtal 489e52e428
Merge pull request #9410 from jeromecoutant/PR_F756_L486
STM32F756 and STM32L486 alignment with STM32F746 and STM32L476
2019-01-28 10:22:48 +01:00
Russ Butler 82b131aa59 Use dedicated PinMap for each QSPI data line
Split PinMap_QSPI_DATA into PinMap_QSPI_DATA0 - PinMap_QSPI_DATA3.
This allows pins to be selected more accurately.
2019-01-22 12:11:15 -06:00
jeromecoutant 7876a653c6 STM32L476 / STM32L486 alignment 2019-01-17 11:15:39 -06:00
Cruz Monrreal 2454b25eba
Merge pull request #9092 from mprse/stack_unification_sec_try
Interrupt stack size unification + test
2019-01-10 16:08:44 -06:00
kevin.ong d3dfc986b5 STM32L476VG: fix wrong pin map function on ADC channels
This issue is start on https://github.com/ARMmbed/mbed-os/pull/6931

ADC pins must need STM_PIN_ANALOG_CONTROL_BIT to call LL_GPIO_EnablePinAnalogControl
2019-01-10 00:39:18 +08:00
Przemyslaw Stekiel 58f6bf7292 [STM] Support boot stack size configuration option 2019-01-08 15:32:06 +01:00
jeromecoutant 9790f67acc STM32L4 QSPI: correct register address 2018-12-13 10:56:39 +01:00
jeromecoutant 7c8de3c4e1 STM32 : removed unused QSPI pin names 2018-12-13 10:56:25 +01:00
Senthil Ramakrishnan ef8c1c3cb6 Linker script modifications for crash data region 2018-11-16 13:59:59 -06:00
Deepika bf1a2c8485 [ST]: Fix alignment of execute region to 8-byte boundary in ARM linker files
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
2018-10-09 14:47:14 -05:00
Martin Kojtal b97ac0c353
Merge pull request #7787 from jeromecoutant/PR_MSI_LSE
STM32L4 : code cleanup in MSI SetSysClock
2018-09-17 14:22:29 +02:00
Yossi Levy acfda5895e Changes in PR #7774 of PinNames.h should be reverted. This commit reverts those files excpet for K82F and K64F which are left as an example 2018-09-05 14:13:05 +03:00
Yossi Levy ed8e170d15 Moving SD, SPIF and FLASHIAP into mbedos and refactoring features storage directory structure. 2018-08-29 12:01:11 +03:00
Maciej Bocianski 5195c820e6 standardise QSPI pin names 2018-08-24 12:09:51 +02:00
adustm 7dda4e4fc6 Implement qspi_free function 2018-08-22 15:02:10 +02:00
jeromecoutant 43258a8ff4 STM32 : add all QSPI pins in available targets 2018-08-22 15:02:08 +02:00
adustm 2f06423a89 Add support for QSPI on DISCO_L476VG 2018-08-22 15:02:01 +02:00
jeromecoutant b5c258e398 STM32L4 : code cleanup in MSI SetSysClock 2018-08-14 09:20:52 +02:00
jeromecoutant 063cad5992 STM32L4 assert in SetSysClock replaced 2018-08-13 16:01:49 +02:00
bcostm 7097e07b62 stm32 ticker: typo corrections 2018-07-11 14:43:36 +02:00
bcostm d8e839a789 stm32 ticker: change license 2018-07-11 14:43:16 +02:00
bcostm 32031cbab3 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-11 14:42:44 +02:00
bcostm fbd7a97e19 stm32 ticker: rename macro and update ST HAL Tick functions
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
2018-07-11 14:39:42 +02:00
jeromecoutant 78410e7032 TARGET_STM32L4 astyle 2018-06-27 14:46:00 +02:00
bcostm b087390a1a Remove HAL_TICK_DELAY (no more used) 2018-06-05 16:53:40 +02:00
jeromecoutant b30f3abf11 STM32 PeripheralPins.c second update after review
genpinmap script version 1.1
2018-05-17 17:58:09 +02:00
jeromecoutant 3ac1855d93 STM32L4 DISCO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:05:14 +02:00
jeromecoutant 3e92ff1f85 STM32L4 NUCLEO : PeripheralPins.c and PinNames.h files alignment 2018-05-16 17:04:41 +02:00
adustm 02b2b01a83 Change STM32L475/76/86 GCC_ARM linker files to have HEAP in SRAM1 and stack in SRAM2 (after the interrupt vector) 2018-02-22 17:36:27 +01:00
bcostm 937db051da STM32L476/486: change SRAM config for IAR 2018-02-02 10:23:28 +01:00
Cruz Monrreal fff6c75e28
Merge pull request #5936 from jeromecoutant/PR_WEAK_PINMAP
STM32 : set all PinMap structures as weak
2018-01-30 14:56:42 -06:00