Commit Graph

525 Commits (9d1ae521e8fa32f21a8696d25a0c5f8d2dddc6c8)

Author SHA1 Message Date
Hugues Kamba 0ba05246cc CMake: Fix selection of scatter file and startup file for DISCO_L475_IOT01A 2020-11-06 17:25:20 +00:00
Hugues Kamba 30e88863f4 CMake: Add support for DISCO_L475VG_IOT01A target 2020-11-06 17:25:15 +00:00
jeromecoutant 73d1c63741 STM32 SERIAL: free RTS/CTS pins 2020-11-04 15:47:14 +01:00
jeromecoutant 3c6ba98823 STM32L4: STM32Cube_FW_L4_V1.16.0
source: https://github.com/STMicroelectronics/STM32CubeL4
2020-10-20 08:51:37 +02:00
jeromecoutant 81f919b6c2 STM32L4 : license header alignment 2020-10-20 08:51:36 +02:00
jeromecoutant 95f8b2dfd4 STM32L4 : common file factorisation 2020-10-20 08:51:36 +02:00
jeromecoutant dcc066db59 STM32L4 : alignment with STM32Cube_FW_L4_V1.14.0 2020-10-20 08:51:35 +02:00
jeromecoutant 3b14c478c1 STM32L4 : directory retructuration
- Alignment with other STM32 families
2020-10-20 08:51:35 +02:00
Martin Kojtal 61aa6817f0
Merge pull request #13724 from harmut01/license_refactor
Add license notice to Arm copyrighted source files
2020-10-16 09:09:53 +01:00
Harrison Mutai 4fad1112e5 Add SPDX license identifier to Arm files
Add license identifier to files which Arm owns the copyright to,
and contain either BSD-3 or Apache-2.0 licenses. This is to address
license errors raised by scancode analysis.
2020-10-15 10:47:27 +01:00
jeromecoutant 282bc22247 STM32: update SetSysClock for NUCLEO_L476RG
Change in case of clock_source is set to HSI or HSE
(not the default configuration)
2020-10-06 15:11:34 +02:00
Martin Kojtal 21652971a5
Merge pull request #12644 from macronix/macronix_ospi
Add OSPI driver to support the Octa mode of Macronix octaflash MX25LM51245G
2020-09-30 16:07:20 +01:00
jeromecoutant 0af260fe43 STM32L4: link issue with IAR 2020-09-18 12:27:53 +02:00
rogeryou 48524f25ae add opsi driver 2020-09-16 11:27:23 +08:00
Martin Kojtal a17a481c54
Merge pull request #13583 from jeromecoutant/PR_ARDUINO_PIN
STM32: correct few Arduino pins value
2020-09-10 12:38:02 +01:00
Jaeden Amero 612b148fd4 stack: armc: Workaround config passing bug
Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
2020-09-10 10:08:38 +01:00
Jaeden Amero 39e69d328d Use boot stack size from config system
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319
2020-09-10 10:08:38 +01:00
jeromecoutant 668412ccde NUCLEO_L433RC_P: wrong D0 and D1 pins 2020-09-10 10:05:41 +02:00
jeromecoutant d804167816 STM32L4S5xI: B_L4S5I_IOT01A new target 2020-09-09 15:19:21 +02:00
jeromecoutant c65ad59ccd STM32L4S5xI introduction 2020-09-09 15:19:11 +02:00
jeromecoutant a0b718fc04 STM32 ANALOGOUT and DEEPSLEEP
keep DAC on during wait period
2020-07-02 14:18:44 +02:00
jeromecoutant 0d277eefe4 STM32L4: I2C init parameters for L4+ MCU 2020-06-23 10:05:24 +02:00
jeromecoutant 0a447ac798 STM32L4 baremetal support 2020-06-08 12:05:54 +02:00
jeromecoutant c96eb2cd0e STM32 rename TOOLCHAIN_ARM_STD into TOOLCHAIN_ARM 2020-05-15 10:41:28 +02:00
jeromecoutant 303752ad84 STM32 remove all TOOLCHAIN_ARM_MICRO 2020-05-15 09:37:40 +02:00
Hugues Kamba ce1c51ea51 ST Boards: Remove uARM tooolchain support
For NUCLEO_F401RE, NUCLEO_F411RE, NUCLEO_F303RE, and DISCO_L475VG_IOT01A:
* Ensure the scatter files for the ARM toolchain use 2 region memory model.
  The scatter files changes affects the following boards:
    * NUCLEO_F401RE, STEVAL_3DP001V1 (stm32f401xe.sct)
    * NUCLEO_F411RE, MTS_MDOT_F411RE, MTS_DRAGONFLY_F411RE, MTB_MTS_DRAGONFLY, SAKURAIO_EVB_01 (stm32f411re.sct)
    * NUCLEO_F303RE, NUCLEO_F303ZE (stm32f303xe.sct)
    * DISCO_L475VG_IOT01A, MTB_STM_L475 (stm32l475xx.sct)
* Remove the TOOLCHAIN_ARM_MICRO directories.
* Remove release_version as not necessary and as the targets can also run
  Mbed OS 6.
* Remove uARM support for all FAMILY_STM32 targets.
2020-04-30 14:17:39 +01:00
Marcelo Salazar a7b026bd14 Rename ADV_WISE_1510 target 2020-04-30 09:56:35 +01:00
Marcelo Salazar 92cbd9a734 Rename ADV_WISE_1570 target 2020-04-30 09:56:35 +01:00
MarceloSalazar 4b1ad8ad4c Remove MTB_STM_L475 target 2020-04-20 16:55:33 +01:00
MarceloSalazar 831c475a46 Remove Silica target 2020-04-09 15:32:41 +01:00
jeromecoutant 3e30033822 DISCO_L4R9I correct LED pins 2020-03-03 13:36:57 +01:00
Martin Kojtal 7658681a9e
Merge pull request #12409 from LMESTM/Fix_lpuart_deep_sleep
FIX: LPUART clock source selection should be left to serial driver
2020-02-13 09:45:41 +00:00
Laurent Meunier 3fd071404e FIX: LPUART clock source selection should be left to serial driver
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c

At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.

So let's remove these few lines of code which are causing trouble.
2020-02-11 17:14:45 +01:00
Martin Kojtal c1eaf2c358
Merge pull request #12380 from mprse/DISCO_L475VG_IOT01A_add_gpio_pinmap
DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing
2020-02-11 11:58:53 +00:00
Martin Kojtal 7fd5119b89
Merge pull request #12341 from fkjagodzinski/fix-stm-hal_fpga
STM32L4: Fix the UART RX & TX data reg bitmasks
2020-02-10 13:21:31 +00:00
Przemyslaw Stekiel 3a71f86235 DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing 2020-02-07 11:41:32 +01:00
Filip Jagodzinski ae635d5cd4 STM32L4: Fix the UART RX & TX data reg bitmasks
The existing logic was insufficient to properly handle odd and even
parity setting, e.g. serial_getc() returned 9-bit data for 8O1
transmission format.
2020-02-06 14:07:51 +01:00
pea-pod f7c4693747 Add new target: NUCLEO_L452RE-P 2020-01-27 18:41:18 -06:00
Martin Kojtal d6e69ef57b
Merge pull request #12208 from hugueskamba/hk-replace-uartserial-st
ST targets: Replace UARTSerial references with BufferedSerial
2020-01-17 08:19:09 +00:00
Hugues Kamba 03cff0a02c ST targets: Replace UARTSerial references with BufferedSerial
BufferedSerial is UARTSerial renamed to convey the original purpose of
the class. It is the recommended buffered I/O serial class.
2020-01-08 08:34:20 +00:00
Leon Lindenfelser 94ead7adb2 Minor fixes for peripheral pins on Dragonfly Nano
1. PG8 should be labeled I2C3 not I2C1.
2. PC0 is dedicated to measuring system voltage.
2020-01-07 08:52:34 -06:00
Antti Kauppila e29cb193ca Added missing define for Quectel UG96 2019-12-27 16:04:10 +01:00
Antti Kauppila ca7848d854 Refactored away onboard_modem_api because it is not needed at all
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
2019-12-27 16:04:10 +01:00
Anna Bridge b1b0673622
Merge pull request #12086 from ABOSTM/FLASH_API_64B_ALIGNMENT
TARGET_STM: fix flash api 64bit address alignment on L4 and WB
2019-12-17 16:46:21 +00:00
Alexandre Bourdiol 9e3ad13d5e TARGET_STM: fix flash api 64bit address alignment on L4 and WB 2019-12-11 18:32:42 +01:00
jeromecoutant bea83d02c2 STM32 TARGET_STM astyle corrections 2019-12-10 14:39:47 +01:00
Kevin Bracey fe22bc023e Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-12-02 14:45:37 +02:00
Martin Kojtal 48f544f9e4
Merge pull request #11980 from jeromecoutant/PR_L4R9I
DISCO_L4R9I: update clock configuration for all clock sources
2019-12-02 11:23:51 +01:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
jeromecoutant 354913a45e DISCO_L4R9I: correct clock tree for all clock sources 2019-11-28 16:29:11 +01:00