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419 Commits (8067bf629f8e1288149623d96db75b9932df1521)

Author SHA1 Message Date
Sam Grove 4f9e9f635f Merge pull request #3540 from LMESTM/fix_spi_rx_init 
STM: SPI: Initialize Rx in spi_master_write
 2017-01-09 10:37:05 -06:00
Sam Grove 5fd8a5e43a Merge pull request #3539 from bcostm/dev_trng_nucleo-f412zg 
NUCLEO_F412ZG - Add support of TRNG peripheral
 2017-01-09 10:34:18 -06:00
Sam Grove cefae22703 Merge pull request #3492 from Nodraak/fix/3463/can_read_return_value 
Fix #3463 CAN read() return value
 2017-01-09 10:17:27 -06:00
Sam Grove ddcd3ad711 Merge pull request #3488 from LMESTM/dev_stm_i2c_v2_unitary_functions 
Dev stm i2c v2 unitary functions
 2017-01-09 10:15:55 -06:00
jeromecoutant 633240b93b STM32L4 deepsleep improvement 2017-01-09 12:21:24 +01:00
Laurent MEUNIER fd3a3f9de8 STM: SPI: Initialize Rx in spi_master_write 
In case Rx is not initiliased its content might be random from stack.
This is causing problem in case of 8 bits read only as the left-side 8 bits
of the returned int value may contain this random byte data. This was for
instance detected when using SDFileSystem Lib.
 2017-01-06 13:20:55 +01:00
bcostm 30ac4aae75 Add support of TRNG peripheral 2017-01-06 10:36:29 +01:00
Laurent MEUNIER 4297e3fd36 STM32: I2C: i2c_byte_read return value in case of error 
To make clear that an error is being reported, we shall report -1,
2 being the timeout error for i2c_byte_write only.
 2017-01-03 18:06:19 +01:00
Adrien Chardon 885b018f77
Set bit without reseting the whole register 2017-01-03 11:46:27 +01:00
Adrien Chardon 7e0b4fe3c9
Fix can_read() return value for STM32 boards 2017-01-03 11:46:25 +01:00
Laurent MEUNIER 455c2ecbea STM32: I2C: remove debug code 
Few debug lines were to be removed / updated.
Move the printf to DEBUG_PRINTF and return the error when needed.
 2017-01-03 10:18:56 +01:00
Michel Jaouen 8af69dcbd6 STM32 HAL HCD : USBHOST changes for f4,f2,l4,f7 
- reset toggle_out , toggle_in at init
-  in/out toggle in on ctrl endpoint
- remove call back when transmission restarted
 2017-01-02 09:48:15 +01:00
Martin Kojtal 6598e32785 Merge pull request #3405 from samos2011/stm32f1_can_bug 
Repair the transmit mailbox (0,1,2) empty interrupt flag not clear BUG
 2016-12-30 12:31:18 +01:00
Martin Kojtal 6e7ee0e51e Merge pull request #3489 from bcostm/fix_issue_3474 
NUCLEO_F103RB - Correct CAN and PWM alternate-functions
 2016-12-23 13:15:37 +00:00
Martin Kojtal d652d391e6 Merge pull request #3454 from 0xc0170/jeromecoutant-PR_LPT 
STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files
 2016-12-23 13:06:02 +00:00
Martin Kojtal 9b8efb2659 Merge pull request #3391 from jeromecoutant/PR_ST_F4_ASSERT 
STM32F4 : map ST HAL assert into MBED assert
 2016-12-23 13:05:35 +00:00
jeromecoutant 2b4d83ef1e Run astyle 2016-12-21 16:54:19 +00:00
jeromecoutant ab28a5e5cb STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files 2016-12-21 16:54:18 +00:00
bcostm 30dddf115a Correct wrong alternate-function number for CAN PB_8/PB_9 pins and PWM PC_7 pin 2016-12-21 10:27:50 +01:00
Laurent MEUNIER 20c9af8bec STM32: I2C unitary functions for IP V2 
STM32 supported targets have 2 possible versions of I2C.
This patch makes the start / stop / read and write byte work ok for IP V2.
This was not working before and does not seem to be widely used.
 2016-12-21 09:27:52 +01:00
Anna Bridge f2ce7ebb99 Merge pull request #3442 from LMESTM/dev_stm_i2c_f1 
Dev stm i2c f1
 2016-12-19 17:51:58 +00:00
Anna Bridge 9e03765d04 Merge pull request #3422 from szechyjs/disco_f303vc_can 
Enable CAN on DISCO_F303VC
 2016-12-19 17:37:48 +00:00
Anna Bridge d1aa6eea52 Merge pull request #3410 from jeromecoutant/PR_ST_L4_ASSERT 
STM32L4 : map ST HAL assert into MBED assert
 2016-12-19 17:33:13 +00:00
Anna Bridge a915fa86e4 Merge pull request #3390 from jeromecoutant/PR_ST_F3_ASSERT 
STM32F3 : map ST HAL assert into MBED assert
 2016-12-19 17:24:26 +00:00
Anna Bridge 42389c1420 Merge pull request #3389 from jeromecoutant/PR_ST_F2_ASSERT 
STM32F2 : map ST HAL assert into MBED assert
 2016-12-19 17:23:37 +00:00
Anna Bridge 89190fd794 Merge pull request #3381 from jeromecoutant/PR_ST_F1_ASSERT 
STM32F1 : map ST HAL assert into MBED assert
 2016-12-19 17:22:54 +00:00
Laurent MEUNIER 580d96431e STM32 I2C manage STOP specific case 
In case the user applicaiton makes a mixed usage of unitary function
(start, stop, byte write & read) with SYNC operation (write and read of
data buffers with start and stop management), we need to reset the
STM32 HAL state as it is by-passed by a direct call to STOP
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER 8406a99dc8 STM32 I2C: avoid timeout to be 0 
In continuation of previous IsDeviceReady case, let's
add 1 in case length is 0 (even though not recommended)
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER 37c94a03f0 STM I2C: manage Is Device Ready case 
Some device drivers use a data lenght of 0 to check if device is ready.
STM32 HAL provides a dedicated service for that, so let's use it.
 2016-12-16 08:54:39 +01:00
Laurent MEUNIER c0ca0a7e2c STM I2C - move i2c_read in SYNC part 
just change the place of code to have i2c_read and i2c_write together
 2016-12-16 08:54:39 +01:00
Sam Grove 19acef97ee Merge pull request #3429 from LMESTM/fix_stm_i2c_fix_init 
Fix stm i2c fix init
 2016-12-15 10:35:13 -06:00
Sam Grove 45fa92dcb3 Merge pull request #3427 from LMESTM/fix_stm_i2c_slave 
Fix stm i2c slave
 2016-12-15 10:33:06 -06:00
Sam Grove cf75543cfa Merge pull request #3424 from bcostm/fix_dma_f4 
STM32F4 - FIX to add the update of hdma->State variable
 2016-12-15 10:32:22 -06:00
Sam Grove 4524c5f917 Merge pull request #3411 from jeromecoutant/PR_ST_L0_ASSERT 
STM32L0 : map ST HAL assert into MBED assert
 2016-12-15 10:30:03 -06:00
Sam Grove 4c2b84a865 Merge pull request #3408 from jeromecoutant/PR_ST_F7_ASSERT 
STM32F7 : map ST HAL assert into MBED assert
 2016-12-15 10:29:34 -06:00
Sam Grove ea555e68a1 Merge pull request #3393 from andreaslarssonublox/ublox_fix_isr_reg_reeval 
ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4
 2016-12-15 10:28:30 -06:00
Sam Grove 0a40444b76 Merge pull request #3379 from jeromecoutant/PR_ST_F0_ASSERT 
STM32F0 : map ST HAL assert into MBED assert
 2016-12-15 10:25:09 -06:00
Sam Grove 38411e917f Merge pull request #3366 from bcostm/dev_nucleo_f412zg 
NUCLEO_F412ZG - Add new platform
 2016-12-15 10:19:51 -06:00
jeromecoutant e1f4d69109 STM32L0 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- ADC: a parameter setting was missing
- GPIO: mode was not allowed by ST HAL API
- tick: init value was too high for 16b
 2016-12-14 11:10:03 +01:00
jeromecoutant 2c5249b196 STM32L0 : refactor stm32l0xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-14 11:09:32 +01:00
jeromecoutant dd88e97e0b STM32F4 : correct ST HAL API call 
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
 2016-12-14 10:03:02 +01:00
Laurent MEUNIER 57eb4a0d1d STM32 F1: move F1 to I2C common code 
Now that F1 HAL has been updated to support required APIs,
the F1 family can also be moved to common code.
 2016-12-14 08:36:30 +01:00
Laurent MEUNIER e7cab5c8dc [STM32] HAL F1: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
 2016-12-14 08:35:32 +01:00
Laurent MEUNIER f88803b7fe STM32 F1 HAL V1.0.5 
This is a partial update of HAL drivers, especially for I2C driver update
 2016-12-14 08:35:12 +01:00
Sam Lin d4c18b0058 Use __HAL_CAN_CLEAR_FLAG macro clear TSR . 
Redress stm32f1xx_hal_can.h header file comment
 2016-12-14 08:42:55 +08:00
Jared Szechy f941960d1c
Add alternative CAN pins to DISCO_F303VC 2016-12-13 11:20:22 -05:00
Laurent MEUNIER 77e202f064 STM32 I2C: use higher IRQ priority for slave vs. master 2016-12-13 11:59:12 +01:00
Laurent MEUNIER 36a0365d2d STM32 I2C: differentiate HW reset and driver reset 
Make a distinct i2c_reset function as defined in MBED HAL api,
from the i2C_hw_reset which simply drives the HW reset signals
 2016-12-12 17:33:14 +01:00
Laurent MEUNIER 6cdac88a1c SMT32 I2C: initialize clock before configuring PINs 
This is needed especially for F1 family but can apply to all.
 2016-12-12 14:52:11 +01:00
Laurent MEUNIER ee9c8acbe4 STM32 I2C: Initialize hz parameter before reset 
The hz value is used to compute timeouts,
and timeout are used in reset function, so the parameter needs to be
initialized to its default value before being used.
 2016-12-12 14:48:43 +01:00
Laurent MEUNIER 9895bcf130 STM32 I2C: restore slave address in case of reset 2016-12-12 14:44:37 +01:00
bcostm fe73b43a0a FIX to add the update of hdma->State variable 2016-12-12 10:43:25 +01:00
Jared Szechy f5f3dc8143 Enable CAN on DISCO_F303VC 2016-12-11 22:03:29 -05:00
Brian Daniels 6085905658 Renames i2c_api.c for STM32F1 targets to fix IAR exporter. 
The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
 2016-12-09 12:47:17 -06:00
Martin Kojtal ce9d2526f8 Merge pull request #3409 from jeromecoutant/PR_ST_L1_ASSERT 
STM32L1 : map ST HAL assert into MBED assert
 2016-12-09 15:38:21 +01:00
Martin Kojtal e01366ce8f Merge pull request #3399 from bcostm/fix_issue_3266 
NUCLEO_F103RB - Add SERIAL_FC feature
 2016-12-09 15:37:57 +01:00
Martin Kojtal b13954c6b5 Merge pull request #3377 from LMESTM/fix_L152RE_Rcc_Config 
STM32 NUCLEO-L152RE Update system core clock to 32MHz
 2016-12-09 15:36:07 +01:00
Martin Kojtal a3e41f246e Merge pull request #3369 from adustm/disco_f469_newpins 
Add CAN2 missing pins for connector CN12
 2016-12-09 15:35:07 +01:00
Martin Kojtal 04f940de2d Merge pull request #3324 from LMESTM/dev_i2c_common_code 
Dev i2c common code
 2016-12-09 15:30:00 +01:00
jeromecoutant 4ea65df99d STM32F3 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 14:56:52 +01:00
jeromecoutant 008a12327c STM32F2 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 14:52:51 +01:00
jeromecoutant 0e404c2b48 STM32F1 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
 2016-12-09 14:48:26 +01:00
jeromecoutant 3734269326 STM32L4 : correct ST HAL API call 
- ll_utils: compilation issue
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 13:58:22 +01:00
jeromecoutant 3ab5dce41d STM32L1 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
 2016-12-09 11:32:08 +01:00
jeromecoutant db9dcb8b40 STM32F7 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 09:58:54 +01:00
jeromecoutant 6aef5333bd STM32F0 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- ADC: init parameter was not allowed by ST HAL API
- GPIO: mode was not allowed by ST HAL API
 2016-12-09 09:44:54 +01:00
Sam Lin b2f8de8294 Repair the Transmit mailbox (0,1,2) empty interrupt Flag not clear BUG 2016-12-09 10:44:28 +08:00
jeromecoutant 12d2795871 STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 17:03:25 +01:00
bcostm 88988b688b Add external declaration of PinMap_UART_RTS/CTS[] const tables 2016-12-08 16:43:26 +01:00
jeromecoutant 64e92a54de STM32L4 : refactor stm32l4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 16:15:47 +01:00
bcostm db8f966a2c Correct A3, A4, A5 pins definitions 2016-12-08 15:57:05 +01:00
bcostm 9ce9d1a9e7 Correct SDIO_UART pins configuration 2016-12-08 15:57:05 +01:00
bcostm 49755981dd Add this platform in mbed_rtx.h file 2016-12-08 15:57:05 +01:00
bcostm 5b2946ded9 Correct system clock configuration 2016-12-08 15:57:05 +01:00
bcostm 1796e8cd9a Update hal_tick files 2016-12-08 15:57:05 +01:00
bcostm 19828d8dd5 Add startup and linker files for ARM_STD, ARM_MICRO, IAR 2016-12-08 15:57:05 +01:00
bcostm 2ccbd27baf Add GCC_ARM files and fix errors during GCC build 2016-12-08 15:57:05 +01:00
bcostm f1c6b0f842 Add cmsis, hal_tick, system files 2016-12-08 15:57:05 +01:00
bcostm 3b1fb796c3 Add first pin, port and objects files 2016-12-08 15:57:05 +01:00
jeromecoutant 9dc5cd1266 STM32F7 : refactor stm32f7xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 15:54:38 +01:00
jeromecoutant fa8529dea3 STM32F4 : refactor stm32f4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-07 15:31:41 +01:00
jeromecoutant d30c34c5d1 STM32F3 : map ST HAL assert into MBED assert 2016-12-07 15:09:55 +01:00
jeromecoutant 06ffb4cf8a STM32F2 : map ST HAL assert into MBED assert 2016-12-07 14:52:24 +01:00
jeromecoutant f0156306ac STM32F0 : map ST HAL assert into MBED assert 2016-12-07 14:13:19 +01:00
jeromecoutant b606267641 STM32F1 : map ST HAL assert into MBED assert 2016-12-07 14:08:06 +01:00
andreas.larsson b5b3bede31 Added tmpisr = regs->ISR; at the end of the while loop to re-evaluate the ISR value 2016-12-07 12:22:31 +01:00
Laurent MEUNIER 8e11541a74 STM32 NUCLEO-L152RE Update system core clock to 32MHz 
Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz

And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz

This allows to take full benefit of the CPU capability.
 2016-12-06 11:45:19 +01:00
adustm 3fdbe85b00 Add CAN2 missing pins for connector CN12 2016-12-05 18:24:30 +01:00
Martin Kojtal bd499daae8 Merge pull request #3304 from jeromecoutant/PR_L476 
STM32L476: no HSE is present in NUCLEO and DISCO boards
 2016-12-02 15:48:38 +01:00
Martin Kojtal 1c2c121741 Merge pull request #3303 from adustm/stm_fix_interrupt_in 
Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor
 2016-12-02 15:47:50 +01:00
Laurent MEUNIER 29b32b84b3 STM32 I2C - 1MHZ frequency is allowed 
So make the assert to cover all possible values
Also assert applies only for I2C_IP_VERSION_V2.
Also in case of I2C_IP_VERSION_V1, the HAL makes the proper
checks and can dynamically scale the frequency in case of
intermediate value.
 2016-12-01 15:20:11 +01:00
bcostm 18dc6f4f81 Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions to make LPT tests pass. 2016-11-30 11:31:25 +01:00
jeromecoutant 448f501d4a STM32L476: comments update 2016-11-30 08:52:49 +01:00
jeromecoutant 757944ee24 STM32L476: no HSE is present in NUCLEO and DISCO boards 2016-11-30 08:51:18 +01:00
Laurent MEUNIER 3fad50287c [STM32] Make most of the I2C code into a common file 
Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.

The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.

F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive 
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER a0722b1086 [STM32] HAL F2: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 85a2f7ac49 [STM32] HAL L1: I2C fix btf / rxne cases 
This is an alignement to F4 HAL as the same IP is used.
Next official HAL delivery update hall will include the same alignement.
 2016-11-30 08:23:13 +01:00
Laurent MEUNIER 77364f9fe2 [STM32] HAL L0: I2C / DMA updates 
This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
 2016-11-30 08:23:13 +01:00
Martin Kojtal c57427f77f Merge pull request #3321 from jeromecoutant/PR_L432KC 
no HSE available by default for NUCLEO_L432KC
 2016-11-29 18:25:17 +01:00
Martin Kojtal 519b500d4c Merge pull request #3320 from bcostm/fix_vref_label 
STM32 - Add ADC_VREF label
 2016-11-29 18:24:52 +01:00
Martin Kojtal bd994b3f41 Merge pull request #3302 from bcostm/fix_issue_1685 
STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels
 2016-11-29 18:21:14 +01:00
Martin Kojtal a8ebfaa058 Merge pull request #3288 from LMESTM/dev_spi_asynch_l0l1 
Dev spi asynch l0l1
 2016-11-29 18:17:06 +01:00
Martin Kojtal bb2d03f34b Merge pull request #3213 from bcostm/factorize_ticker 
STM32: Refactor us_ticker.c + hal_tick.c files
 2016-11-29 18:10:45 +01:00
Martin Kojtal 93c08f340a Merge pull request #3062 from jamike/TARGET_STM_USBDEVICE_FS 
TARGET_STM :USB device FS
 2016-11-29 18:07:11 +01:00
jeromecoutant a933032a58 no HSE available by default for NUCLEO_L432KC 2016-11-24 11:33:43 +01:00
bcostm 92d39e2390 Add ADC_VREF label 2016-11-24 10:30:23 +01:00
andreas.larsson 9abb7c3777 Updated ARM binary 2016-11-23 17:39:28 +01:00
andreas.larsson 4648ec606b Added updated drivers for GCC, IAR 2016-11-23 15:18:17 +01:00
andreas.larsson c2d09bd6a2 Fixed wrong start params to cbMAIN_startWlan 2016-11-23 11:38:35 +01:00
bcostm a3baf2d7bf Add more comment on the modified line 2016-11-22 11:03:44 +01:00
adustm 0219b64af4 fix #2956. Add HAL_DeInit function if gpio_irq destructor 
This allows ci-test-shield tests-api-interruptin to pass
 2016-11-21 15:55:15 +01:00
bcostm 2ae748910b STM32F4 - Clear VBATE and TSVREFE bits before configuring ADC channels 2016-11-21 13:07:26 +01:00
Laurent MEUNIER e2613d5058 stm32 spi : IRQ handler light optimization 
This commit contains a few optimizations to get a better performance
in SPI Asynch mode
 2016-11-18 09:59:53 +01:00
Laurent MEUNIER 79af576051 stm32 spi - IRQ management 
Disable IRQ when transfer is finished.
Also clear pending IRQ after they have been disabled.
 2016-11-18 09:59:53 +01:00
Laurent MEUNIER 64a037cc8d STM32L0 - update spi HAL driver 
This is a temporary update waiting for the next official release
 2016-11-18 09:59:53 +01:00
Laurent MEUNIER 65db01f457 STM32L1 - update spi HAL driver 
This is a temporary update waiting for the next official release
 2016-11-18 09:59:53 +01:00
Laurent MEUNIER 7cdaba8474 [stm32] remove unused module member in spi_s struct 2016-11-18 09:59:53 +01:00
bcostm 6f12eca4a6 NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control 2016-11-17 10:15:21 +01:00
Martin Kojtal 6eb33e5f3c Merge pull request #3251 from LMESTM/dev_stm32l0_cube_v1.7.0 
Dev stm32l0 cube v1.7.0
 2016-11-16 17:43:16 +00:00
Martin Kojtal 5750f31d6d Merge pull request #3238 from LMESTM/dev_i2c_stm32f4hal 
Dev i2c stm32f4hal
 2016-11-16 17:42:12 +00:00
Sam Grove e875dbc90d Merge pull request #3237 from javierpedrido/master 
Added back USART 6 pins
 2016-11-14 21:46:59 -06:00
Sam Grove c131a27dcf Merge pull request #3231 from monkiineko/master 
STM32F3: DISCO_F303VC - Add missing UART and ADC pin muxing options
 2016-11-14 21:44:32 -06:00
bcostm da23ef135e Update license + date (same license as in mbed.h file) 2016-11-14 10:01:07 +01:00
bcostm 2006e458fd Typo corrections (functions declaration) 2016-11-14 09:56:54 +01:00
bcostm 777692cc16 Timer 16bit: Remove volatile variables. This solved many fails with MBED_24 test. 2016-11-14 09:31:14 +01:00
bcostm f8e18cdde4 Change TimMasterHandle variable declaration + typo corrections 2016-11-14 09:31:14 +01:00
bcostm cc24e5b7f9 Add initialization of timer instance in all functions 2016-11-14 09:31:14 +01:00
bcostm 6baec10d29 Rename files (remove stm_ prefix) 2016-11-14 09:31:14 +01:00
bcostm 589500642a STM32L0 - Add patch done previously on these devices. This solves MBED_24 test. 2016-11-14 09:31:14 +01:00
bcostm a2e686b82c Add volatile on one variable (alignment with 16bit file) 2016-11-14 09:31:14 +01:00
bcostm 896293d5be Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-11-14 09:31:14 +01:00
bcostm 3baaa7630b STM32L1 - Don't use RepetitionCounter field in timer init 2016-11-14 09:31:14 +01:00
bcostm 0524811c75 STM32xx - Remove hal_tick.c files and update hal_tick.h with new macro 2016-11-14 09:31:14 +01:00
bcostm ba8b33adc5 Minor changes 2016-11-14 09:31:14 +01:00
bcostm c3b8943f66 STM32L0 - Remove special treatment for reading the counter 2016-11-14 09:31:14 +01:00
bcostm ae858b4323 STM32F0/F1/L0 - Update TIM_MST_GET_PCLK_FREQ macro 2016-11-14 09:31:14 +01:00
bcostm 16239f5ed5 STM32L0 - Remove devices hal_tick.c files 2016-11-14 09:31:14 +01:00
bcostm 2488daf112 STM21L0 - Remove devices hal_tick.c file and update hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm a43e5b8a48 STM32F1 - Remove devices hal-tick files and update hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm 68915b7c27 STM32F0 - Add the timer type used (16b or 32b) + periph clock in hal_tick.h 2016-11-14 09:31:14 +01:00
bcostm 4c7176fc2f Replace all devices hal_tick files with a common 16b and 32b version 2016-11-14 09:31:14 +01:00
bcostm bb10409954 Replace all devices us_ticker files with a common 16b and 32b file 2016-11-14 09:31:14 +01:00
Laurent MEUNIER e293e07749 stm32f4 make comment more explicit 
As reported during review, this was not understandable as it is.
the get_i2c_obj allows to get a pointer to i2c_s struct from the
handle pointer. This therefore makes a hard-coded assumption
about the struct itself
 2016-11-10 17:30:04 +01:00
Laurent MEUNIER fa9d147f69 Update Serial following L0 HAL update 2016-11-10 11:03:46 +01:00
Laurent MEUNIER ab0a8ad508 STM32L0: Cube update V1.5.0 to v1.7.0 
Including HAL and CMSIS udpate
 2016-11-10 11:03:46 +01:00
Brian Daniels 52dc7c5423 Renames all prebuilt binaries to be prefixed with 'lib' 
This fixes an issue with make_iar, since IAR requires all libraries that
are linked to be prefixed with 'lib'.
 2016-11-09 11:08:01 -06:00
Laurent MEUNIER b491165eac [STM32F4] Add few prints for I2C debug 2016-11-09 18:03:04 +01:00
Laurent MEUNIER a65bacc032 [STM32F4] Master receive sequential - fix for HAL I2C 
in case of 2 consecutives calls to HAL_I2C_Master_Sequential_Receive_IT
with the Xfer mode I2C_FIRST_AND_LAST_FRAME, the second trasnfer does
not start at all.

It seems this is because the previous state is maintained as I2C_STATE_MASTER_BUSY_RX
and therefore the START condition will not be generated
 2016-11-09 18:03:02 +01:00
Laurent MEUNIER a50dc77c60 STM32: I2C: Change the master sync implementation to use ITs 
With this new implementation, as in slave implementaiton, we use the
interrupts instead of accessing to registers continuously.

This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
 2016-11-09 18:02:59 +01:00
Laurent MEUNIER ec95aa5701 STM32: I2C: Reset I2C in case of errors to recover 
This is to avoid an IP / bus deadlock.

This requires to store scl and sda in order to call the init function.
 2016-11-09 18:02:57 +01:00
Laurent MEUNIER 42d89b0665 STM32: I2C: Update Timeout computation 
The timeout values are based on for loops and therefore should depend
on the core frequency and the I2C interface frequency.

This patch introduces this computation and base the timeout on the time
it should take to send a byte over the I2C interface. When sending a
number of bytes, this value can also be used.

In the loops, the timeout should also be decreased before the while
condition so that its value is 0 in case the timeout elapsed and this
can be treated as an error.
 2016-11-09 18:02:54 +01:00
Laurent MEUNIER 79504a6a38 STM32: I2C: Change the slave API implementation to use ITs 
With this new implementation, the slave use the Interrupt
to be notified of a request from master, instead of
accessing to registers continuously.

This has 2 main advantages:
- this shall improve performances overall and allows for sleep
time in the future
- this also removes some direct registers access from this
layer of code and makes it more generic among families
 2016-11-09 17:22:28 +01:00
Laurent MEUNIER d71537bb00 STM32: I2C: use irq helper function 2016-11-09 17:22:28 +01:00
Laurent MEUNIER c2060e34a3 STM32: I2C: Add-up irq handlers 
With this commit we define I2C irq handlers that can be used by the driver
in sync mode. This also provides a mecanism for enabling and/or disabling
these handlers

Those handlers will be superseded by MBED ones in case of async mode usage.
 2016-11-09 17:22:28 +01:00
Laurent MEUNIER 490437ae29 STM32: I2C: Move up get_i2c_obj 
so that it can be used as well in sync mode
 2016-11-09 17:22:28 +01:00
Laurent MEUNIER 0bee69023c STM32: I2C: Don't use global init variables 
No need to store the init status of each IP.
Init can be called again in case we try to recover.
 2016-11-09 17:22:28 +01:00
Laurent MEUNIER 2b53dfc453 STM32: I2C: configure slave address with HAL API 
Instead of direct registers access, let's use HAL API.
This makes the code more generic accross STM32 families.
 2016-11-09 17:22:28 +01:00
javierpedrido b7882d6e9b Added back USART 6 pins 2016-11-09 12:14:35 -03:00
Michel Jaouen 182c311fbd TARGET_STM : USB FS STM HAL changes 2016-11-09 12:08:45 +01:00
Michel Jaouen 9c4e7173a5 DISCO_L476VG : align memory mapping with ARM 2016-11-09 12:08:41 +01:00
Michel Jaouen c2032c0442 DISCO_L476VG: modify clock for USB support 2016-11-09 12:08:36 +01:00
Bradley Scott 6d3f03c73d STM32F3: DISCO_F303VC - Add missing ADC pin muxing options 
Corrects the incorrect PA_5 ADC channel mapping, and removes the
non-existent PB_11 ADC channel mapping.
 2016-11-08 17:07:15 -05:00
Bradley Scott 130fddc467 STM32F3: DISCO_F303VC - Add missing UART pin muxing options 2016-11-08 17:04:21 -05:00
andreas.larsson 31a7cd017e Tab -> spaces 2016-11-07 21:59:27 +01:00
andreas.larsson baf519f4c5 Updated ublox ODIN-W2 binaries 2016-11-07 19:11:39 +01:00
Andreas Larsson fde39602b9 Fixed dynamic message queue for scan results 2016-11-07 15:52:59 +01:00
Andreas Larsson a4f09b5fdb Added cbMAIN_dispatchEventQueue 2016-11-07 15:52:58 +01:00
andreas.larsson 32dfe73b09 Added missing checks for wifi_link_out when allocating packets 2016-11-07 15:52:57 +01:00
andreas.larsson fd7c9cc13a Added copying of the wifi_link_out buffer since the buffer might change after call chain has ended. 2016-11-07 15:52:56 +01:00
Martin Kojtal 7eaf32baa0 Merge pull request #3075 from geky/nsapi-error-size-types-2 
nsapi - Add standardized return types for size and errors
 2016-11-07 11:13:40 +00:00
Christopher Haster b045c8ba00 nsapi - Adopted standardized return types in the Odin wifi interface 2016-11-02 15:37:34 -05:00
Mike Fiore 6cddb4df8b [MTS_MDOT_F411RE] add back SPI3 pins that shouldn't have been removed 2016-11-02 13:41:04 -05:00
Olaf Hagendorf 49fcc3b627 NUCLEO_F207ZG extending PeripheralPins.c: all available alternate functions can be used now 
Through some minor extensions it is now possible to use all available alternate functions of a specific gpio pin. These alternatives exist up to now only as commented lines in PeripheralPins.c.
An API change is not necessary for this new functionality, only several pin definitions.

The new definitions now looks like:

    {PA_0,            ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC1_IN0
    {PA_0_ALT0,  ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC2_IN0 // choice: PA_0 with ADC_1
    {PA_0_ALT1,  ADC_3, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)},  // ADC3_IN0 // choice: PA_0 with ADC_1

PA_0, PA_0_ALT0 or PA_0_ALT1 has to be used as pin names for the usage of the three possible ADC blocks (ADC1, ADC2, ADC3) connected to the pin (PA_0).
 2016-11-01 18:04:55 +01:00
Sam Grove 38a9c84bae Merge pull request #2988 from martinjaeger/master 
Update of can_api.c fixing #2987
 2016-11-01 10:02:37 -05:00
Martin Jäger eb95c14fa6 Fixing some typos 2016-10-30 16:49:49 +01:00
Martin Kojtal 4a4d09f6d1 Merge pull request #3074 from jamike/TARGET_STM_INIT_GCC_ALIGNEMENT 
Target STM - init gcc alignement
 2016-10-28 11:04:50 +02:00
Michel Jaouen 4a69072161 INIT:GCC add call to HAL_Init 
system_init, stops all on going timer.
gcc _start , perform zero initialized.
=> HAL_Init must be done again also in GCC toolchain
 2016-10-27 10:40:28 +02:00
Michel Jaouen b225a5ca97 STM32F1xx : GCC_ARM remove zero bss done at startup. 
Zero bss is done after the call to _start.
 2016-10-27 10:40:17 +02:00
Michel Jaouen 702f64a6f2 STM32F0xx: GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-27 10:40:02 +02:00
Michel Jaouen 9f20c4641d STM32F0xx : GCC_ARM use a call to _start which performs 
zero bss, C++ init and the call to main.
Remove direct call to __libc_init_array and main not needed
as _start is beeing called.
 2016-10-27 10:39:02 +02:00
Michel Jaouen af090e3e6e STM32L0xx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-27 10:38:56 +02:00
Michel Jaouen 479a1a2715 STM32L1xx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-27 10:38:52 +02:00
Michel Jaouen f3b1c0a0c8 STM32L1xx : GCC_ARM a call to _start which performs 
zero bss, C++ init and the call to main.
    Remove direct call to __libc_init_array and main not needed
    as _start is beeing called.
 2016-10-27 10:38:35 +02:00
Martin Kojtal da377aa5d8 Merge pull request #3121 from monkiineko/master 
STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH
 2016-10-27 10:12:13 +02:00
Michel Jaouen a711ff360b STM32F7xx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-26 14:42:47 +02:00
Michel Jaouen 93a0b9ce60 STM32L4xx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-26 14:42:24 +02:00
Michel Jaouen ee22d0a054 STM32F4xx: GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-26 14:41:45 +02:00
Martin Kojtal 7499177a5b Merge pull request #3076 from bcostm/fix_issue-2910_nucleo-f103rb 
STM32F1: Correct timer master value reading
 2016-10-26 13:55:29 +02:00
Bradley Scott 97eaed7b0a STM32F3: Eliminate two unused variable warnings 2016-10-25 10:59:19 -04:00
Bradley Scott 4f9bdf5ee0 STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH 2016-10-25 10:58:38 -04:00
Martin Kojtal 4d1d1c5b69 Merge pull request #3068 from MultiTechSystems/mdot-pin-updates 
MultiTech mDot - clean up PeripheralPins.c and add new pin names
 2016-10-25 10:47:59 +02:00
Martin Kojtal 5b67832959 Merge pull request #3054 from andreaslarssonublox/ublox_fix_odin_mbedtls_config 
Moved mbedtls config for u-blox ODIN-W2 to macros in target.json
 2016-10-20 10:59:05 +01:00
bcostm 8a570cce93 STM32F1: correct the read of timer master value 2016-10-19 16:46:51 +02:00
Michel Jaouen 26f3352f83 STM32F3xxx : GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call _start.
 2016-10-19 14:54:43 +02:00
Michel Jaouen 759837aff4 STM32F207: GCC_ARM remove zero bss, in startup. 
zero bss is done in libc init after call to _start.
 2016-10-19 14:54:41 +02:00
Sam Grove fc39f6b736 Merge pull request #3064 from c1728p9/f429_heap 
NUCLEO_F429 - Increase IAR heap size
 2016-10-19 05:51:20 -05:00
Sam Grove f1d678f8a4 Merge pull request #3056 from LMESTM/fix_stm32_pull_overwrite 
Fix stm32 pull overwrite
 2016-10-19 05:50:30 -05:00
Sam Grove 2ae71777aa Merge pull request #3013 from bcostm/check_adcintch_pins 
STM32xx - Change how the ADC internal pins are checked before pinmap_…
 2016-10-19 05:43:15 -05:00
Sam Grove 5eee95b7f5 Merge pull request #3008 from bcostm/fix_pwm_nucleo-f072rb 
NUCLEO_F072RB: Fix wrong timer channel number on pwm PB_5 pin
 2016-10-19 05:42:57 -05:00