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188 Commits (7095b82126b51ea4bde6df7760f694dd851a47b9)

Author SHA1 Message Date
Mahesh Mahadevan 9b48f3978a MIMXRT1050_EVK: Fix the GPIO IRQ number assignements 
Use the GPIO_Combined IRQ array

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-04 11:53:47 -05:00
Mahesh Mahadevan 34dab4a4d9 LPC546XX: Fix UART mux setting in the LPCXpresso board 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-02 15:16:57 -05:00
Mahesh Mahadevan 632892d355 MIMXRT1050: Update to EVK Rev B 
1. Add the IVT header to the binary as this is required for boot up
   This was earlier added by the DAPLink firmware. As it is no longer
   handled in DAPLink, the header needs to be added inside mbed.
2. Update drivers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-21 13:34:12 -05:00
canhkha c64971c100
Fix lpc43xx serial pin map compiling error 2018-06-20 13:59:48 +07:00
Cruz Monrreal 31df3d2865
Merge pull request #7242 from davidsaada/david_uniform_text_region 
Rename text region in ARM linker file for a few NXP CPUs
 2018-06-19 09:45:23 -05:00
Cruz Monrreal f2b72b9914
Merge pull request #7201 from codeauroraforum/Fix_ADC_LPC54628 
LPC54628: Update the ADC clock divider based on the input clock source
 2018-06-18 10:08:38 -05:00
David Saada 714d025f6c Rename text region in ARM linker file for a few NXP CPUs 2018-06-18 17:32:01 +03:00
Mahesh Mahadevan 8c6098229b LPC54628: Update the ADC clock divider based on the input clock source 
1. Problems were seen on the LPC54628 as the ADC clock source was too
   high
2. Moved the pin configuration to set Analog mode to the end of the
   function

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-12 12:57:31 -05:00
David Saada 9e5efbcfd5 Fix flash_program_page API in LPC boards. 
This API allocates a program buffer of 256 on the stack to ensure alignment.
However, FlashIAP driver already ensures this alignment of the user data.
 2018-06-12 15:09:05 +03:00
Wilfried Chauveau 1c7b91aa8c us_ticker is not yet initialised at this stage 2018-05-30 15:01:18 +01:00
Bartek Szatkowski a305d849a8 Rename LOWPOWERTIMER to LPTICKER 2018-05-25 13:06:56 -05:00
Mahesh Mahadevan f7c6e555f3 MCUXpresso: Enable RTC on LPC54114 and LPC546XX 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 13:03:46 -05:00
Mahesh Mahadevan fb622a2081 MIMXRT1050_EVK: Update lpticker implementation 
Use only the GPT module and avoid using RTC.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:33:41 -05:00
Mahesh Mahadevan 774de11d1f MCUXpresso: Enable usticker on MIMXRT1050_EVK 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:32:38 -05:00
Mahesh Mahadevan 659be61e4b MCUXpresso: Enable usticker for LPC546XX and LPC54114 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:32:38 -05:00
Mahesh Mahadevan 870600400d LPC1768: Enable usticker 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:30:53 -05:00
Bartek Szatkowski 6e9f04bf2f Rename DEVICE_LOWPOWERTIMER to DEVICE_LPTICKER 
That's to match DEVICE_USTICKER.
 2018-05-25 12:20:09 -05:00
Martin Kojtal b7682183b8 Sleep: add time requirements for sleep 
Sleep - within 10us
Deepsleep - within 10ms

Note about mbed boards with interface, moved to lpc176x, as they are target related,
should be documented in the target documentation.

The tests will come as separate PR, to conform to this updates to sleep API.
 2018-05-25 12:03:37 -05:00
Kevin Bracey 97b9980c8c LPC546XX: Correct Ethernet MAC address write 
Patch to LPC546XX SDK code - write the low Ethernet MAC address
register last, as that synchronises the update.

Without this change, the ENET_SetMacAddr call only seems to work prior
to MAC initialisation, causing problems for the new mbed OS EMAC system,
which expects it to be changable later.

Updated emac greentea tests #6851.
 2018-05-23 12:25:21 +03:00
Cruz Monrreal 4e1c04feba
Merge pull request #6734 from codeauroraforum/Fix_LPC54XXX_GPIO 
LPC54XXX: Set the pin function to Digital mode
 2018-04-26 20:17:07 -05:00
Mahesh Mahadevan 6513091173 LPC546XX: Add check for GPIO IRQ 
GPIO IRQ is available on pins for Ports 0 & 1. Add
a check to return error for other ports.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-24 14:26:20 -05:00
Mahesh Mahadevan 2670f790ce LPC546XX: Set the pin function to Digital mode 
We cannot rely on the default value as a pin could
be use for Analog purposes in which this bit is cleared

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-24 11:24:23 -05:00
Martin Kojtal cba28cc0ac
Merge pull request #6221 from codeauroraforum/Add_RNG_LPC54XXX 
LPC546XX: Add TRNG support
 2018-04-18 14:25:56 +02:00
Cruz Monrreal 1cc78f864c
Merge pull request #6647 from codeauroraforum/Fix_LPC54xxx_I2C 
Fix MCUXpresso LPC I2C driver
 2018-04-17 10:56:10 -05:00
Cruz Monrreal 7489401044
Merge pull request #6468 from codeauroraforum/Fix_DeepSleep_Implementation 
Fix deep sleep implementation
 2018-04-17 10:53:27 -05:00
Mahesh Mahadevan 6e9f99ca93 MCUXpresso: Fix LPC I2C driver for byte operations 
The ci-shield tests that manually generate the START, STOP
by calling the HAL functions were failing. The byte operation
HAL functions cannot use the MCUXpresso SDK driver API's.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-16 16:35:34 -05:00
Mahesh Mahadevan 69a950c6eb MCUXpresso: Fix SDK LPC driver 
Poll the Pending bit after START and STOP operations to ensure
operation completion.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-16 16:35:34 -05:00
Cruz Monrreal 4ff1a49d17
Merge pull request #6541 from jorisa/lpc11c24-spfix 
Add mbed-os 5 build support for LPC11C24
 2018-04-16 10:45:06 -05:00
Andreas Rebert 01d06a9f51 LPC4088: Fix hardfault occuring after power-cycle 
Since revision 5499db1 (mbed-os-5.6.0) a hardfault occurs after a power-cycle.
It doesn't occur after a reset when the application has been downloaded using
drag-and-drop or via debugger. This is probably the reason why this problem
isn't detected when testing new mbed releases.

The hardfault occured in hal_sleep(). Adding a __NOP after __WFI solves the
problem although I don't fully understand why.

- Revision ca661f9 is the last revision where the problem doesn't occur.
- The problem doesn't occur when compiling with GCC instead of ARM compiler
- This issue describes a similar, but not identical problem and led me to test adding a __NOP: https://github.com/ARMmbed/mbed-os/issues/5065
 2018-04-11 11:13:43 +02:00
Mahesh Mahadevan 9a1e749780 LPC546XX: Fix deepsleep implementation 
Add a check to return to 220MHz on LPC54628

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-10 08:16:41 -05:00
Joris Aerts f8a06640c1 Add mbed5 build support for LPC11C24 2018-04-03 16:45:16 +02:00
Mahesh Mahadevan 76c8a1bf7e LPC546XX: Add TRNG support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-30 14:12:39 -05:00
toyowata 3acdc81e6d Add alignment check in the flash_program_page 
* Add source address word alignment check
* malloc and memcpy are called only if data is unaligned
* malloc size is now copySize (program page size), rather than whole buffer to be written
 2018-03-27 23:04:26 +09:00
toyowata d76d511969 LPC176X: Fix flash program size 
This patch fix flash write issue when program size is more than page size (= 1024 bytes).  See detail - https://github.com/ARMmbed/mbed-os/issues/6165
Source data always use aligned data in heap memory.
 2018-03-21 18:36:16 +09:00
Cruz Monrreal 95fb33f041
Merge pull request #6198 from codeauroraforum/Add_LPC54XXX_Flash_Support 
Flash support: Add flash support for LPC54114 & LPC546XX
 2018-03-15 10:49:08 -05:00
Cruz Monrreal 5523d53f83
Merge pull request #6287 from codeauroraforum/Update_usticker 
MCUXpresso_MCUS: Apply K64F us_ticker fix across all MCU's
 2018-03-14 13:56:34 -05:00
Martin Kojtal 7917e12eb0 MIMXRT: define PullUp default value 
This target defines few PullUp values, one should be defined to be PullUp that
an application can use. We use the same value as PullDefault
 2018-03-12 09:21:24 +00:00
Mahesh Mahadevan 3f302961e1 Flash support: Add flash support for LPC54114 & LPC546XX 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-07 13:06:41 -06:00
Mahesh Mahadevan 7ed36e4986 MCUXpresso_MCUS: Apply K64F us_ticker fix across all MCU's 
Applied changes from commit b6a01de070
for other MCUXpresso MCUs

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-07 07:27:04 -06:00
gorazd c053b70a75 lpc546xx and lpc54114: fix clock 2018-02-28 13:23:38 +01:00
Mahesh Mahadevan eff848abea LPC546XX: Update SDK driver to version 2.3 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-23 07:31:13 -06:00
Mahesh Mahadevan 069c80b7a5 ff_lpc546xx: Add support for 220MHz core speed. 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-22 07:30:20 -06:00
Mahesh Mahadevan a9cd4705d8 LPC546XX: Add support for 220MHz core speed available on LPC54628 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-22 07:30:19 -06:00
Cruz Monrreal 964e6e74fb
Merge pull request #5826 from codeauroraforum/Add_iMXRT_Support 
NXP: Add support for MIMXRT1050_EVK
 2018-02-05 10:15:17 -06:00
Mahesh Mahadevan 060daa99c9 NXP: Add support for MIMXRT1050_EVK 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-01-26 07:46:43 -06:00
Serge Camille 63664e11b9
NXP LPC4088: Add missing SPI SSEL pin to Pinmap 
The Pin P5_3 (p31) was missing from the NXP LPC4088 SPI PinMap for SSEL.

Adding this Pin allows usage of SPISlave with SSP2 using the SSEL pin.

The pin and its SSP2_SSEL function is both documented in https://os.mbed.com/media/uploads/embeddedartists/lpc4088_qsb_pinning.xlsx as well as in UM10562 LPC408x/407x User manual Rev. 3 — 12 March 2014 chapter 7.4.1.4 Table 90 (https://www.nxp.com/docs/en/user-guide/UM10562.pdf).
 2018-01-24 13:29:43 +01:00
gorazd 676e56d6fe ff_lpc546xx: change led1 and led3 and p26 pins 2018-01-01 15:55:25 +01:00
gorazd f6283f5b03 ff_lpc546xx: add enet 
fsl_phy.c/.h move to ../drivers to reuse it
lwip: add hardware_init.c
 2018-01-01 15:55:24 +01:00
Martin Kojtal be52ba2156
Merge pull request #5363 from mprse/extended_rtc 
Add support and tests for extended RTC
 2017-12-12 17:36:44 +00:00
Przemyslaw Stekiel 106561669f Update RTC drivers for extended RTC. 2017-12-05 07:54:02 +01:00
Mahadevan Mahesh f2d2ed44cd LPC546XX: Add ENET support 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-11-28 16:18:36 +00:00
gorazd 5c2f2c3cff lpc546xx: remove obsolete line 2017-11-18 10:44:33 +01:00
gorazd 8411134184 lpc546xx: correct register name (DIGIMODE) 2017-11-17 19:16:42 +01:00
gorazd d62b47393e lpc546xx: fix adc 
Resolve #5304
 2017-11-17 13:54:25 +01:00
Martin Kojtal 494c25d71c
Merge pull request #5344 from gorazdko/add-new-target-L-TEK-FF-LPC546XX 
add new target L-Tek FF-LPC546XX
 2017-11-09 16:42:24 +00:00
Jimmy Brisson 02f1d0185a
Merge pull request #5320 from kegilbert/fix-build-warnings-lpc4088 
Fix ethernet API build warnings for LPC4088
 2017-10-30 10:08:15 -05:00
Kevin Gilbert 901157b305 Replace PACKED attribute on lpc4088 ethernet structs with MBED_PACKED. Placement of packed attribute was causing warnings due to following typedef 2017-10-26 11:34:48 -05:00
Anna Bridge 97e2d4a8c5 Merge pull request #5025 from grygorek/master 
LPC1769 port
 2017-10-26 11:35:35 +01:00
gorazd b010223145 add new target L-Tek FF-LPC546XX 2017-10-18 23:56:12 +02:00
Piotr Grygorczuk be5a8a98ee lpc1769 inherits from lpc1768; reuse lpc1768.ld for LPC1769 target 2017-10-17 11:12:59 +01:00
Jimmy Brisson a0b624b62e Merge pull request #5038 from chrissnow/LPC1768-Bootloader 
Lpc1768 bootloader support
 2017-10-05 11:11:08 -05:00
Chris Snow 82ae53a282 Simplify CRP placement. 2017-10-02 19:23:35 +01:00
Mahadevan Mahesh 880f106740 Change LPC54608 to LPC546XX to include support for LPC54608/18/28 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-10-02 11:20:27 -05:00
Piotr Grygorczuk 728a3a4a76 mbed LPC1768 & Xpresso LPC1769 unified 
Target of LPC1769 links to mbed LPC1768.
The PinNames.h has conditional compile for the pin names.
LWIP lpc17xx emac driver modified to allow LPC1769 target
 2017-10-02 11:05:39 +01:00
Chris Snow d6404726dd Ensure CRP is set correctly for IAR, GCC and ARM 
CRP value can be set through a macro in mbed_app such as
"macros": [
    "CRP=CRP_NONE"
]
 2017-09-30 19:26:05 +01:00
Chris Snow f8f54837cd Linker update for bootloader support 2017-09-30 19:00:25 +01:00
Chris Snow a08fc2bb7a Move CRP out of startup and into CRP.c so it can be conditionally compiled 2017-09-30 19:00:25 +01:00
Jimmy Brisson f5bb15f773 Merge pull request #5152 from NXPmicro/Update_RTC_HAL_driver 
Kinetis RTC HAL: Allow writing 0 to the seconds register
 2017-09-29 10:12:22 -05:00
Jimmy Brisson 3b224252ef Merge pull request #5141 from NXPmicro/Fix_LPC54608_LEDMap 
LPC54608: Swap LED pin connections to match naming on the board
 2017-09-29 10:12:04 -05:00
Jimmy Brisson 4f1cafd0b7 Merge pull request #5197 from c1728p9/fix_lpc54114 
Fix LPC54114 vector table size
 2017-09-27 09:01:44 -05:00
Russ Butler c32890294e Fix LPC54114 vector table size 
Correct the vector table size on the LPC54114. This fixes crashes
seen on boot when building with GCC.
 2017-09-25 18:49:38 -05:00
Martin Kojtal 9a191de5f9 LPC1768: flash_hal removal duplication 
IAP typedef duplication removal
 2017-09-25 19:18:18 +02:00
Martin Kojtal 6a6561028e LPC1768: flash erase/write require a critical section 
From RM:

32.3.2.6 Interrupts during IAP
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
The user should either disable interrupts, or ensure that user interrupt vectors are active in
RAM and that the interrupt handlers reside in RAM, before making a flash erase/write IAP
call. The IAP code does not use or disable interrupts.
 2017-09-25 19:18:06 +02:00
Martin Kojtal c623e889c0 LPC1768: RAM end adjust fix 
The topmost 32 bytes used by IAP functions, this was not included in the RAM
end previously.
 2017-09-25 13:50:54 +01:00
Chris Snow e2c42bb0a0 LPC1768 IAP Fix (#4993) 
use IAP routines for the flash HAL implementation
 2017-09-22 11:30:43 +01:00
Mahadevan Mahesh 1dadb055f7 RTC HAL: Allow writing 0 to the seconds register 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-09-21 13:33:07 -05:00
Mahadevan Mahesh 82a37b0eb1 LPC54608: Swap LED pin connections to match naming on the board 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-09-19 15:37:22 -05:00
Jimmy Brisson cd4fd86f1f Correct Freescale + NXP compiler detection macros 
Also removes duplication of common files
 2017-09-11 13:20:32 -05:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets 
remove duplicate sys.cpp
 2017-09-11 13:20:32 -05:00
Martin Kojtal bb26bd6d2d Revert "Adjusting Stack size Allocation (IAR, LPC176x)" 
This reverts commit fce2ca2122.
 2017-09-06 13:56:27 +01:00
Piotr Grygorczuk 9c77957798 LPCXpresso LPC1769 board ported 
The blinky example compiles and runs.
The board has a different eth phy component than mbed LPC1768. It requires a driver.
 2017-09-05 15:30:14 +01:00
Hasnain Virk fce2ca2122 Adjusting Stack size Allocation (IAR, LPC176x) 
Since mbed-os 5.4.3, something increased foot print of mbed-os and the applications that were barely fitting in started to spill.

IAR toolchain for LPC176x target family is set to use 2 RAM regions (32K each). RAM region
2 is being used for ETH/USB and 1 is being used for vector table, stack/heap/static data.

In this commit we have decreased heap size allocation from 8K to 7K so that the is more room for stack and static data.
 2017-09-04 14:54:42 +03:00
toyowata da7fa0dd2a [HAL LPC43xx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata 72e8241ee0 [HAL LPC408x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata cb9b2b0456 [HAL LPC13xx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata db2da2e932 [HAL LPC11xx_11Cxx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata aa334b0d3e [HAL LPC11Uxx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata fdc071d5e8 [HAL LPC11U6x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata 9ad17b21a2 [HAL LPC176x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
Martin Kojtal c8d43aeb2d LPC MCUXpresso: fix write_fill argument for block write function 
The latest HAL extension was not applied to the LPC MCUXpresso targets.
 2017-07-25 10:26:40 +01:00
Jimmy Brisson 1f94ede86c Merge pull request #4744 from deepikabhavnani/spi_issue_4743 
Allow user to set default transfer byte for block read
 2017-07-24 14:45:30 -05:00
Jimmy Brisson c20154234f Merge pull request #4756 from 0xc0170/fix_4613 
Fix #4613: remove duplicated startup files for MICRONFCBOARD
 2017-07-24 10:56:57 -05:00
Deepika 1b797e9081 Closed review comments 
1. Doxygen and Grammar related
2. Change dummy to spi_fill
3. Remove NXP driver and add default loop in spi block read (same as all
other drivers)
 2017-07-21 09:46:22 -05:00
Mahadevan Mahesh 316b859baf LPC: Move platform specific code out of the analog api file 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:16:06 -05:00
Mahadevan Mahesh 7d8b6d7684 LPC: Move platform specific code out of sleep api file 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:59 -05:00
Mahadevan Mahesh dfe2d3ba4c Add support for LPC54608 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:51 -05:00
Mahadevan Mahesh aee6f7b227 Add mbed support for LPCXpresso54114 board 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:36 -05:00
Martin Kojtal a7f9dc66b8 Fix #4613: remove duplicated startup files for MICRONFCBOARD 
Inherits from LPC11U34_421, that defines startup. They were identical.
 2017-07-13 17:03:29 +01:00
Martin Kojtal 10ea63b8e7 Ticker: add fire interrupt now function 
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.

set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.

It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.

The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)

All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
 2017-07-13 12:23:25 +01:00
Rob Meades fdf8a7980f Platform support for OnboardCellular modem and u-blox cellular interface drivers. This change allows the u-blox C027 and C030 boards to use both the mbed-os OnboardCellular modem driver and the u-blox cellular interface drivers (which support both PPP and AT data modes). 2017-06-15 14:32:09 +01:00