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51 Commits (3ae6d045ee053ddef6749adbaef9466e4b51a537)

Author SHA1 Message Date
Olaf Hagendorf 26e44eaa1b [NUCLEO_F446RE] Exchange linker script and startup file 2015-05-23 19:03:13 +02:00
ohagendorf 455b417b8f [NUCLEO_F446RE] create new target - part 2 
Update system_stm32f4xx to new version, generated by STM32CubeMX
Add target name to digital_loop test
Update coide export template
 2015-05-23 19:03:12 +02:00
ohagendorf 8edb20bed6 [NUCLEO_F446RE] create the new target 
Create the new target - mbed_blinky is runnning
 2015-05-23 19:03:11 +02:00
ohagendorf 03ff51f74a [STM32F4xx] update of STM32CubeF4 to version 1.5 - part 4 
Update of all files in target specific folders to new STM32CubeF4
version
 2015-04-26 01:52:07 +02:00
ohagendorf dbb04307e3 [STM32F4xx] update of STM32CubeF4 to version 1.5 - part 2 2015-04-26 01:47:43 +02:00
ohagendorf 2ad8ff1853 [STM32F4xx] update of STM32CubeF4 to version 1.5 - part 1 2015-04-26 01:46:31 +02:00
Martin Kojtal ecaaa712eb Merge pull request #1058 from neilt6/patch-1 
NUCLEO-F411RE USB clock frequency fix
 2015-04-23 08:21:49 +01:00
Giuliano Dianda f67632b347 STM32: Fix HSE/HSI clk source detection 
When using online compiler (Keil) SystemInit (and systick stuff) is call
before RW  data is initialized, so static and global variables contains
garbage. AHBPrescTable was one of these.
 2015-04-21 16:01:30 +02:00
Neil Thiessen f522ea7967 NUCLEO-F411RE USB clock frequency fix 
HAL: NUCLEO_F411RE - Corrected USB clock frequency

Modified the main PLL settings so that the USB clock will run at a proper 48MHz instead of 44.44MHz. Consequently, the core clock will now run at 96MHz instead of 100MHz.
 2015-04-20 12:28:47 -06:00
Mike Fiore 2d65b89b78 [mbed][MTS_DRAGONFLY_F411RE] update stack and heap size for Dragonfly in IAR 2015-03-25 11:41:49 -05:00
Mike Fiore b7e8c02ab4 [mbed][MTS_DRAGONFLY_F411RE] update IAR linker file for Dragonfly, larger stack and heap 2015-03-25 11:41:49 -05:00
Mike Fiore 2f56029f55 [mbed][MTS_DRAGONFLY_F411RE] correct vector table start address for IAR toolchain 2015-03-25 11:41:30 -05:00
Mike Fiore 6b1bf31865 [mbed][MTS_DRAGONFLY_F411RE] fix NVIC_FLASH_VECTOR_ADDRESS with custom VECT_TAB_OFFSET, allow for override of VECT_TAB_OFFSET 2015-03-25 11:41:30 -05:00
Jesse Gilles 6bd25a13d3 [mbed][MTS_MDOT_F411RE] cmsis_nvic.c: fix NVIC_FLASH_VECTOR_ADDRESS with custom VECT_TAB_OFFSET 2015-03-25 11:41:30 -05:00
Jesse Gilles bbe23beb6e [mbed][MTS_MDOT_F411RE] system_stm32f4xx.c: allow override of VECT_TAB_OFFSET 2015-03-25 11:41:30 -05:00
Jesse Gilles 90f6719b62 [mbed][MTS_MDOT_F411RE] preliminary bootloader+app support 2015-03-25 11:41:30 -05:00
vinnie rabbit 88f9d7eddf [mbed][MTS_DRAGONFLY_F411RE] added custom linker file for IAR toolchain 2015-03-25 11:41:29 -05:00
Mike Fiore 952cc7551b [mbed][MTS_DRAGONFLY_F411RE] update application offset to 64kB 2015-03-25 11:41:29 -05:00
Mike Fiore e5f05b8033 [mbed][MTS_DRAGONFLY_F411RE] preliminary support for dragonfly bootloader. 
changed linker files to put application at 32kB offset
added VECT_TAB_OFFSET define in targets.py so application runs properly after jump from bootloader
 2015-03-25 11:41:29 -05:00
GustavWi d8df2f25d3 Set most of the targets to a fixed heap and stack ratio relative to ram. 1/4 of ram to heap and 1/8 of ram to stack. There are some exception where the ram is small and the target support an rtos, then the heap requires more than 1/4 of RAM 2015-02-27 12:57:45 +01:00
GustavWi 35258ff16b IAR support: Fixed stack and heap sizes for MTS DRAGONFLY and MTS MDOT F411RE 2015-02-26 16:46:42 +01:00
mazgch c11f753afc comment fixed 2015-02-01 16:49:39 +01:00
mazgch f7b083a0b9 added new C029 target with STM32F439ZI 2015-02-01 16:38:06 +01:00
Martin Kojtal e1309e658a Merge pull request #811 from albert361/master 
Add IAR toolchain support for DISCO_F429ZI
 2015-01-05 07:57:36 +01:00
ohagendorf 43e6502f00 [DISCO_F401VC] new target incl. exporter to gcc_arm and coide 2015-01-02 19:09:41 +01:00
0xc0170 9af828a11f Merge branch 'master' of https://github.com/mfiore02/mbed into mfiore02-master 
Conflicts:
	workspace_tools/build_travis.py
 2015-01-02 07:12:11 +01:00
albert361 020faf70e6 Fix icf settings for head and stack size 2014-12-30 22:55:11 +08:00
albert361 21b2445fad Fix typo. 
1AB -> 1AF
 2014-12-24 11:18:35 +08:00
albert361 3fdeca703c Fix NVIC memory region and rtos verified 
1. Add NVIC region in icf file.
2. Increase STACK and HEAP size.
3. mBed rtos is verified.
 2014-12-24 11:16:26 +08:00
albert361 282c31f57e Add IAR toolchain support for DISCO_F429ZI 2014-12-23 14:41:20 +08:00
mazgch 992afded5c fix HAL_NULL, add more GPIO_CLK macros 2014-12-18 16:11:40 +01:00
ohagendorf 7eb385ec41 [DISCO_F429ZI] changed clock settings 
Correction of wrong comments.
 2014-12-15 22:37:37 +01:00
ohagendorf 2002b797ad [DISCO_F429ZI] changed clock settings 
Original STM32Cube F4 driver sets SYSCLK for STM32F429 to 16MHz. This
adds a 168MHz and 180MHz configuration to system_stm32f4xx.c generated
by STM32CubeMX code generator. The rtos clock configuration is changed
too. In singletest.py run everything is OK.
 2014-12-15 07:32:53 +01:00
ohagendorf 6f8f626bd6 [DISCO_F4xx][NUCLEO_F4xx][MDOT_F4] solving RTOS problem 
- Changing original STM Cube Driver to call _start instead of main to
initialise the rtos when using it. Without using rtos the behavior is
the same as before.
- Adding DISCO_F429 to rtos
- Adding targets to RTOS_xx tests.
- All tests are OK. Tested with Nucleo and Disco boards. Not tested with
MDOT_F4 but that uses the same hal like nucleo_f411.
 2014-12-13 22:50:02 +01:00
Mike Fiore ff0b8fce30 [cmsis][MTS_DRAGONFLY_F411RE] set USE_PLL_HSE_EXTC to 0, causing problems with IAR export and we have no external clock option 2014-12-11 13:20:45 -06:00
Mike Fiore 4b1ac52d91 [mbed][MTS_DRAGONFLY_F411RE] change wrong PLL members to correct values from ST Cube code 2014-12-11 13:20:45 -06:00
vincent rabbit 546005a72c [mbed][MTS_DRAGONFLY_F411RE] added platform support files and dirs built gcc executable NOT working 2014-12-11 13:20:45 -06:00
Martin Kojtal 2e1ba4df65 Merge pull request #777 from GustavWi/iar_mbed 
Targets: CMSIS - Fixed linker files for IAR (Ram size on one) and for the rest increased the heap...
 2014-12-10 08:49:10 +00:00
GustavWi 490dd0ddfe Fixed linker files (Ram size on one) and for the rest increased the heap and stack size 2014-12-09 18:37:01 +01:00
Michael Brudevold 2f5cbcb1c6 Add support for mDot with STM32F411RE processor 2014-12-08 10:58:25 -06:00
Olaf Hagendorf e0d3730a55 [STM_Targets] linker file naming principle 2014-11-26 16:13:37 +01:00
Olaf Hagendorf 80ddc6661d [DISCO_F4xx][NUCLEO_F4xx] linker and startup script reorganisation 2014-11-26 14:29:52 +01:00
Michael Brudevold ae8d818927 Rename mDot to mDot F405RG to allow for variation in processor 2014-11-12 16:21:13 -06:00
Michael Brudevold 3f5b4b39e2 Add support for uvision 2014-11-10 16:16:11 -06:00
Michael Brudevold ac7da3e5d8 Add support for GCC ARM 2014-11-10 16:16:06 -06:00
Michael Brudevold 5d6ee64bf1 Support for MTS MDOT 2014-11-10 16:15:53 -06:00
ohagendorf 24e3754428 [TARGET_STM32F4] new structure for F407 and F429 targets - part4 
Solves the problem NULL -> HAL_NULL for the additional hw blocks in the
larger mcus.

For F401 and F411 this was already solved in #596.
 2014-11-01 13:07:25 +01:00
ohagendorf e2b33c9bdd [TARGET_STM32F4] new structure for F407 and F429 targets -part1 
move specific files from old position into new target folders under
target_stm32f4
 2014-10-31 23:15:13 +01:00
bcostm 2fdc494f41 Put NUCLEO_F411RE specific files 2014-10-31 16:20:41 +01:00
bcostm 255460b8d6 Put NUCLEO_F401RE specific files 2014-10-31 16:19:59 +01:00