mirror of https://github.com/ARMmbed/mbed-os.git
[NUCLEO_F446RE] Exchange linker script and startup file
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455b417b8f
commit
26e44eaa1b
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@ -2,7 +2,7 @@
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MEMORY
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{
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FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
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RAM (rwx) : ORIGIN = 0x20000198, LENGTH = 128k - 0x198
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RAM (rwx) : ORIGIN = 0x200001C4, LENGTH = 128k - 0x1C4
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}
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/* Linker script to place sections and symbol values. Should be used together
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@ -1,10 +1,10 @@
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/**
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******************************************************************************
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* @file startup_stm32f411xe.s
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* @file startup_stm32f446xx.s
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* @author MCD Application Team
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* @version V2.3.0
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* @date 02-March-2015
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* @brief STM32F411xExx Devices vector table for Atollic TrueSTUDIO toolchain.
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* @brief STM32F446xx Devices vector table for Atollic TrueSTUDIO toolchain.
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* This module performs:
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* - Set the initial SP
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* - Set the initial PC == Reset_Handler,
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@ -77,7 +77,7 @@ defined in linker script */
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.weak Reset_Handler
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.type Reset_Handler, %function
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Reset_Handler:
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ldr sp, =_estack /* set stack pointer */
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ldr sp, =_estack /* set stack pointer */
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/* Copy the data segment initializers from flash to SRAM */
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movs r1, #0
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@ -143,10 +143,12 @@ Infinite_Loop:
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.section .isr_vector,"a",%progbits
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.type g_pfnVectors, %object
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.size g_pfnVectors, .-g_pfnVectors
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g_pfnVectors:
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.word _estack
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.word Reset_Handler
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.word NMI_Handler
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.word HardFault_Handler
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.word MemManage_Handler
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@ -182,10 +184,10 @@ g_pfnVectors:
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.word DMA1_Stream5_IRQHandler /* DMA1 Stream 5 */
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.word DMA1_Stream6_IRQHandler /* DMA1 Stream 6 */
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.word ADC_IRQHandler /* ADC1, ADC2 and ADC3s */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word CAN1_TX_IRQHandler /* CAN1 TX */
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.word CAN1_RX0_IRQHandler /* CAN1 RX0 */
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.word CAN1_RX1_IRQHandler /* CAN1 RX1 */
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.word CAN1_SCE_IRQHandler /* CAN1 SCE */
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.word EXTI9_5_IRQHandler /* External Line[9:5]s */
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.word TIM1_BRK_TIM9_IRQHandler /* TIM1 Break and TIM9 */
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.word TIM1_UP_TIM10_IRQHandler /* TIM1 Update and TIM10 */
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@ -202,34 +204,34 @@ g_pfnVectors:
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.word SPI2_IRQHandler /* SPI2 */
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.word USART1_IRQHandler /* USART1 */
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.word USART2_IRQHandler /* USART2 */
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.word 0 /* Reserved */
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.word USART3_IRQHandler /* USART3 */
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.word EXTI15_10_IRQHandler /* External Line[15:10]s */
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.word RTC_Alarm_IRQHandler /* RTC Alarm (A and B) through EXTI Line */
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.word OTG_FS_WKUP_IRQHandler /* USB OTG FS Wakeup through EXTI line */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word TIM8_BRK_TIM12_IRQHandler /* TIM8 Break and TIM12 */
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.word TIM8_UP_TIM13_IRQHandler /* TIM8 Update and TIM13 */
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.word TIM8_TRG_COM_TIM14_IRQHandler /* TIM8 Trigger and Commutation and TIM14 */
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.word TIM8_CC_IRQHandler /* TIM8 Capture Compare */
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.word DMA1_Stream7_IRQHandler /* DMA1 Stream7 */
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.word 0 /* Reserved */
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.word FMC_IRQHandler /* FMC */
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.word SDIO_IRQHandler /* SDIO */
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.word TIM5_IRQHandler /* TIM5 */
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.word SPI3_IRQHandler /* SPI3 */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word UART4_IRQHandler /* UART4 */
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.word UART5_IRQHandler /* UART5 */
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.word TIM6_DAC_IRQHandler /* TIM6 and DAC1&2 underrun errors */
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.word TIM7_IRQHandler /* TIM7 */
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.word DMA2_Stream0_IRQHandler /* DMA2 Stream 0 */
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.word DMA2_Stream1_IRQHandler /* DMA2 Stream 1 */
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.word DMA2_Stream2_IRQHandler /* DMA2 Stream 2 */
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.word DMA2_Stream3_IRQHandler /* DMA2 Stream 3 */
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.word DMA2_Stream4_IRQHandler /* DMA2 Stream 4 */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word CAN2_TX_IRQHandler /* CAN2 TX */
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.word CAN2_RX0_IRQHandler /* CAN2 RX0 */
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.word CAN2_RX1_IRQHandler /* CAN2 RX1 */
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.word CAN2_SCE_IRQHandler /* CAN2 SCE */
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.word OTG_FS_IRQHandler /* USB OTG FS */
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.word DMA2_Stream5_IRQHandler /* DMA2 Stream 5 */
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.word DMA2_Stream6_IRQHandler /* DMA2 Stream 6 */
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@ -237,19 +239,30 @@ g_pfnVectors:
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.word USART6_IRQHandler /* USART6 */
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.word I2C3_EV_IRQHandler /* I2C3 event */
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.word I2C3_ER_IRQHandler /* I2C3 error */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word OTG_HS_EP1_OUT_IRQHandler /* USB OTG HS End Point 1 Out */
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.word OTG_HS_EP1_IN_IRQHandler /* USB OTG HS End Point 1 In */
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.word OTG_HS_WKUP_IRQHandler /* USB OTG HS Wakeup through EXTI */
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.word OTG_HS_IRQHandler /* USB OTG HS */
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.word DCMI_IRQHandler /* DCMI */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word FPU_IRQHandler /* FPU */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word SPI4_IRQHandler /* SPI4 */
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.word SPI5_IRQHandler /* SPI5 */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word SAI1_IRQHandler /* SAI1 */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word 0 /* Reserved */
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.word SAI2_IRQHandler /* SAI2 */
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.word QuadSPI_IRQHandler /* QuadSPI */
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.word CEC_IRQHandler /* CEC */
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.word SPDIF_RX_IRQHandler /* SPDIF RX */
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.word FMPI2C1_Event_IRQHandler /* FMPI2C 1 Event */
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.word FMPI2C1_Error_IRQHandler /* FMPI2C 1 Error */
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/*******************************************************************************
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*
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* Provide weak aliases for each Exception handler to the Default_Handler.
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@ -340,6 +353,18 @@ g_pfnVectors:
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.weak ADC_IRQHandler
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.thumb_set ADC_IRQHandler,Default_Handler
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.weak CAN1_TX_IRQHandler
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.thumb_set CAN1_TX_IRQHandler,Default_Handler
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.weak CAN1_RX0_IRQHandler
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.thumb_set CAN1_RX0_IRQHandler,Default_Handler
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.weak CAN1_RX1_IRQHandler
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.thumb_set CAN1_RX1_IRQHandler,Default_Handler
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.weak CAN1_SCE_IRQHandler
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.thumb_set CAN1_SCE_IRQHandler,Default_Handler
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.weak EXTI9_5_IRQHandler
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.thumb_set EXTI9_5_IRQHandler,Default_Handler
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@ -349,7 +374,7 @@ g_pfnVectors:
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.weak TIM1_UP_TIM10_IRQHandler
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.thumb_set TIM1_UP_TIM10_IRQHandler,Default_Handler
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.weak TIM1_TRG_COM_TIM11_IRQHandler
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.thumb_set TIM1_TRG_COM_TIM11_IRQHandler,Default_Handler
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@ -388,7 +413,10 @@ g_pfnVectors:
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.weak USART2_IRQHandler
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.thumb_set USART2_IRQHandler,Default_Handler
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.weak USART3_IRQHandler
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.thumb_set USART3_IRQHandler,Default_Handler
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.weak EXTI15_10_IRQHandler
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.thumb_set EXTI15_10_IRQHandler,Default_Handler
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@ -398,9 +426,24 @@ g_pfnVectors:
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.weak OTG_FS_WKUP_IRQHandler
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.thumb_set OTG_FS_WKUP_IRQHandler,Default_Handler
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.weak TIM8_BRK_TIM12_IRQHandler
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.thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
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.weak TIM8_UP_TIM13_IRQHandler
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.thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
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.weak TIM8_TRG_COM_TIM14_IRQHandler
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.thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
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.weak TIM8_CC_IRQHandler
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.thumb_set TIM8_CC_IRQHandler,Default_Handler
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.weak DMA1_Stream7_IRQHandler
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.thumb_set DMA1_Stream7_IRQHandler,Default_Handler
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.weak FMC_IRQHandler
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.thumb_set FMC_IRQHandler,Default_Handler
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.weak SDIO_IRQHandler
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.thumb_set SDIO_IRQHandler,Default_Handler
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@ -410,6 +453,18 @@ g_pfnVectors:
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.weak SPI3_IRQHandler
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.thumb_set SPI3_IRQHandler,Default_Handler
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.weak UART4_IRQHandler
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.thumb_set UART4_IRQHandler,Default_Handler
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.weak UART5_IRQHandler
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.thumb_set UART5_IRQHandler,Default_Handler
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.weak TIM6_DAC_IRQHandler
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.thumb_set TIM6_DAC_IRQHandler,Default_Handler
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.weak TIM7_IRQHandler
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.thumb_set TIM7_IRQHandler,Default_Handler
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.weak DMA2_Stream0_IRQHandler
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.thumb_set DMA2_Stream0_IRQHandler,Default_Handler
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@ -424,7 +479,19 @@ g_pfnVectors:
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.weak DMA2_Stream4_IRQHandler
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.thumb_set DMA2_Stream4_IRQHandler,Default_Handler
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.weak CAN2_TX_IRQHandler
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.thumb_set CAN2_TX_IRQHandler,Default_Handler
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.weak CAN2_RX0_IRQHandler
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.thumb_set CAN2_RX0_IRQHandler,Default_Handler
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.weak CAN2_RX1_IRQHandler
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.thumb_set CAN2_RX1_IRQHandler,Default_Handler
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.weak CAN2_SCE_IRQHandler
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.thumb_set CAN2_SCE_IRQHandler,Default_Handler
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.weak OTG_FS_IRQHandler
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.thumb_set OTG_FS_IRQHandler,Default_Handler
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@ -446,14 +513,47 @@ g_pfnVectors:
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.weak I2C3_ER_IRQHandler
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.thumb_set I2C3_ER_IRQHandler,Default_Handler
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.weak OTG_HS_EP1_OUT_IRQHandler
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.thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
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.weak OTG_HS_EP1_IN_IRQHandler
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.thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
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.weak OTG_HS_WKUP_IRQHandler
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.thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
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.weak OTG_HS_IRQHandler
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.thumb_set OTG_HS_IRQHandler,Default_Handler
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.weak DCMI_IRQHandler
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.thumb_set DCMI_IRQHandler,Default_Handler
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.weak FPU_IRQHandler
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.thumb_set FPU_IRQHandler,Default_Handler
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.weak SPI4_IRQHandler
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.weak SPI4_IRQHandler
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.thumb_set SPI4_IRQHandler,Default_Handler
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.weak SPI5_IRQHandler
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.thumb_set SPI5_IRQHandler,Default_Handler
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.weak SAI1_IRQHandler
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.thumb_set SAI1_IRQHandler,Default_Handler
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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.weak SAI2_IRQHandler
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.thumb_set SAI2_IRQHandler,Default_Handler
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.weak QuadSPI_IRQHandler
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.thumb_set QuadSPI_IRQHandler,Default_Handler
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.weak CEC_IRQHandler
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.thumb_set CEC_IRQHandler,Default_Handler
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.weak SPDIF_RX_IRQHandler
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.thumb_set SPDIF_RX_IRQHandler,Default_Handler
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.weak FMPI2C1_Event_IRQHandler
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.thumb_set FMPI2C1_Event_IRQHandler,Default_Handler
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.weak FMPI2C1_Error_IRQHandler
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.thumb_set FMPI2C1_Error_IRQHandler,Default_Handler
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/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
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