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[TARGET_STM32F4] new structure for F407 and F429 targets - part4 

Solves the problem NULL -> HAL_NULL for the additional hw blocks in the
larger mcus.

For F401 and F411 this was already solved in #596.
pull/639/head
ohagendorf 2014-11-01 13:07:25 +01:00
parent fd835e6c93
commit 24e3754428
13 changed files with 32 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_can.c
View File

@ -157,7 +157,7 @@ HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan)
uint32_t tickstart = 0;
/* Check CAN handle */
if(hcan == NULL)
if(hcan == HAL_NULL)
{
return HAL_ERROR;
}
@ -444,7 +444,7 @@ HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTy
HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan)
{
/* Check CAN handle */
if(hcan == NULL)
if(hcan == HAL_NULL)
{
return HAL_ERROR;
}

4
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dac.c
View File

@ -224,7 +224,7 @@ static void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
{
/* Check DAC handle */
if(hdac == NULL)
if(hdac == HAL_NULL)
{
return HAL_ERROR;
}
@ -259,7 +259,7 @@ HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac)
HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac)
{
/* Check DAC handle */
if(hdac == NULL)
if(hdac == HAL_NULL)
{
return HAL_ERROR;
}

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dcmi.c
View File

@ -144,7 +144,7 @@ static void DCMI_DMAError(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DCMI_Init(DCMI_HandleTypeDef *hdcmi)
{
/* Check the DCMI peripheral state */
if(hdcmi == NULL)
if(hdcmi == HAL_NULL)
{
return HAL_ERROR;
}

10
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_dma2d.c
View File

@ -171,7 +171,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
uint32_t tmp = 0;
/* Check the DMA2D peripheral state */
if(hdma2d == NULL)
if(hdma2d == HAL_NULL)
{
return HAL_ERROR;
}
@ -250,7 +250,7 @@ HAL_StatusTypeDef HAL_DMA2D_Init(DMA2D_HandleTypeDef *hdma2d)
HAL_StatusTypeDef HAL_DMA2D_DeInit(DMA2D_HandleTypeDef *hdma2d)
{
/* Check the DMA2D peripheral state */
if(hdma2d == NULL)
if(hdma2d == HAL_NULL)
{
return HAL_ERROR;
}
@ -721,7 +721,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
/* Process Unlocked */
__HAL_UNLOCK(hdma2d);
if(hdma2d->XferErrorCallback != NULL)
if(hdma2d->XferErrorCallback != HAL_NULL)
{
/* Transfer error Callback */
hdma2d->XferErrorCallback(hdma2d);
@ -748,7 +748,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
/* Process Unlocked */
__HAL_UNLOCK(hdma2d);
if(hdma2d->XferErrorCallback != NULL)
if(hdma2d->XferErrorCallback != HAL_NULL)
{
/* Transfer error Callback */
hdma2d->XferErrorCallback(hdma2d);
@ -775,7 +775,7 @@ void HAL_DMA2D_IRQHandler(DMA2D_HandleTypeDef *hdma2d)
/* Process Unlocked */
__HAL_UNLOCK(hdma2d);
if(hdma2d->XferCpltCallback != NULL)
if(hdma2d->XferCpltCallback != HAL_NULL)
{
/* Transfer complete Callback */
hdma2d->XferCpltCallback(hdma2d);

6
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_eth.c
View File

@ -167,7 +167,7 @@ HAL_StatusTypeDef HAL_ETH_Init(ETH_HandleTypeDef *heth)
uint32_t err = ETH_SUCCESS;
/* Check the ETH peripheral state */
if(heth == NULL)
if(heth == HAL_NULL)
{
return HAL_ERROR;
}
@ -792,7 +792,7 @@ HAL_StatusTypeDef HAL_ETH_GetReceivedFrame(ETH_HandleTypeDef *heth)
else if((heth->RxDesc->Status & ETH_DMARXDESC_FS) != (uint32_t)RESET)
{
(heth->RxFrameInfos).FSRxDesc = heth->RxDesc;
(heth->RxFrameInfos).LSRxDesc = NULL;
(heth->RxFrameInfos).LSRxDesc = HAL_NULL;
(heth->RxFrameInfos).SegCount = 1;
/* Point to next descriptor */
heth->RxDesc = (ETH_DMADescTypeDef*) (heth->RxDesc->Buffer2NextDescAddr);
@ -1268,7 +1268,7 @@ HAL_StatusTypeDef HAL_ETH_ConfigMAC(ETH_HandleTypeDef *heth, ETH_MACInitTypeDef
assert_param(IS_ETH_SPEED(heth->Init.Speed));
assert_param(IS_ETH_DUPLEX_MODE(heth->Init.DuplexMode));
if (macconf != NULL)
if (macconf != HAL_NULL)
{
/* Check the parameters */
assert_param(IS_ETH_WATCHDOG(macconf->Watchdog));

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_ltdc.c
View File

@ -150,7 +150,7 @@ HAL_StatusTypeDef HAL_LTDC_Init(LTDC_HandleTypeDef *hltdc)
uint32_t tmp = 0, tmp1 = 0;
/* Check the LTDC peripheral state */
if(hltdc == NULL)
if(hltdc == HAL_NULL)
{
return HAL_ERROR;
}

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nand.c
View File

@ -134,7 +134,7 @@
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing)
{
/* Check the NAND handle state */
if(hnand == NULL)
if(hnand == HAL_NULL)
{
return HAL_ERROR;
}

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_nor.c
View File

@ -134,7 +134,7 @@
HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
{
/* Check the NOR handle parameter */
if(hnor == NULL)
if(hnor == HAL_NULL)
{
return HAL_ERROR;
}

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pccard.c
View File

@ -126,7 +126,7 @@
HAL_StatusTypeDef HAL_PCCARD_Init(PCCARD_HandleTypeDef *hpccard, FMC_NAND_PCC_TimingTypeDef *ComSpaceTiming, FMC_NAND_PCC_TimingTypeDef *AttSpaceTiming, FMC_NAND_PCC_TimingTypeDef *IOSpaceTiming)
{
/* Check the PCCARD controller state */
if(hpccard == NULL)
if(hpccard == HAL_NULL)
{
return HAL_ERROR;
}

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_rng.c
View File

@ -112,7 +112,7 @@
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng)
{
/* Check the RNG handle allocation */
if(hrng == NULL)
if(hrng == HAL_NULL)
{
return HAL_ERROR;
}

24
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sai.c
View File

@ -238,7 +238,7 @@ HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai)
uint32_t saiclocksource = 0;
/* Check the SAI handle allocation */
if(hsai == NULL)
if(hsai == HAL_NULL)
{
return HAL_ERROR;
}
@ -462,7 +462,7 @@ HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai)
HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai)
{
/* Check the SAI handle allocation */
if(hsai == NULL)
if(hsai == HAL_NULL)
{
return HAL_ERROR;
}
@ -572,7 +572,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint16_t* pData, uin
{
uint32_t tickstart = 0;
if((pData == NULL ) || (Size == 0))
if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@ -647,7 +647,7 @@ HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint16_t *pData, uint
{
uint32_t tickstart = 0;
if((pData == NULL ) || (Size == 0))
if((pData == HAL_NULL ) || (Size == 0))
{
return HAL_ERROR;
}
@ -723,7 +723,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint16_t *pData,
{
if(hsai->State == HAL_SAI_STATE_READY)
{
if((pData == NULL) || (Size == 0))
if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@ -801,7 +801,7 @@ HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint16_t *pData, u
{
if(hsai->State == HAL_SAI_STATE_READY)
{
if((pData == NULL) || (Size == 0))
if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@ -925,12 +925,12 @@ HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai)
hsai->Instance->CR1 &= ~SAI_xCR1_DMAEN;
/* Abort the SAI DMA Tx Stream */
if(hsai->hdmatx != NULL)
if(hsai->hdmatx != HAL_NULL)
{
HAL_DMA_Abort(hsai->hdmatx);
}
/* Abort the SAI DMA Rx Stream */
if(hsai->hdmarx != NULL)
if(hsai->hdmarx != HAL_NULL)
{
HAL_DMA_Abort(hsai->hdmarx);
}
@ -957,7 +957,7 @@ HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData,
{
uint32_t *tmp;
if((pData == NULL) || (Size == 0))
if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@ -1019,7 +1019,7 @@ HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint16_t *pData,
{
uint32_t *tmp;
if((pData == NULL) || (Size == 0))
if((pData == HAL_NULL) || (Size == 0))
{
return HAL_ERROR;
}
@ -1086,7 +1086,7 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai)
/* SAI in mode Receiver --------------------------------------------------*/
if((tmp1 != RESET) && (tmp2 != RESET))
{
HAL_SAI_Receive_IT(hsai, NULL, 0);
HAL_SAI_Receive_IT(hsai, HAL_NULL, 0);
}
tmp1 = __HAL_SAI_GET_FLAG(hsai, SAI_FLAG_OVRUDR);
@ -1112,7 +1112,7 @@ void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai)
/* SAI in mode Transmitter -----------------------------------------------*/
if((tmp1 != RESET) && (tmp2 != RESET))
{
HAL_SAI_Transmit_IT(hsai, NULL, 0);
HAL_SAI_Transmit_IT(hsai, HAL_NULL, 0);
}
tmp1 = __HAL_SAI_GET_FLAG(hsai, SAI_FLAG_OVRUDR);

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.c
View File

@ -141,7 +141,7 @@
HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
{
/* Check the SDRAM handle parameter */
if(hsdram == NULL)
if(hsdram == HAL_NULL)
{
return HAL_ERROR;
}

2
libraries/mbed/targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.c
View File

@ -143,7 +143,7 @@
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming)
{
/* Check the SRAM handle parameter */
if(hsram == NULL)
if(hsram == HAL_NULL)
{
return HAL_ERROR;
}