For the application(firmware) booted by bootloader(OTA),
the image doesn't need the "flash_config" and "ivt" header.
So update the link file to support both kinds of application
(firmware) booted by bootROM and bootloader.
In default, the compilation will get the image with
"flash_config" and "ivt" header, for example the bootloader
compiling.
When compiling the OTA application image, please add the
line as below in the mbed_app.json file.
"target.macros_add" : ["MBED_APP_COMPILE"]
This will remove the "flash_config" and "ivt" header in the
final image.
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
Update the flash driver to support both Hyper Flash
and QSPI Flash.
In addition, the static function cannot be linked to
SRAM even defined by AT_QUICKACCESS_SECTION_CODE macro.
So remove all "static" modifier for the FLASHIAP
functions.
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
The memset function from c library will be linked in flash
space, it's risk for FLASHIAP. So I wrote flexspi_memset
to replace the memset for IMX FLASHIAP, and put the function
into targets/.../TARGET_IMX/flash_api.c file. All IMX Soc
platforms can declare it as extern and use in their Soc
flexspi driver files.
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
The flash access may fail when implementing flash
initialization. So there is risk for interrupt handler
which linked in flash space.
Add the critical section to avoid the risk.
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
NXP MIMXRT1050 EVK can support Hyper Flash or QSPI Flash with
small hardware reworks. Modify the XIP file to support boot
from the two kinds of Flash device. The Hyper Flash should be
the default device and defined in tartgets.json with the macro
"HYPERFLASH_BOOT". To select the QSPI Flash, just remove the
macro with the below line in any overriding json file.
"target.macros_remove" : ["HYPERFLASH_BOOT"]
Signed-off-by: Gavin Liu <gang.liu@nxp.com>
Static pinmap extension required to use pin_function() and pin_mode() functions instead of pinmap_pinout(). Unfortunatelly pin_function() does not allow passing NC pin.
Call pin_function() and pin_mode() only if MISO/MOSI pin is not NC.
Remove an obsolete HAL implementation from LPC408X to fix the GCC_ARM
build with the "-flto" flag.
With the lto enabled, unreferenced buffers defined in ethernet_api.c
were not excluded at link time overflowing the 16kB peripheral SRAM1
(ld error: "section '.AHBSRAM1' will not fit in region 'ETH_RAM'").
The Ethernet HAL API is deprecated in favor of EMAC.
1. Do not disable and enable osillators during deep sleep
entry and exit
2. Increase the deep sleep to pass tests
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add a "used" attribute to hyperflash_config/image_vector_table to fix ARMC6 build with
the "-flto" flag.
(Error: L6236E: No section matches selector - no section to be FIRST/LAST. )
This attribute, attached to a function/variable, means that code must be emitted
for the function even if it appears that the function is not referenced.
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
The SDK header provides separate arrays for high and low
GPIO interrupts in place of the previous combined array
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. No need to copy RAM functions, this is done in the startup file
2. Update memory config for the FLASH section
3. Configure the PMIC_STDBY pin
4. Update UART clock setting
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
As the `psa` library is not included in the baremetal profile, perform
a TFM system reset only if the `psa` library is included in
the build otherwise perform a normal CMSIS system reset.
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.
Looking into this, a number of other issues were highlighted
* Almost all targets had `__initial_sp` hardcoded in assembler,
rather than getting it from the scatter file. This was behind
issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
file layout, in some cases meaning they were overlapping heap
space. They now all use the area reserved in the scatter file.
If any problems are seen, then there is an error in the
scatter file.
* A number of targets were reserving unneeded space for heap and
stack in their startup assembler, on top of the space reserved in
the scatter file, so wasting a few K. A couple were using that
space for the stack, rather than the space in the scatter file.
To clarify expected behaviour:
* Each scatter file contains empty regions `ARM_LIB_HEAP` and
`ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
`ARM_LIB_HEAP` is generally the space left over after static
RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
for the ARM library. The ARM library calls this during startup, and
it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
modify SP, so we remain on the boot stack, and the heap is set to
the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
exist, then the heap is the space from the end of the used data in
`RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
itself.
We should not block in case the UART is busy transmitting. The
API has been updated to check the status of all UART's and return
1 in case any of them is busy transmitting.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The code checks if any of the UART's is still transmitting.
If so then prevent from entering deepsleep
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Use the updated API's provided by the SMC driver
2. Wait till debug UART has finished transmitting data
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Update to handle 12-bit resolution
2. Properly handle the pin configuration
3. Update the pin setup to handle the ADC B channel
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The IRQ disable was always disabling both rising
and falling edges of the interrupt thereby causing
failures in cases when one of the two should stay enabled.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Yoshihiro TSUBOI
Rajkumar Kanagaraj
Gavin Liu
Martin Kojtal
mudassar-ublox
Przemyslaw Stekiel
Filip Jagodzinski
Mahesh Mahadevan
Hugues Kamba
Maciej Bocianski
Pawel Zarembski
Tymoteusz Bloch
Antti Kauppila
toyowata
Qinghao Shi
Kevin Bracey
int_szyk
Jaeden Amero
Chris Snow
David Rauschenbach
Seppo Takalo