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MXRT: Update GPIO IRQ hal driver 

The SDK header provides separate arrays for high and low
GPIO interrupts in place of the previous combined array

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
pull/12095/head
Mahesh Mahadevan 2019-10-24 13:37:59 -05:00
parent c538919254
commit 4efbe621e2
1 changed files with 17 additions and 10 deletions
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27
targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_IMX/gpio_irq_api.c
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@ -38,7 +38,8 @@ static gpio_irq_handler irq_handler;
static GPIO_Type * const gpio_addrs[] = GPIO_BASE_PTRS;
/* Array of PORT IRQ number. */
static const IRQn_Type gpio_irqs[] = GPIO_COMBINED_IRQS;
static const IRQn_Type gpio_low_irqs[] = GPIO_COMBINED_LOW_IRQS;
static const IRQn_Type gpio_high_irqs[] = GPIO_COMBINED_HIGH_IRQS;
static void handle_interrupt_in(PortName port, int ch_base)
{
@ -117,8 +118,6 @@ void gpio5_irq(void)
int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
{
uint32_t int_index;
if (pin == NC) {
return -1;
}
@ -156,14 +155,14 @@ int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32
break;
}
int_index = 2 * obj->port;
if (obj->pin > 15) {
int_index -= 1;
NVIC_SetVector(gpio_high_irqs[obj->port], vector);
NVIC_EnableIRQ(gpio_high_irqs[obj->port]);
} else {
NVIC_SetVector(gpio_low_irqs[obj->port], vector);
NVIC_EnableIRQ(gpio_low_irqs[obj->port]);
}
NVIC_SetVector(gpio_irqs[int_index], vector);
NVIC_EnableIRQ(gpio_irqs[int_index]);
obj->ch = ch_base + obj->pin;
channel_ids[obj->ch] = id;
@ -243,12 +242,20 @@ void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
void gpio_irq_enable(gpio_irq_t *obj)
{
NVIC_EnableIRQ(gpio_irqs[obj->port]);
if (obj->pin > 15) {
NVIC_EnableIRQ(gpio_high_irqs[obj->port]);
} else {
NVIC_EnableIRQ(gpio_low_irqs[obj->port]);
}
}
void gpio_irq_disable(gpio_irq_t *obj)
{
NVIC_DisableIRQ(gpio_irqs[obj->port]);
if (obj->pin > 15) {
NVIC_DisableIRQ(gpio_high_irqs[obj->port]);
} else {
NVIC_DisableIRQ(gpio_low_irqs[obj->port]);
}
}
#endif