be90983ca8
STM32 STDIO pin redefinition
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wiki page https://os.mbed.com/teams/ST/wiki/STDIO updated
2018-02-12 13:01:33 +01:00
118073a9c5
Add missing can legacy file
2018-02-12 10:37:03 +01:00
58c4a5f83e
F7 ST CUBE V1.10.0
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F7 HAL driver V1.2.5
2018-02-12 10:37:03 +01:00
cfdc72d75e
[NUC472/M487] Refine crypto_zeroize/crypto_zeroize32
2018-02-12 14:04:56 +08:00
b6a01de070
K64F lp ticker driver - calculation bug fix.
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Delta calculation from lp_ticker_set_interrupt() function:
delta_us = timestamp > now_us ? timestamp - now_us : (uint32_t)((uint64_t)timestamp + 0xFFFFFFFF - now_us);
Lets assume that timestam == now_us.
Expected delta value should be 0 and in this current version is 0xFFFFFFFF.
The following condition:
timestamp > now_us
should have the following form:
timestamp >= now_us
Additionally modified us ticker driver to provide the same logic.
2018-02-09 14:29:24 +01:00
67772a5e95
Added u-blox ODIN-W2 driver binaries v2.4 rc1
2018-02-09 12:54:47 +02:00
011dbffff5
Fixing coding style
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Fix Details: HAL API for loguart is different that UART. Initially we
didnt have support for loguart in the mbed api. These changes have been
made to support the loguart from the mbed api by using the correct HAL
api calls
2018-02-09 16:35:33 +08:00
f6c6e79145
Fix NVIC Wrapper include
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Renesas mbed boards incorporate NVIC Wrapper because Cortex-A9 use GIC. For example, NVIC_SystemReset() is defined in nvic_wrapper.c and declared in nvic_wrapper.h.
Because I removed one of include processing accidentally, I fixed the lack.
This supplements PR #5890 .
2018-02-09 11:53:43 +09:00
0271df1fa5
[NUC472/M453/M487/NANO130] Rework RTC
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The rework includes the following:
1. Support year range beyond H/W RTC 2000~2099.
2. Refine RTC register access with low-power clock source
2018-02-09 10:47:18 +08:00
9f6eb14ae2
Merge pull request #5996 from ashok-rao/br-BL600
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Adding LAIRD_BL600 MTB
2018-02-08 15:23:07 +00:00
8e8b3d3bbd
Merge pull request #6036 from bcostm/dev_move_DISCO_L072CZ
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DISCO_L072CZ_LRWAN1: move target folder
2018-02-08 15:19:08 +00:00
e0e6e5a9e5
DISCO_F303VC : Align clock configuration with STM32 family
2018-02-08 14:25:46 +01:00
e8e4af3c7a
DISCO_F303VC : add IAR files
2018-02-08 14:25:45 +01:00
1ab4030f20
DISCO_F303VC : wrong STDIO pins
2018-02-08 14:25:45 +01:00
1c5c1c79d0
Merge pull request #6027 from ithinuel/fix-target-names-for-murata-abz-and-adv-wise-1510
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rename MURATA type ABZ & WISE 1510 to their expected name
2018-02-07 20:06:50 -06:00
f8cc42689c
Merge pull request #5970 from TomoYamanaka/master
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RZ_A1LU: Fix TRNG function
2018-02-07 20:06:17 -06:00
1ac115d794
Merge pull request #6013 from kivaisan/add-wise-1570
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Add MTB_ADV_WISE_1570 target
2018-02-07 20:05:38 -06:00
3b1438b9ba
Merge pull request #6015 from davidsaada/david_k82f_flash
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Add missing flash device feature to the K82F board
2018-02-07 15:03:22 -06:00
63201db875
Merge pull request #6004 from bcostm/fix_l476-486_sram_iar
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STM32L476/486: Improve SRAM usage for IAR
2018-02-07 14:51:30 -06:00
7630874b9c
Move TARGET_DISCO_L072CZ_LRWAN1 folder
2018-02-07 16:23:09 +01:00
188a68829f
Fixed serial pins and a typo for ODIN MTB
2018-02-07 15:12:40 +00:00
fae160fb9f
[NUC472/M453/M487/NANO130] Rework us_ticker and lp_ticker
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The rework includes the following:
1. Remove ticker overflow handling because upper layer (mbed_ticker_api.c) has done with it.
This makes us_ticker/lp_ticker implementation more succinct and avoids potential error.
2. Refine timer register access with low-power clock source
2018-02-07 09:09:39 +08:00
6c9fcf3dd8
rename MURATA type ABZ & WISE_1510 to their expected name
2018-02-06 21:23:37 +00:00
8ae80892b7
Merge pull request #5975 from ashok-rao/br-xDOT
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Adding MTB_MTS_XDOT as a new target
2018-02-06 13:05:12 -06:00
7881e68efe
STM32L0: Enable stop mode operation for the LPUART
2018-02-06 15:42:39 +01:00
01660ff5ae
STM32L0/4: Always try to select LSE if LPUART and baudrate <= 9600
2018-02-06 15:42:39 +01:00
6c8b9b5005
Added MTB aliases & default SPI
2018-02-06 13:44:24 +00:00
8593ca6f80
ff_lpc546xx: move property to parent
2018-02-06 11:51:47 +01:00
d651e0800c
lpc546xx and ff_lpc546xx: create parent object MCU_LPC546XX
2018-02-06 11:48:47 +01:00
412a79d444
[RZ_A1LU] Fix TRNG function
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Related to the review of #5857 , I fixed the TRNG function for GR-LYCHEE.
- I modified to zeroize "recv_data" before the function return.
- I added the processing that check the return value of I2C.read function. If return value is error, "output" is zeroized before function return.
- In trng_get_bytes_esp32 function, there is a time lag in the period from ESP32 reset to start working, error may occur when "Write" is called. Thus, I added a retry counter due to address this concern. There is not this counter for "Read" since it is called after "Write".
2018-02-06 15:44:33 +09:00
1fe0933138
move device_has to OSHCHIP specifically and define device name. These should probably move to the unified target at some point but is outside the scope of this PR
2018-02-05 21:23:26 -08:00
b1199b088f
remove redundent 'targets.' in overrides
2018-02-05 21:15:21 -08:00
f639777dce
nrf5x: gpiote uninit only needs to be run if input pin is configured for irq (or output)
2018-02-06 12:51:03 +11:00
964e6e74fb
Merge pull request #5826 from codeauroraforum/Add_iMXRT_Support
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NXP: Add support for MIMXRT1050_EVK
2018-02-05 10:15:17 -06:00
6a8a818ebf
Merge pull request #6012 from jeromecoutant/PR_SPI_FLUSH
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STM32 SPI ASYNC - Add FIFO flush before transfer
2018-02-05 10:11:03 -06:00
eb5b18bc13
Add missing flash device feature to the K82F board
2018-02-05 16:13:14 +02:00
4dad23a6a3
Add WISE-1570 external pin names
2018-02-05 14:47:52 +02:00
41490f48d0
Add MTB_ADV_WISE_1570 target
2018-02-05 14:31:20 +02:00
36c41186a6
STM32 SPI ASYNC - Add FIFO flush before transfer
2018-02-05 11:06:51 +01:00
703df3b6f9
STM32F7 SPI - add missing HAL files
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ST_INTERNAL_REF 43358
2018-02-05 11:06:14 +01:00
b89ef1f3a7
fix for serial issue #5805
2018-02-05 00:24:46 +08:00
fc748f0943
Added LED2 definition for compilation of tests
2018-02-02 21:06:24 -06:00
1e794393e5
Merge pull request #5972 from bcostm/dev_BL_STM32F7
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STM32F7: Add bootloader support (new trial)
2018-02-02 10:05:49 -06:00
937db051da
STM32L476/486: change SRAM config for IAR
2018-02-02 10:23:28 +01:00
670c62c12a
Merge pull request #5984 from amq/efm32-peripherals
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EFM32: make peripherals conditional
2018-02-01 14:27:08 -06:00
2e9c3340de
Adding LAIRD_BL600 MTB
2018-02-01 17:21:37 +00:00
f907012e55
Merge pull request #5962 from bcostm/fix_usart_irq_index
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STM32: Fix usart irq index
2018-01-31 12:16:17 -06:00
097966b8c7
Merge pull request #5905 from ithinuel/add-CMWX1ZZABZ-078-support
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add support for the murata's module CMWX1ZZABZ-078 based on STM32L0
2018-01-31 12:14:29 -06:00
fdc2274720
EFM32: make peripherals conditional
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* MCUs within a family like EFM32GG can omit some peripherals, e.g. EFM32GG230 doesn't have UART
* This commit adds a check to make them compilable, relevant mainly for custom boards
2018-01-31 17:35:26 +00:00
3608627a48
fix a silent conflict with PR #5947
2018-01-31 00:48:40 +00:00
b87e98c57b
Merge pull request #5904 from ithinuel/add-wise-1510
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add support for STM32L443RC & WISE-1510
2018-01-30 15:01:00 -06:00
fff6c75e28
Merge pull request #5936 from jeromecoutant/PR_WEAK_PINMAP
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STM32 : set all PinMap structures as weak
2018-01-30 14:56:42 -06:00
b08e1b3078
Merge pull request #5837 from ashok-rao/br-ublox-NINA
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Adding MTB ublox NINA-B1 as a new target
2018-01-30 14:55:43 -06:00
10e67e659c
Merge pull request #5947 from jeromecoutant/PR_L4_PLUART
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STM32L4 : add missing ST HAL UART functions
2018-01-30 14:46:15 -06:00
ba932700d9
Adding MTB_MTS_XDOT as a new target
2018-01-30 17:48:45 +00:00
6e71398e3c
STM32F7: move cache initialization
2018-01-30 14:01:50 +01:00
eb4b339c37
STM32 serial: add missing function declaration
2018-01-30 09:48:53 +01:00
b6efdd58c8
STM32 serial: improve index assignment in serial_init
2018-01-29 17:23:21 +01:00
e8454ff522
STM32 serial: improve irq index management for L0 devices
2018-01-29 17:23:21 +01:00
78a5516726
STM32 serial: improve irq index management for F0 devices
2018-01-29 17:23:21 +01:00
84269c7ca2
STM32 serial: improve irq index management for L4 devices
2018-01-29 17:23:21 +01:00
665d4a8003
STM32 serial: improve irq index management for L1 devices
2018-01-29 17:23:21 +01:00
689e15cf29
STM32 serial: improve irq index management for F7 devices
2018-01-29 17:23:21 +01:00
eeb4d2cd1d
STM32 serial: improve irq index management for F3 devices
2018-01-29 17:23:21 +01:00
1fa0557dbf
STM32 serial: improve irq index management for F2 devices
2018-01-29 17:23:21 +01:00
6974da239c
STM32 serial: improve irq index management for F1 devices
2018-01-29 17:23:20 +01:00
2305db6c98
STM32 serial: use uart_name in serial_irq_set function for F4
2018-01-29 17:23:20 +01:00
a908d28f26
STM32 serial: coding style
2018-01-29 17:23:20 +01:00
73ffc06ffd
STM32 serial: fix linking error
2018-01-29 17:23:20 +01:00
e446c26584
STM32 serial: use uart_name instead of uart_base
2018-01-29 17:23:20 +01:00
7256af0d5b
STM32 serial: change serial_get_irq_n function for F4 devices
2018-01-29 17:23:20 +01:00
172c02a856
STM32 serial: use get_uart_index function for F4 devices
2018-01-29 17:23:20 +01:00
066da18e0d
STM32 serial: add get_uart_index utility function
2018-01-29 17:23:20 +01:00
0efd33f010
STM32 serial: move init_uart function at the end of file
2018-01-29 17:23:20 +01:00
ebc8adbd4f
Merge pull request #5951 from jeromecoutant/PR_STDIO2
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STM32 NUCLEO F413ZH and L433RC : STDIO configuration
2018-01-29 10:09:19 -06:00
8ed0f26d80
Check cache before enabling it
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The mbed_sdk_init can be called either during cold boot or during
application boot after bootloader has been executed.
In case the bootloader has already enabled the cache,
is is needed to not enable it again.
2018-01-29 16:04:46 +01:00
5ad0887d7e
NUCLEO_F767ZI: Add bootloader support
2018-01-29 15:53:44 +01:00
e933971f92
BL NUCLEO_F746ZG: change scb->vector assignment
2018-01-29 15:53:24 +01:00
39cc300cd2
BL NUCLEO_F746ZG: enable bootloader
2018-01-29 15:53:12 +01:00
e10e555520
BL STM32746xG: Update scatter/link files
2018-01-29 15:52:33 +01:00
e1d901204b
Add license info
2018-01-29 12:20:00 +00:00
8f647beacb
STM32 : set all PinMap structures as weak
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This allow custom overwrites
2018-01-29 09:26:49 +01:00
e6b19d838c
add support for STM32L443RC & WISE-1510
2018-01-26 17:06:39 +00:00
da6532e57a
Merge pull request #5857 from TomoYamanaka/master
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Registration GR-LYCHEE board as a new mbed board
2018-01-26 10:50:44 -06:00
c9c6857c7c
STM32 NUCLEO F413ZH and L433RC : STDIO configuration
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#5795 patches are missing for these 2 targets
STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-26 17:50:10 +01:00
dfa55336f5
Merge pull request #5907 from bcostm/fix_f0_usart_irq
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STM32F0: fix issue with usarts sharing the same irq vector
2018-01-26 10:36:55 -06:00
ce87bdaf19
Merge pull request #5913 from DBS06/efm32_flash_api
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Add missing EFM32 HAL flash init/deinit function calls
2018-01-26 10:35:35 -06:00
124fbf4c9b
Merge pull request #5918 from scamille/master
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NXP LPC4088: Add missing SPI SSEL pin to Pinmap
2018-01-26 10:35:11 -06:00
215a043bac
Merge pull request #5923 from yangkunming99/rtl8195am_restructure_target_files
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rtl8195am - restructure target folder
2018-01-26 10:34:04 -06:00
7576813a7c
Merge pull request #5934 from jeromecoutant/PR_F401
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NUCLEO_F401RE : PeripheralPins file update
2018-01-26 10:32:56 -06:00
9d10c6a7ed
Merge pull request #5938 from jeromecoutant/PR_MTB
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MTB_XX : STDIO configuration
2018-01-26 10:32:37 -06:00
7979f4d255
SMT32L4 : add missing ST HAL LPUART functions
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To enable/disable UART Clock in Stop Mode
2018-01-26 16:24:54 +01:00
060daa99c9
NXP: Add support for MIMXRT1050_EVK
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Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-01-26 07:46:43 -06:00
f8e88d7443
add support for the murata's module based on STM32L0
2018-01-26 12:26:25 +00:00
ab9fd64981
rtl8195am - add missing changes
2018-01-26 10:58:42 +08:00
bc3d9380dc
add LOWPOWERTIMER and I2C_ASYNC to nrf51822 unified
2018-01-25 10:30:00 -08:00
8ba0943af0
move OSHCHIP to be with other nRF51 boards
2018-01-25 08:24:39 -08:00
8bf51ac159
remove redundent device_has
2018-01-25 08:24:39 -08:00
5547a09f20
fix typo 😖
2018-01-25 08:24:39 -08:00
e06d1db8ac
Add pinout diagram
2018-01-25 08:24:39 -08:00
8cb421d585
Clean up board definition to conform to the target spec
2018-01-25 08:24:39 -08:00
a6c69567ee
add board header files
2018-01-25 08:24:38 -08:00
fe6b6af26c
Add target for OSHChip
2018-01-25 08:24:38 -08:00
c26db91a09
MTB_XX : STDIO configuration
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Here is a proposition
- to align with other STM32
- and to remove compilation warnings :
[Warning] PeripheralNames.h@38,0: "STDIO_UART" redefined
2018-01-25 15:46:36 +01:00
e6ec285a6b
NUCLEO_F401RE : PeripheralPins file update
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Default SERIAL pins are now available for ADC and PWM
when STDIO_UART_TX and STDIO_UART_RX are user defined
https://os.mbed.com/teams/ST/wiki/STDIO
Alternative pins have been also defined
2018-01-25 13:52:17 +01:00
6d52c1c067
Revert "STM32F7: Add bootloader support"
2018-01-25 11:07:01 +00:00
7ff1cf52c0
STM32F0 uart irq: test IT flags for usart3/4
2018-01-25 11:23:53 +01:00
18659ab16b
STM32F0: manage better uart3 & 4 irqs
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Manage the case where both uart3 and uart4 interrupts are arriving at the same time.
2018-01-25 11:15:55 +01:00
eaa3e9d2b2
STM32F0 usart irq: fix issue with F070/F072
2018-01-25 11:15:55 +01:00
b6c9178d88
STM32F0: fix usart irq management
2018-01-25 11:15:54 +01:00
a6892da126
Merge pull request #5903 from jeromecoutant/PR_F407_ARM
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STM32F407 : correct ARM scatter file
2018-01-24 11:28:28 -06:00
c0a5ffb74d
rtl8195am - restructure target files
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restructure target files to better sync with Ameba sdk base
2018-01-24 22:51:53 +08:00
63664e11b9
NXP LPC4088: Add missing SPI SSEL pin to Pinmap
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The Pin P5_3 (p31) was missing from the NXP LPC4088 SPI PinMap for SSEL.
Adding this Pin allows usage of SPISlave with SSP2 using the SSEL pin.
The pin and its SSP2_SSEL function is both documented in https://os.mbed.com/media/uploads/embeddedartists/lpc4088_qsb_pinning.xlsx as well as in UM10562 LPC408x/407x User manual Rev. 3 — 12 March 2014 chapter 7.4.1.4 Table 90 (https://www.nxp.com/docs/en/user-guide/UM10562.pdf ).
2018-01-24 13:29:43 +01:00
7719c25a99
Add missing EFM32 HAL flash init/deinit function calls
2018-01-24 08:20:38 +01:00
f1cf77fa44
Merge pull request #5844 from adustm/DiscoIot_L475_iarlink
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ST-DISCO_L475VG_IOT01A: Improve SRAM use for IAR toolchain
2018-01-23 16:23:08 -06:00
11b9a3d940
Merge pull request #5890 from 0xc0170/fix_renesas_nvic
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RZ_A1H: cmsis nvic include fix
2018-01-23 16:22:31 -06:00
8d7397884e
Merge pull request #5894 from bcostm/fix_serial_7bit
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STM32: fix serial 7bit data format
2018-01-23 16:21:00 -06:00
669a85affa
Merge pull request #5898 from cmonr/ncs36510-disable-rtc
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Disables RTC for NCS36510 since feature is blocking #5087 from building correctly, and issue will not be resolved soon (#5308 ).
2018-01-23 15:52:21 -06:00
de5c170eee
Merge pull request #5896 from jeromecoutant/PR_DEEPSLEEP
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STM32LX : HAL_RCC_OscConfig update in PLL configuration
2018-01-23 14:58:12 -06:00
4c07c1c830
Merge pull request #5821 from bcostm/add_BL_nucleo-f746zg
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STM32F7: Add bootloader support
2018-01-23 11:49:10 -06:00
892e5e1b74
Merge pull request #5809 from ashok-rao/MTB_MXChip
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Add MTB MXChip EMW3166
2018-01-23 11:33:47 -06:00
3cefae203c
STM32F407 : correct ARM scatter file
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Alignment with STM32Cube_FW_F4_V1.18.0 done
2018-01-23 12:41:35 +01:00
a17e3d1ee2
Removed RTC as a supported peripheral for NCS36510
2018-01-22 14:46:44 -06:00
a33acaadf4
Merge pull request #4719 from iotvietmember/release_os_5
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mbed Enabled certificate for the VBLUno51 board
2018-01-22 10:28:18 -06:00
2cdc110747
STM32: fix serial 7bit data format
2018-01-22 15:43:50 +01:00
6086c51234
STM32LX : HAL_RCC_OscConfig update in PLL configuration
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check PLL settings before retuuning error
2018-01-22 13:35:11 +01:00
4d0535a1bf
NUCLEO_F767ZI: Add bootloader support
2018-01-22 11:11:27 +01:00
6edcc1eba2
Check cache before enabling it
...
The mbed_sdk_init can be called either during cold boot or during
application boot after bootloader has been executed.
In case the bootloader has already enabled the cache,
is is needed to not enable it again.
2018-01-22 11:11:27 +01:00
43f4b679c7
BL NUCLEO_F746ZG: change scb->vector assignment
2018-01-22 11:11:27 +01:00
96dc537e10
BL NUCLEO_F746ZG: enable bootloader
2018-01-22 11:11:27 +01:00
728e89dd03
BL STM32746xG: Update scatter/link files
2018-01-22 11:11:27 +01:00
160f75d536
[NUC472/M487] Fix warning in crypto
2018-01-22 10:51:12 +08:00
47a128a5e5
Merge pull request #5882 from ashok-rao/br-MTB_Dragonfly
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Add MTB MTS_Dragonfly as a new target.
2018-01-19 13:58:03 -06:00
1469fcde41
RZ_A1LU: cmsis nvic include fix
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To get cmsis nvic definitions, I added the process that include "cmsis_nvic.h" in cmsis.h.
Relation PR is #5890 .
2018-01-20 00:29:09 +09:00
5554ab28b3
RZ_A1H: cmsis nvic include fix
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To get cmsis nvic definitions, this header file should be included
in cmsis.h file.
Fixes #5886
2018-01-19 13:49:25 +00:00
e8378effc8
Modify the arrangement of "{" that shows the function start
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Regarding "{" that show the function start, I modified the the arrangement from right of function to new line.
2018-01-19 18:46:20 +09:00
4bc79b0ecf
Add license header on top in reserved_pins.h
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I modified the lack of license header in the below header files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/TARGET_MBED_MBRZA1H/reserved_pins.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/TARGET_MBED_MBRZA1LU/reserved_pins.h
2018-01-19 18:39:37 +09:00
1a3dae763c
Merge pull request #5858 from yangkunming99/relocate-image-header
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RTL8195AM - move region headers to 0xb000 and 0xc000
2018-01-18 11:32:49 -06:00
9ee69854ff
Adding MTB MTS_Dragonfly as a new target
2018-01-18 17:08:59 +00:00
f61d9d48c8
[NUC472/M453/M487/NANO130] Add gpio_is_connected
2018-01-18 17:33:03 +08:00
c24eb5b092
Merge pull request #5862 from jeromecoutant/PR_LPT_ISSUE
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STM32 LPT optimisation
2018-01-18 08:41:55 +00:00
635a82495c
Merge pull request #5834 from bcostm/PULL_REQUEST_CUBE_UPDATE_L4_V1.11.0
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STM32L4: Update ST Cube HAL to V1.11.0
2018-01-16 16:36:37 -06:00
bf139eb4df
Merge pull request #5791 from bcostm/fx_can_filter
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STM32 CAN: fix wrong ID and MASK filter
2018-01-16 16:21:21 -06:00
f01fbde3c5
Merge pull request #5795 from jeromecoutant/PR_USER_DEFINED_STDIO
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STM32 STDIO pins number are now configurable
2018-01-16 16:15:17 -06:00
3cb9728ae7
Merge pull request #5854 from SiliconLabs/bugfix/rtc_overflow
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Fix for Silicon Labs RTC
2018-01-16 16:07:43 -06:00
728f76d63e
Merge pull request #5855 from SiliconLabs/feature/new/allow_dcdc_override
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Allow overriding of DCDC settings per target
2018-01-16 15:45:59 -06:00
671c2d7e90
Merge pull request #5346 from scartmell-arm/feature-hal-spec-critical-section
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Add Critical Section HAL API specification
2018-01-16 12:49:38 -06:00
9fb865ae57
STM32 LPT optimisation
2018-01-16 15:16:13 +01:00
c9fc52166a
rtl8195am - reorder some defines properly in ota header file
2018-01-16 13:52:16 +08:00
ae1eaa985f
Support TRNG function for GR-LYCHEE
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I supported the TRNG function when target is GR-LYCHEE.
GR-LYCHEE generates TRNG by acquiring the random number of Wifi module(ESP32) incorporated in it using I2C.
2018-01-16 13:45:15 +09:00
aa5da2cd2e
Add the definition for GR-LYCHEE in mbed_rtx.h
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In mbed_rtx.h file, I added the definition for GR-LYCHEE to use the "Dynamic Heap" processing when the target is GR_LYCHEE.
2018-01-16 13:39:44 +09:00
776b27cefb
Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE
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For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific.
In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).
2018-01-16 13:34:35 +09:00
47acc9e551
Add GR_LYCHEE as a new target board in terget.json, build_travis.py and tests.py
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I added GR-LYCHEE's configuration in targets.json file. Also, I added GR_LYCHEE as a Renesas new target board in build_travis.py and tests.py.
2018-01-16 13:25:17 +09:00
5d6c5dd81d
Fix for #5840
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This commit fixes #5840 . Fix verified by running mbed_hal-lp_ticker test suite with preloaded RTC counter such that it wrapped in the middle of the suite.
Also removes explicit sleep blocking from the us_ticker implementation, since sleep blocking for us tickers is done at mbed HAL level now. This was causing one of the lp_ticker tests to fail.
2018-01-15 21:21:53 +01:00
18c973f132
Allow overriding of DCDC settings per target
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Allow custom targets to override the DCDC settings by defining EMU_DCDCINIT_STK_DEFAULT to target-specific initialization values.
2018-01-15 16:36:23 +01:00
670077624d
Merge pull request #5749 from jeromecoutant/PR_LPT_LPTIM
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STM32 LOWPOWERTIMER : introduce LPTIM feature
2018-01-15 15:25:54 +00:00
2c6403e67f
Merge pull request #5787 from bcostm/dev_flash_f2
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STM32: Add support of Flash API for STM32F2 devices
2018-01-15 15:24:13 +00:00
2d83463f9c
Merge pull request #5813 from TomoYamanaka/master
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Revise the structure in RZ_A1 related directory
2018-01-15 15:23:52 +00:00
debca1f87c
Merge pull request #5824 from jeromecoutant/DEV_DISCO_F407
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DISCO_F407VG : alignment with other STM32
2018-01-15 15:22:52 +00:00
a1b4b8f10a
rtl8195am - move region headers to 0xb000 and 0xc000
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The new layout is as follows:
0x000000 - 0x008000 => bootloader
0x008000 - 0x00b000 => system sectors
0x00b000 - 0x00c000 => region1 header
0x00c000 - 0x00d000 => region2 header
0x00d000 - 0x010000 => reserved
0x010000 - 0x040000 => mbed file system
0x040000 - 0x120000 => region1 image
0x120000 - 0x200000 => region2 image
This is to ensure when daplink erases sections, both regions' headers
are erased properly.
2018-01-15 15:08:13 +08:00
5104f2d1cc
Improve SRAM use for IAR toolchain
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Use the entire SRAM2 with NVIC buffer + stack
Increase HEAP size to 0x10000 in SRAM1
Increase the available SRAM1 by 0x2000
2018-01-12 15:49:27 +01:00
ec719bc2d9
Adding MTB ublox NINA-B1 as a new target
2018-01-12 13:08:27 +00:00
d50c329c68
Use legacy CAN api
2018-01-12 11:17:29 +01:00
06f097884c
Update stm32l4xxxx.h files
2018-01-12 11:11:32 +01:00
a4f9012a0a
Update stm32l4xx.h files
2018-01-12 11:11:31 +01:00
dda34ea206
Update system_stm32l4xx.c with latest version
2018-01-12 11:11:31 +01:00
43a31557dc
Remove release notes file
2018-01-12 11:11:31 +01:00
0448d64f62
Add more comments
2018-01-12 11:11:31 +01:00
84577f9634
L4 ST CUBE V1.11.0
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Update to STM32CubeL4 V1.11.0
Conflicts solved:
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l4xx.h
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l4xx.h
targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_conf.h
targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h
targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_i2c.c
targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_spi.h
2018-01-12 11:11:31 +01:00
3fddcc18da
Add "RZ_A1XX" label for commonizing in targets.json
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I added the "RZ_A1XX" label for commonizing the setting in targets.json, and inherited in both RZ_A1H and VK_RZ_A1H.
2018-01-12 17:35:53 +09:00
b92f75ad3c
Modify the lack of copyright to header files
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I modified the lack of copyright in the below header files that I added for commonizing the RZ_A1 related files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/mbed_drv_cfg.h
2018-01-12 14:18:54 +09:00
b32828bc37
Merge pull request #5739 from pan-/nordic-new-client
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BLE: Nordic pal client implementation
2018-01-11 10:26:47 -06:00
2c5fedc0b2
Merge pull request #5792 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F0_V1.9.0
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STM32F0 : ST CUBE version update to V1.9.0
2018-01-11 10:24:28 -06:00
31053273c2
Nordic BLE: Fix stack event size
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Read By group type response can return 4 descriptor discovered when the remote server have 4 descriptors with a 16 bit UUID. The handle, UUID pair get stored in a ble_gattc_desc_t that is 20 bytes long.
This PR increase buffer size to handle this use case.
2018-01-10 17:04:35 +00:00
0eede79e2b
DISCO_F407VG : alignment with other STM32
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- clock source is now a user choice
- IAR tool chain is available
2018-01-10 15:01:29 +01:00
643c8926d5
Remove counter from nordic critical HAL implementation
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hal_critical_section_enter() is safe to call multiple times, however
hal_critical_section_exit() is only called on the last exit from a
critical section. This will cause a mismatch in the counter and the
interrupt state will never be restored if the critical section is
nested. Change this to a bool so that the interrupt save state is
tracked for hal_in_critical_section() to work correctly.
2018-01-09 15:35:12 +00:00
a816e93e9a
STM32 LOWPOWERTIMER : introduce LPTIM feature
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STM32L0, L4, F7 and few F4 chip are supporting LPTIM feature.
We propose to allow user to use LPTIM for MBED LowPowerTimer API instead of using RTC wakeup timers.
By default, all targets that are supporting this feature have been configured.
2018-01-09 14:10:14 +01:00
061795c489
Move in_critical_section implementation into the HAL
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- Add function to HAL hal_in_critical_section()
- Wrap assert in FEATURE_UVISOR macro
2018-01-09 10:41:29 +00:00
1b303ab5d6
Change the values of RZ_A1 related "extra_labels" in targets.json
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As a result of revision of folder structure, I changed the values of "extra_labels" of RZ_A1-related in targets.json.
2018-01-09 18:25:12 +09:00
8b7e2abdb7
Commonalize the files in "targets/TARGET_RENESAS/TARGET_RZ_A1XX" directory
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I made be available in common whatever the board related to RZ_A1 in the below files.
- Since there are the table code of Pinmap differs for each board, I moved the code to "PeripheralPins" file for each board, and changed to include PeripheralPins.h.
analogin_api.c, can_api.c, gpio_irq_api.c, i2c_api.c, pinmap.c, port_api.c, pwmout_api.c, serial_api.c, spi_api.c and us_ticker.c
- Since there are some board-specific processes, I enclosed the processes with "#ifdef" and rearranged the functions to make be easier to enclose.
can_api.c, ethernet_api.c and serial_api.c
- Since there are the driver configuration values differs for each board, I added "mbed_drv_cfg.h" file for each board and defined macros for the values, and changed to refer to the macros.
can_api.c, gpio_api.c, pwmout_api.c and rtc_api.c
2018-01-09 18:20:50 +09:00
6f851a820c
Revise the folder structure in "targets/TARGET_RENESAS" directory
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In "targets/TARGET_RENESAS" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related.
And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "targets/TARGET_RENESAS" folder
<before>
\targets\TARGET_RENESAS\TARGET_RZ_A1H
\targets\TARGET_RENESAS\TARGET_VK_RZ_A1H
<after>
\targets\TARGET_RENESAS\TARGET_RZ_A1XX
2018-01-09 17:39:22 +09:00
a68750473c
[M487] Support ECP H/W accelerator
2018-01-09 16:20:41 +08:00
c138dedf73
Adding MTB MXChip EMW3166 as a new target
2018-01-08 21:07:38 +00:00
a5f1426a44
Merge pull request #5794 from prashantrar/realtek-pr-online-compile
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Commit to fix the Online compiler issue for ARM mbed-os on REALTEK_RT…
2018-01-08 10:38:43 -06:00
24b0387500
Merge pull request #5747 from jeromecoutant/PR_RTC_SLEEP
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STM32 : Fix issue to exit deepsleep when RTC has not been initialized
2018-01-08 10:37:06 -06:00
cef1cc26d8
Merge pull request #5651 from gorazdko/ff_lpc546xx-add-ethernet
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ff_lpc546xx: add enet, change led1 and led3 pins
2018-01-08 10:35:56 -06:00
737f75a68f
Merge pull request #5608 from productize/nucleo-f413zh
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NUCLEO_F413ZH: Add support for the NUCLEO-F413ZH board
2018-01-08 10:35:27 -06:00
9c6e7c0fa0
STM32F4: STDIO_UART_TX and STDIO_UART_RX can be now user defined
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NB for UBLOX targets: usb_rx and usb_tx config name are still available
in order to not break current applications.
2018-01-08 11:42:46 +01:00
59b4b228c4
STM32L4: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:35 +01:00
7fa733e236
STM32L1: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:24 +01:00
06e9fb6c9b
STM32L0: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:17 +01:00
93b34070ed
STM32F7: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:10 +01:00
a7bddff5cc
STM32F3: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:04 +01:00
785862e69e
STM32F2: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:11:57 +01:00
f97d84654e
STM32F1: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:11:51 +01:00
88678315f1
STM32F0: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:11:43 +01:00
62667a4732
Fixing changes as requested
2018-01-08 10:49:46 +08:00
f71de8a0d7
Commit to fix the Online compiler issue for ARM mbed-os on REALTEK_RTL8195AM
2018-01-06 00:00:50 +08:00
e14bee5209
Fix potential race condition in critical section HAL API
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Call underlying HAL implementation to enter critical section/disable interrupts
before incrementing the global critical section counter.
Modify HAL implementations to track first entrances to the critical section and
only update the saved state on first enter.
2018-01-05 14:55:58 +00:00
3c9ae7bf1c
NRF51_DK: Add Critical Section HAL implementation
2018-01-05 14:55:57 +00:00
jeromecoutant
bcostm
ccli8
Przemyslaw Stekiel
Andreas Larsson
Prashant Ravi
TomoYamanaka
Martin Kojtal
Cruz Monrreal
Ashok Rao
Wilfried Chauveau
Marc Emmers
gorazd
drewcassidy
Andrew Leech
David Saada
Kimmo Vaisanen
amq
Mahesh Mahadevan
chrisyang
Serge Camille
PHST
Steven Cooreman
adustm
Vincent Coubard
Steven Cartmell
Jimmy Brisson