Commit Graph

87 Commits (e2048b06b2c4aeddc36be4353855f523a43427d6)

Author SHA1 Message Date
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel e3a34a57e1 Move GPIO_AF_NONE from PeripheralPins.h to PinNamesTypes.h 2019-11-28 08:32:10 +01:00
Przemyslaw Stekiel 6489bb7c99 STM: Add support for internal ADC pins 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel dc26390d08 DISCO_L475VG_IOT01A: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 03dd8d3e22 STM32L4 USB pins addition 2019-10-21 17:11:55 +02:00
jeromecoutant 8cd00b3468 STM32L4: Add OSPI IP support in fallback QSPI mode
For STM32 platforms that embed an OSPI IP, we're offering
a QSPI fallback support with this commit.

When OSPI is supported in mbed, we can consider adding full
OSPI support
2019-08-23 15:18:48 +02:00
jeromecoutant 96a773a0e6 STM32L4: update drivers version to CUBE V1.14.0 2019-07-19 13:15:07 +02:00
Vincent Veron 31eb49b918 TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
Extend to all STM targets the work done on PR10752.

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-06-14 14:15:56 +02:00
jeromecoutant d919498745 STM32: common cmsis.h and device.h 2019-05-27 16:27:41 +02:00
Martin Kojtal 1de0712272
Merge pull request #9944 from deepikabhavnani/stm32_splitheap
GCC - Add support to split heap across 2-RAM banks
2019-04-30 11:02:51 +01:00
Martin Kojtal 2cd7aa1148
Merge pull request #10303 from juhoeskeli/mem_changes
STM32L4xx: IAR memory maps updated
2019-04-29 13:46:46 +01:00
Anna Bridge 536da479dc
Merge pull request #10018 from deepikabhavnani/stm32_heap_armc6
STM: Update linker script for using SRAM1 and SRAM2 in ARM
2019-04-26 13:30:42 +01:00
Juho Eskeli 443974b864 STM32L4xx: IAR linker file updated to better use available memory 2019-04-23 12:53:53 +03:00
Deepika feba293673 Update linker script for using SRAM1 and SRAM2 in ARM
To have the flexibilty in application; to use any of the section
    (data/bss/heap) without updating linker script in every use case,
    following decisions are made:
    1. Fixed size and small sections moved to SRAM2 (32K)
        Vectors
        Crash data
        Remaining section - RW / ZI
    2. Large memory space should be used for variable sections
       RW/ZI
       Heap - (Minimum - 0x12000)
       Stack - At bottom
2019-04-09 13:41:09 -05:00
Deepika 1a52587c2d Update the linker file to support single and multiple heap banks 2019-04-09 12:08:49 -05:00
Deepika 719d0fb94e Update linker script for split heap support
To have the flexibilty in application; to use any of the section
(data/bss/heap) without updating linker script in every use case,
following decisions are made:

1. Fixed size and small sections moved to SRAM2 (32K)
    Vectors
    Crash data
    Stack
    Remaining section - Heap memory
2. Large memory space should be used for variable sections
   Data
   BSS
   Heap - Remaining section

Heap is moved to the end of both sections as GCC allocates till 4K boundary,
if end of heap is not aligned to 4K, that chunk of memory will go unutilized
2019-04-09 12:08:49 -05:00
Marcus Chang 7c0714132c Expand sbrk to allocate memory from two regions 2019-04-09 12:08:49 -05:00
Deepika 36c7b2de86 uARM - Move heap region after IRAM1
ARM_LIB_HEAP start is aligned to IRAM1 end, hence should be placed next to
RW_IRAM1 i.e. no other region in between.
2019-04-09 12:01:01 -05:00
Juho Eskeli a3beb1081e MTB_STM_L475: fix UART clock 2019-03-20 16:52:28 +02:00
Deepika 122549910e Add Crash report section to all uARM files 2019-02-28 19:54:38 -06:00
deepikabhavnani 0dc5561991 Guard RAM start and size defines 2019-02-28 19:54:38 -06:00
deepikabhavnani b598dc1f46 Target_STM: Add ARM_LIB_STACK and ARM_LIB_HEAP section
Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
2019-02-28 19:54:28 -06:00
Ashok Rao 9102b59824 Changing SPDX license identifier to BSD-3-Clause 2019-02-21 10:35:25 +00:00
Ashok Rao 6c3b732b17 Removing redundant code comments 2019-02-20 15:22:11 +00:00
Ashok Rao a7c878bb47 Adding SPDX license identifer for all new files 2019-02-20 15:07:03 +00:00
Ashok Rao 56508cfc4e Adding SPDX license identifier 2019-02-20 15:02:59 +00:00
Ashok Rao 1849921466 Adding STM32_L475 as a new MTB target 2019-02-20 14:40:39 +00:00
Lin Gao 837e86df28 Updated linker script for IAR and ARM to increase heap size by moving BSS to the 32K ram 2019-02-01 16:03:20 -06:00
Lin Gao aa2d49ae0c Move BSS to SRAM2 to increase heap size on ST475 IOT board 2019-02-01 15:32:43 -06:00
Russ Butler 82b131aa59 Use dedicated PinMap for each QSPI data line
Split PinMap_QSPI_DATA into PinMap_QSPI_DATA0 - PinMap_QSPI_DATA3.
This allows pins to be selected more accurately.
2019-01-22 12:11:15 -06:00
Przemyslaw Stekiel 58f6bf7292 [STM] Support boot stack size configuration option 2019-01-08 15:32:06 +01:00
Senthil Ramakrishnan ef8c1c3cb6 Linker script modifications for crash data region 2018-11-16 13:59:59 -06:00
Deepika bf1a2c8485 [ST]: Fix alignment of execute region to 8-byte boundary in ARM linker files
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
2018-10-09 14:47:14 -05:00
Martin Kojtal b97ac0c353
Merge pull request #7787 from jeromecoutant/PR_MSI_LSE
STM32L4 : code cleanup in MSI SetSysClock
2018-09-17 14:22:29 +02:00
Maciej Bocianski 050604f1b8 DISCO_L475VG_IOT01A remove old QSPI pins 2018-09-05 09:58:20 +02:00
Maciej Bocianski 5195c820e6 standardise QSPI pin names 2018-08-24 12:09:51 +02:00
adustm 7dda4e4fc6 Implement qspi_free function 2018-08-22 15:02:10 +02:00
jeromecoutant 43258a8ff4 STM32 : add all QSPI pins in available targets 2018-08-22 15:02:08 +02:00
Maciej Bocianski 67798d6eb2 STM: add qspi pin names for DISCO_L475VG_IOT01A 2018-08-22 15:02:04 +02:00
Martin Kojtal d282c81e86 QSPI: add STM32L4 support
Disco IoT board support for QSPI. As it does not have dual flash support in QSPI,
we need to fix qspi hal implementation.
2018-08-22 15:00:17 +02:00
jeromecoutant b5c258e398 STM32L4 : code cleanup in MSI SetSysClock 2018-08-14 09:20:52 +02:00
jeromecoutant 063cad5992 STM32L4 assert in SetSysClock replaced 2018-08-13 16:01:49 +02:00
bcostm 7097e07b62 stm32 ticker: typo corrections 2018-07-11 14:43:36 +02:00
bcostm d8e839a789 stm32 ticker: change license 2018-07-11 14:43:16 +02:00
bcostm 32031cbab3 stm32 ticker: rename hal_tick.h in us_ticker_data.h 2018-07-11 14:42:44 +02:00
bcostm fbd7a97e19 stm32 ticker: rename macro and update ST HAL Tick functions
- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
2018-07-11 14:39:42 +02:00
jeromecoutant 78410e7032 TARGET_STM32L4 astyle 2018-06-27 14:46:00 +02:00