Commit Graph

85 Commits (d0dba1a533eb97d8fbb70b36acdaf5ca20f117cc)

Author SHA1 Message Date
JohnK1987 3f239c6201
Add support of I2C API for STM32H5 family (#323)
* fix PWM pin map in context of Timer change

* Note about DAC on Nucleo-H503RB

* Add ADC and DAC for STM32H5

* Copyright fix

* Add I2C for STM32H5

* fix I2C related code

* ADC/DAC fix

* Enable I2C API

* Copyright fix

* fix I2C device

* fix I2C ASYNCH macro

* fix revert back the stop variable position

---------

Co-authored-by: Jan Kamidra <odiin@windowslive.com>
2024-08-19 00:29:35 -07:00
Jamie Smith de0c404983
Synchronize changes with Mbed upstream: July 2024 edition (#309)
* remove stdio checks in serial init if no console is available

* STM32WL fix set preamble length to 8

* Add target support for XDOT_MAX32670

* TARGET_STM: only mask CAN rx interrupt after rx interrupt, not all CAN interrupts

* Sleep Radio in between DC scheduled

* Nuvoton HUSBD support endpoint write ZLP

* USBCDC: support ZLP

* Don't overlap STM32 FDCAN RAM sections

* allow to override antenna gain

* TFM: Fix undeclared function tfm_ns_interface_init

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: CAN: Fix filter mask

NOTE: This fix only targets CAN (M453/M487), not CAN-FD (M467).
NOTE: NUC472 CAN doesn't support filter.

* NUVOTON: CAN: Fix Rx interrupt doesn't work

Major modifications:
1. Handle Rx interrupt based on Message Object interrupt (CAN_IIDR=0x0001~0x0020) instead of CAN_STATUS.RxOK
2. Also handle Tx interrupt following above for consistency

Other related modifications:
1. Fix signature type error in CAN_CLR_INT_PENDING_BIT()
2. Add CAN_CLR_INT_PENDING_ONLY_BIT() which doesn't clear NewDat flag so that user can fetch received message in thread context

NOTE: This fix only targets CAN (NUC472/M453/M487), not CAN-FD (M467).

* NUVOTON: CAN: Fix Message Object number for Tx and recognition of Rx interrupt

1.  The same Message Object number cannot use for both Tx and Rx simultaneously.
    For Tx, Message Object number 31 is reserved instead of 0.
    For Rx, Message Object numbers 0~30 are used and for filters.
2.  NewDat bit (CAN_IsNewDataReceived()) isn't exclusive to Rx.
    Recognize Rx interrupt by Message Object number other than 31.

NOTE: This fix only targets CAN (NUC472/M453/M487), not CAN-FD (M467).

* NUVOTON: CAN: Fix filter mask being zero

On mask being zero, it means any match, not exact match.

NOTE: This fix only targets CAN (M453/M487), not CAN-FD (M467).
NOTE: NUC472 CAN doesn't support filter.

* Allow custom TCXO control parameter

Allow custom TCXO control parameter

* NUVOTON: EMAC: Fix undeclared function mbed_error_printf

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: AnalogIn: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: CAN: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: AnalogOut: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: SPI: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: I2C: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: Serial: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* Add separate flags for I2C slave transfer in progress

Fixes ARMmbed/mbed-os#15498

Adds 2 boolean flags to the STM32 `i2c_s` object
to indicate whether a transfer is in progress,
separate from the existing "transfer pending" flags.

`i2c_slave_write`, `i2c_slave_read` and their associated callbacks
are modified to use these flags in addition to the pending flags.
The original behavior of the pending flags is preserved.

* ESP8266: Fix accessing uninitialized variable

* Added missing delete

* Add ability to change number of status registers for macronix QSPIF devices

* correct scan parameters types

* skip CRC when initializing TDBStore

Problem: The build_ram_table() function of TDBStore loops over every entry, calculates the checksum and compares them to the stored checksum in the entry header to ensure integrity. For larger TDBStores (e.g. 8 MiB or more) in external single-SPI flash devices this check can take very long, thus rendering it unusable in some cases.

Solution: The suggested solution skips the time consuming CRC of the data. After reading the key and calculating its CRC, it sets next_offset to the beginning of the next entry, thereby skipping the data. While this skips the integrity check, it significantly reduces the initial building of the RAM table.

The data CRC can be enabled or disabled with a compiler flag.

Contribution is provided on behalf of BIOTRONIK.

* Added missing check for replay protection pointer before allocating new variable

Problem: If a key with write-once flag is being set in a SecureStore without rollback-protection store (i.e. _rbp_kv == NULL), additional memory will be allocated for the variable _ih->key. The memory will not be deleted, though, as the delete in line 434 only happens if a rollback-protection store exists (i.e. _rbp_kv != NULL)

Solution: Only allocate the memory if _rbp_kv != NULL

Contribution is provided on behalf of BIOTRONIK.

* Increase AT timeout to 10s in AT_CellularSMS::send_sms

For some devices sending can be slow (as an example see SIM800, it can be up to 60s), command is being run properly but default timeout is returning an invalid error.
See https://www.elecrow.com/wiki/images/2/20/SIM800_Series_AT_Command_Manual_V1.09.pdf

* Increase AT timeout to 10s in AT_CellularSMS::get_sms

When SMS list is big and baudrate is not fast enough, with default timeout we can suffer from timeout error while getting a sms because method is parsing the full list and this takes long.

* Fix AT_CellularSMS::list_messages breaking in text mode when CRLF is contained in SMS payload text

When parsing SMS, it can happen that we receive CRLF in the SMS payload (happened to me when receiving provider texts).
As an example, we can receive:

"""
Hello <CR><LF>
World!
"""

With previous implementation, second consume_to_stop_tag was stopping in <CR><LF> and rest of the code was failing for obvious reasons.
With this commit we consume the full payload as bytes.

* Add missing SPDX identifier to a bajillion Nuvoton source files + some others

* More license fixes, upgrade M451 legacy PinNames.h, add MCU description

* Fix some more legacy pin names

---------

Co-authored-by: Jost, Chris <79271064+chrJost@users.noreply.github.com>
Co-authored-by: Charles <hallard04@free.fr>
Co-authored-by: Leon Lindenfelser <llindenfelser@multitech.com>
Co-authored-by: Pavel Sorejs <sorejs@gmail.com>
Co-authored-by: cyliang tw <cyliang@nuvoton.com>
Co-authored-by: jmcloud <jmcloud@tesla.com>
Co-authored-by: Chun-Chieh Li <ccli8@nuvoton.com>
Co-authored-by: Adam Gausmann <adamg@esdemc.com>
Co-authored-by: Mingjie Shen <shen497@purdue.edu>
Co-authored-by: Matthias Goebel <matthias.goebel@biotronik.com>
Co-authored-by: danielzhang <danielzhang@mxic.com.cn>
Co-authored-by: Mathieu Camélique <mathieu.camelique@edu.hefr.ch>
Co-authored-by: David Alonso de la Torre <davidalto97@gmail.com>
2024-07-21 00:16:51 -07:00
JohnK1987 6b946d4c4f
Add PwmOut API support for STM32H5 (#299)
* Enable PwmOut API

* remove pins with LpTimer

* Prepare for H563

* Change source of us ticker from TIM2 to TIM3

---------

Co-authored-by: Jan Kamidra <odiin@windowslive.com>
2024-07-20 09:10:44 -07:00
Wang Xu cd37bf47d5
Adding NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q support, with some changes to stm_dma_utils (#273)
* added an option "QSPI_OSPIM_IOPORT_HIGH=1" to allow using the high IO ports (IO 4~7) of an OSPI peripheral to drive a QSPI device
updated STM32U5 firmware package to support STM32U5F/G devices
STM DMA Utils: added stm_get_dma_instance, stm_set_dma_link, stm_get_dma_link for working with DMA code in external libraries

* added NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q
USB is not supported yet

* added missing USART6 handlers for STM32U5

* changed PA_2_ALT0/PA_3_ALT0 in UART pinmap back to PA_2/PA_3 for NUCLEO-U545RE-Q

* renamed stm_get_dma_link to stm_get_dma_handle_for_link
renamed stm_set_dma_link to stm_set_dma_handle_for_link
added option "qspi_ospim_ioport_high" for MCU_STM32U5
implemented SetSysClock_PLL_HSI for NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q
made PLL_HSI the default clock source for NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q

* changed clock sources of NUCLEO-U545RE-Q and NUCLEO-U5A5ZJ-Q back to PLL+MSI
embedded LICENSE file into every source file in the STM32U5 firmware package
2024-05-03 00:39:59 -07:00
Jamie Smith 8926deb711
Fix clocking configuration issues on STM32H7x processors (#262)
* Fix NUCLEO_H743ZI clock config not enabling overdrive mode

* Update most STM32H7 devices to new clocking configuration

* Fix ADC clock for old chip revs

* Fix CAN clock, finish clocking for 280MHz devices

* Fix a few typos and such

* A few more targets.json tweaks

* Fix comma
2024-03-28 09:36:36 -07:00
Jamie Smith d9676cccca
Fix STM32 I2C v2 async transfer not doing a repeated start (#197)
* Fix STM32 I2C v2 async transfer not doing a repeated start

* Clarify docs
2023-11-21 20:38:36 -08:00
Jamie Smith 3f7d67c64c
Synchronize upstream changes - May 2023 edition (#160)
* fix STM32L1 FLASH_SIZE for cat.3 devices with DEV_ID 0x436

* Fix mesh connect semaphore not releasing causing blockage

* Add support of NSAPI_ICMP sockets in Nanostack

* STM32F1: add MCU_STM32F103xD support

* STM32F1: add MCU_STM32F103xG support

* test: Disable failing tests due to echo server

Some tests are failing as echo.mbedcloudtesting.com is not serving TLS
requests anymore.

Signed-off-by: Saheer Babu <saheer.babu@arm.com>

* Check CAN DLC length value

* Fix default interface ID only being used partially

If user sets the default interface ID for a socket (e.g. using setsockopt
with SOCKET_INTERFACE_SELECT), the default interface should take over
other interface selection mechanisms as a interface is bound to the socket.
This applies for both IPv6 local and global scopes for unicast messages
but not for multicast messages as these are bound to a multicast interface
using SOCKET_IPV6_MULTICAST_IF socket option.

* Targets: NXP: IMXRT: Fixed GCC_ARM lds syntax.

Signed-off-by: Yilin Sun <imi415@imi.moe>

* CAN: read only up to 8 bytes

If HAL implementation writes more than 8 bytes of data, error immediately.
CANMessage defines only 8 bytes of data, lenght cannot be > 8.

This fixes https://github.com/ARMmbed/mbed-os/issues/15361

Signed-off-by: Martin Kojtal <martin.kojtal@arm.com>

* STM32F303xC: add RAM_CCM in GCC linker script

* fix(drivers/emac): Remove incorrect RMII RX ER initialization

* fix(drivers/emac): Add missing SPDX indetifier to ST driver files

* fixed compiler inline issue

* Update Mbed version block

* removed HSE speed limitation for STM32G431RB

* Added HSE range validation for STM32g431xB

* added support for 4, 8 and 16MHz

* M487: Remove unused variable 'u32EscapeFrame'

Remove unused variable 'u32EscapeFrame' in BSP m480_ccap.h to avoid warnings

* force FIFO IRQ for FDCan RX on H7

* Add hardware CRC support to STM32G4

* add support for Nucleo-H745ZI

* Update MAX32670 peripheral drivers with final ones that use by SDK

Signed-off-by: Sadik.Ozer <sadik.ozer@analog.com>

* MAX32670 apply mbed required changes on peripheral drivers

Signed-off-by: Sadik.Ozer <sadik.ozer@analog.com>

* M467: Support CAN bus

1.  Update BSP CANFD driver
2.  Notes for implementation
    (1) Each CANFD instance supports two IRQ lines. Use only line 0. Line 1 is not used.
    (2) For Rx disabling multiple filter handles,
        1)  Map all filter handles to filter handle 0
        2)  Use Rx FIFO 0 for filter handle 0
    (3) For Rx enabling multiple filter handles,
        1)  Use Rx FIFO 0 for filter handle 0
        2)  Use Rx FIFO 1 for filter handle through first invoking can_filter()
        3)  Use dedicated Rx Buffer for other filter handles
        NOTE: H/W supports mask on Rx FIFO 0/1 but not on dedicated Rx Buffer.
    (4) For Tx, use only dedicated Tx Buffer. BSP CANFD driver doesn't support Tx FIFO/Queue.
    (5) Support no CAN FD.

* Fix 'new[]' array freed with 'delete'

The array _scratch_buf is allocated using new[] in line 761 of
mbed-os/storage/kvstore/securestore/source/SecureStore.cpp.
But it was freed using delete.

* Define default parameters of functions of derived class the same as the base class

The member function bringup() of class ThreadInterface redefines
parameter stack's default value to IPV6_STACK from the inherited default value
DEFAULT_STACK (in Interface).
The default value will be resolved statically, not by dispatch, so this
can cause confusion.
Similar arguments apply to LoWPANNDInterface and WisunInterface.

* Avoid calling virtual functions from constructors and destructors

Virtual functions are resolved statically (not dynamically) in
constructors and destructors for the same class. The call should be made
explicitly static by qualifying it using the scope resolution operator.

* Fix potentially overrunning write of sprintf

Format string "%d" requires 12 bytes (including the null terminator).
Also, use snprintf instead of sprintf to prevent buffer overflow.

* Fix system_clock.c location

Signed-off-by: Jasper Jonker <jasper.jonker@wingtra.com>

* Fix variable name

Signed-off-by: Jasper <jasper.jonker@wingtra.com>

* Change storage-class of secret_buf to static

Storing the address of a local variable (`secret_buf`)
in non-local memory (`prf_ptr->secret`) can cause a
dangling pointer bug if the address is used after the function returns.

* fix compiling errors of FATFileSystem when exFAT was enabled

* Add OSPI support for STM32H7

* Nuvoton: Enable extending sampling time for ADC/EADC

For all Nuvoton targets, enable extending sampling time in ADC/EADC clocks on per-pin basis.

---------

Signed-off-by: Saheer Babu <saheer.babu@arm.com>
Signed-off-by: Yilin Sun <imi415@imi.moe>
Signed-off-by: Martin Kojtal <martin.kojtal@arm.com>
Signed-off-by: Sadik.Ozer <sadik.ozer@analog.com>
Signed-off-by: Jasper Jonker <jasper.jonker@wingtra.com>
Signed-off-by: Jasper <jasper.jonker@wingtra.com>
Co-authored-by: caodd <caodd1993@qq.com>
Co-authored-by: YannCharbon <yann.charbon@ik.me>
Co-authored-by: Jerome Coutant <jerome.coutant@st.com>
Co-authored-by: Saheer Babu <saheer.babu@arm.com>
Co-authored-by: Martyx00 <martin.petran@protonmail.com>
Co-authored-by: Yilin Sun <imi415@imi.moe>
Co-authored-by: Martin Kojtal <martin.kojtal@arm.com>
Co-authored-by: akiroz <akiroz.vectis@gmail.com>
Co-authored-by: Charles <hallard04@free.fr>
Co-authored-by: Leonard Chiang <leochiang2002@gmail.com>
Co-authored-by: Chun-Chieh Li <ccli8@nuvoton.com>
Co-authored-by: jmcloud <jmcloud@tesla.com>
Co-authored-by: Augusto Zanellato <augusto.zanellato@gmail.com>
Co-authored-by: Sadik.Ozer <sadik.ozer@analog.com>
Co-authored-by: Mingjie Shen <shen497@purdue.edu>
Co-authored-by: Jasper Jonker <jasper.jonker@wingtra.com>
Co-authored-by: wdx04 <wdx04@outlook.com>
2023-05-17 01:18:28 -07:00
Jamie Smith d9d9f7003d
STM32 I2C v2 HAL: Fix repeated starts in transaction mode (#153)
* Try and fix repeated start for transactional I2C API

* Use OTHER_FRAME everywhere
2023-04-11 19:59:19 -07:00
Jamie Smith 5b28f5bc96
Rethink STM32 I2C v2 HAL (#78)
* Initial attempt at rethinking the STM32 I2C v2 HAL.  Makes single-byte work properly and adds a new 'state' variable to track what the hardware is doing.

* Fix some initial test failures

* Fix incorrect logic

* Fix more incorrect logic

* Tabs to spaces

* Fix repeated starts with single-byte API

* Fix race condition causing stop() after nacked address to sometimes break things

* Fix missed i2c structs that should have been removed

* Fix doing a repeated start from single-byte to transaction API causing I2C peripheral to lock up

* Fix xferOperation being set wrong for repeated starts, causing the peripheral to hang

* Fix race condition with repeated start after single-byte operation

* Fix compilation for targets that use I2C IP v1

* Fix initialization of XferOperation for API v1, optimize stop()

* Remove unneeded line

* Add docs for I2C events
2022-11-20 17:46:30 -08:00
Martin Kojtal 0b9a7740d5
Merge pull request #15099 from jeromecoutant/PR_H723
STM32H7: enable more custom boards
2021-09-29 15:18:00 +01:00
Jerome Coutant da903bf057 STM32H7 add subfamilies for custom boards
- STM32H723xG
- STM32H725xE
- STM32H750xB
2021-09-22 15:13:31 +02:00
Jerome Coutant b711180838 STM32G0: update from STM32Cube_FW_G0_V1.5.0 2021-09-21 11:29:33 +02:00
pennam ccf8995858 STM32 Fix i2c_compute_timing() API 2021-07-13 14:07:12 +02:00
Affrin Pinhero d8cbd68dc2 driver/i2c: STM32: Solves I2C driver performanc issue.
This commit solves issue related to i2c driver performance.
With this commit delay in read write when using i2c timing
algorithm is solved. Used flag mechanism which will check
tim reg value and hz passed.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-07-02 10:54:16 +05:30
Martin Kojtal 8188f5f5ab
Merge pull request #14776 from affrinpinhero-2356/i2c_longTime_Mem_Solve
driver/i2c: STM32: I2C memory usage and time delay in read-write solved.
2021-06-29 11:30:02 +02:00
Affrin Pinhero 8f24f09df7 driver/i2c: STM32: Solves excess memory usage issue.
This commit solves excess usage of RAM. User can now enable/disable
I2C timing algorithm. Disabling of I2C timing algorithm would
reduce RAM usage.

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-06-28 18:13:02 +05:30
Martin Kojtal b74f62c974
Merge pull request #14659 from arduino/i2c_slave_patch
STM32: make i2c_salve_read return the number of bytes read
2021-06-10 14:10:31 +02:00
Affrin Pinhero 4a8b2301a5 STM32: Fixed I2C Bug reported.
Modified HAL_I2C_ErrorCallback function to solve bug reported in I2C Driver.
This commit solves compilation error occured when DEVICE_I2CSLAVE is not defined.

fix #14696

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-05-27 15:02:39 +05:30
pennam d317dfccbb make i2c_salve_read return the number of bytes read to let mbed-os read API return an error if less bytes are readed 2021-05-25 08:46:02 +02:00
Anna Bridge 10a2da9b5e
Merge pull request #14668 from ikmdani/fix_i2c_read_13967
Driver: I2C: STM32F2/STM32F4/STM32L1: Fix alternate i2c read.
2021-05-24 13:14:36 +01:00
Anna Bridge 5ef56cc6f4
Merge pull request #14557 from affrinpinhero-2356/feature_i2cTiming_Calculation
STM32: driver/Added I2C timing calculation algorithm
2021-05-24 13:09:19 +01:00
Affrin Pinhero d974b47439 driver/i2c: Added I2C timing calculation function.
This commit adds I2C timing value automatic calculation algorithm
for all supported families added. This patch improves I2C timing calculation
according to I2C input clock and I2C bus speed.
This commit also allows user to change the system clock and I2C input clock.

Related issue: #12907

Pull request type:
[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results:
[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-05-19 18:35:47 +05:30
Krishna Mohan Dani 8f2c45c5af Driver: I2C: STM32F4: Fix for every alternate i2c read failure in F2, F4 & L1 families.
This commit fixes the i2c driver issue reported in the below link:
https://github.com/ARMmbed/mbed-os/issues/13967 on STM32F4xx platform.

The data type of XferOperation has been changed from uint8_t to uint32_t
so that it can hold a 32bit value (for example: I2C_OTHER_FRAME or
I2C_OTHER_AND_LAST_FRAME).

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-05-17 18:20:00 +05:30
Affrin Pinhero b5f864d96d Updated HAL_I1C_ErrorCallback funtion to store information about error reason in obj_s->event. This will help user or application to check the reason for the error caused. This address the issue reported in the below link: ARMmbed/mbed-os#14059
Summary of changes:

Impact of changes

Migration actions required

Pull request type
[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)

Test results

[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR

Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
2021-05-06 14:37:04 +05:30
jeromecoutant 34f02ff573 STM32 I2C : correct deinit
Set port mode back to Analog (reset value)
2021-03-16 15:05:37 +01:00
Martin Kojtal 1dd411268b
Merge pull request #14030 from arduino/i2c_stm32_wrong_clock
STM32H7: Compute I2C timing according current I2C clock source
2021-02-15 14:38:11 +00:00
jeromecoutant 4550f92565 STM32WL : I2C full support 2021-02-08 17:19:05 +01:00
reme 5a2835c18c STM32WL : ADDING STM32 SUPPORT
Add code concerning all STM32 platforms
2021-02-05 08:04:31 +00:00
pennam 6db7342cf6 manage I2C_IP_VERSION_V1 boards builds 2021-02-03 15:14:42 +01:00
pennam 506390bcf8 Increase FLAG_TIMEOUT to avoid misleading triggers 2021-02-01 09:13:33 +01:00
pennam 7544f7ef24 Use the proper clock source for any I2C instance 2021-02-01 09:13:21 +01:00
jeromecoutant b01940200c STM32 I2C: use correct HAL API 2020-11-19 12:03:48 +01:00
jeromecoutant bc4bc05908 STM32 warning remove 2020-04-24 10:57:45 +02:00
Maciej Bocianski 0b634e54b4 implement i2c_free for STM family 2020-01-31 14:51:54 +01:00
jeromecoutant c1386cf52d STM32L5 : update generic STM files for L5 2020-01-23 17:54:55 +01:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel ba12228556 Explicit pinmap: Fix build failures reported by CI 2019-11-28 08:32:03 +01:00
Przemyslaw Stekiel 2185e80e08 STM32F4 I2C driver: Add explicit pinmap support 2019-11-28 08:31:59 +01:00
Alexandre Bourdiol affe7113ef TARGET_STM: Remove timeout on HSEM.
With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
2019-11-27 14:25:43 +01:00
Martin Kojtal 9db54bc1ee
Merge pull request #11672 from ABOSTM/I2C_FASTMODEPLUS
STM32F767ZI - I2C FastModePlus not properly enabled
2019-10-22 09:46:16 +02:00
Alexandre Bourdiol 728a1c4383 STM32F767ZI - I2C FastModePlus not properly enabled 2/2
Warning: sometimes I2C_FASTMODEPLUS_I2Cx is defined,
even if not supported by some chip within the family
2019-10-15 13:46:29 +02:00
Alexandre Bourdiol adcf0e2fa5 DISCO_H747I Dualcore support
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.
2019-10-14 18:02:57 +02:00
Alexandre Bourdiol 66765332e0 STM32F767ZI - I2C FastModePlus not properly enabled
Fixes #11659
2019-10-10 10:26:59 +02:00
Alexandre Bourdiol de121a308a Fix I2C issue with test mbed_hal_fpga_ci_test_shield
On last case #5 there was a last unexpected read.
It happened when stop condition was generated
2019-08-26 14:01:23 +02:00
Alexandre Bourdiol 7910de2f38 TARGET_STM: Fix I2C sequential communication
Keep former behaviour for I2C V1.
For I2C V2:
Use only I2C_FIRST_FRAME, I2C_FIRST_AND_LAST_FRAME and I2C_LAST_FRAME,
thus we avoid using reload bit.
Reload suppose the next frame would be in the same direction,
but we have no guarranty about this. So we cannot use reload bit.
Note: in case of 2 consecutive I2C_FIRST_FRAME,
a restart is automatically generated only if there is direction change in the direction.
2019-08-23 16:26:19 +02:00
jeromecoutant 5d80f9e98f STM32: remove compilation warning 2019-06-07 18:08:39 +02:00
Michael Coulter c59c1cb29d Fix for i2c_t object not being initialized to 0 causing timeout
For issue #9890
2019-03-05 11:35:18 -06:00
Russ Butler 22a89773fa Add HAL API for i2c pinmap
Add the functions i2c_master_sda_pinmap, i2c_master_scl_pinmap,
i2c_slave_sda_pinmap and i2c_slave_scl_pinmap to all targets.
2019-02-08 09:10:12 -06:00
jeromecoutant b1a284a876 STM32: astyle check 2019-01-10 10:22:21 +01:00