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2524 Commits (bc860db7c512ac7bf8bddcf88383303ab3e88844)

Author SHA1 Message Date
Martin Kojtal fbe04097c7
Merge pull request #13601 from AGlass0fMilk/fix-g474-adc 
Fix AnalogIn implementation on STM32G4 series
 2020-09-30 16:12:18 +01:00
Martin Kojtal 21652971a5
Merge pull request #12644 from macronix/macronix_ospi 
Add OSPI driver to support the Octa mode of Macronix octaflash MX25LM51245G
 2020-09-30 16:07:20 +01:00
Martin Kojtal 1f868f96de
Merge pull request #13646 from boraozgen/bugfix/system-clock-weak 
Make STM32F412xG system_clock.c functions weak
 2020-09-30 16:01:02 +01:00
Martin Kojtal 1dea16bc58
Merge pull request #13611 from alcheagle/stm32l071xx-fixes 
Edit on Toolchain linker files for stm32L071xx target
 2020-09-30 16:00:20 +01:00
Martin Kojtal f3d91fdba1
Merge pull request #13633 from jeromecoutant/PR_WB_FLASH_BARE 
STM32WB: FLASH compilation issue with baremetal
 2020-09-23 15:58:38 +01:00
Martin Kojtal cd9a0d1f49
Merge pull request #13634 from jeromecoutant/PR_L4_IAR 
STM32L4: link issue with IAR
 2020-09-23 15:57:35 +01:00
Martin Kojtal 60cbab381d
Merge pull request #13640 from isaev-d/fix-pll-stm32h743 
STM32: Fix system clock setup for XTAL and/or internal source on STM32H743
 2020-09-23 10:53:58 +01:00
Bora Özgen 011cd19175 Remove weak statement for HSI clock config 2020-09-23 10:59:00 +02:00
Martin Kojtal 66423948e0
Merge pull request #13645 from boraozgen/bugfix/stm32f412xg_usart3 
Patch STM32F4 HAL to fix F412CG USART3 issue
 2020-09-22 16:24:49 +01:00
George Beckstein 76d488ded1 Revert sampling time decrease and remove todos. 2020-09-22 09:32:14 -04:00
Andrea Gilardoni b99702094c fixing nvic num 2020-09-22 09:46:48 +02:00
Dmitriy Isaev 8597f6ae12 Removed excess space simbol. Also runtime config check changed to compile time check. 2020-09-21 20:17:45 +03:00
jeromecoutant bbc7355df5 Merge internal ADC channel changes from ST 
Co-authored-by: jeromecoutant <jerome.coutant@st.com>
 2020-09-21 12:26:23 -04:00
George Beckstein bbc15f65c0 Implemented adc deinitialization functionality 2020-09-21 12:19:50 -04:00
George Beckstein e9d6c9c0b1 Fix AnalogIn implementation on STM32G4 series 2020-09-21 12:19:50 -04:00
Bora Özgen 401a6b4f2b Apply review suggestions 2020-09-21 14:52:22 +02:00
Bora Özgen 9623d4e7fc Make system_clock.c functions weak 2020-09-21 13:51:29 +02:00
Bora Özgen 9b56a4cb82 Patch STM32F4 HAL to fix F412XG USART3 issue 2020-09-21 13:27:20 +02:00
Dmitriy Isaev 3f83163a63 Fixed system clock setup for XTAL and/or internal source on stm32f743 chips. 2020-09-20 16:26:25 +03:00
jeromecoutant 0af260fe43 STM32L4: link issue with IAR 2020-09-18 12:27:53 +02:00
jeromecoutant 49ceb3c4b6 STM32WB: FLASH compilation issue with baremetal 2020-09-18 11:47:15 +02:00
Martin Kojtal 75544a7ce0
Merge pull request #13565 from m-ecry/feature-stm32g4-can-support 
Feature stm32g4 can support
 2020-09-17 15:08:46 +01:00
Martin Kojtal 3801f6e389
Merge pull request #13406 from Allmoz/master 
STM32F1 USBDevice
 2020-09-17 08:56:03 +01:00
m-ecry 73493b909a STM-can-api: Fixed variable name for H7 
- can_frequency uses f instead of hz for can frequency
 - Also added comment to system_clock
 2020-09-16 17:35:32 +02:00
Andrea Gilardoni 1d77cfa08b trying to fix startup file 2020-09-16 08:41:41 +02:00
rogeryou 48524f25ae add opsi driver 2020-09-16 11:27:23 +08:00
Andrea Gilardoni 303b3c28b6 making some cleaning 2020-09-15 11:25:47 +02:00
Andrea Gilardoni d5adca141b Edit on Toolchain linker files 
Previous one were not working, using nucleol073RZ files
 2020-09-15 11:13:03 +02:00
m-ecry 2a13fa199d STMG4-sys-clk: If can PLLQ=160MHz, else 170MHz 
- with 170MHz as can-core-frequency, the accuracy for many baudrates is
too low. 160MHz is better for a broad range of frequencies
 2020-09-14 18:15:41 +02:00
m-ecry d0c8ad75e1 STM-can-api: Support reading of remote_msg 
- Previously a received msg was fixed of data_type
 2020-09-14 18:10:48 +02:00
m-ecry 13b663397f STM-can-api: Added usage of prescaler 
- This enables more frequencies, but without regard to the accuracy.
May still require manual clock setup, to remain in tolerance window
 2020-09-14 16:29:12 +02:00
Martin Eckardt 35c9e7a5ad Use HAL function for FDCAN_CLK-calculation 
- Thanks to @jeromecoutant for showing the HAL funtion
 - Added #ifdef guard to FDCAN2/3 handler functions
 2020-09-14 15:24:14 +02:00
Martin Kojtal 47e943af2d
Merge pull request #13558 from jeromecoutant/PR_L4PLUS_SRAM3 
STM32L4+ : SRAM3 is powered off in deepsleep
 2020-09-10 14:03:32 +01:00
Martin Kojtal 468372e759
Merge pull request #13492 from talorion/fix-PwmOut-resets-after-suspend 
Fix pwm out resets after suspend
 2020-09-10 12:40:18 +01:00
Martin Kojtal a17a481c54
Merge pull request #13583 from jeromecoutant/PR_ARDUINO_PIN 
STM32: correct few Arduino pins value
 2020-09-10 12:38:02 +01:00
Jaeden Amero 612b148fd4 stack: armc: Workaround config passing bug 
Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
 2020-09-10 10:08:38 +01:00
Jaeden Amero 39e69d328d Use boot stack size from config system 
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319
 2020-09-10 10:08:38 +01:00
jeromecoutant 668412ccde NUCLEO_L433RC_P: wrong D0 and D1 pins 2020-09-10 10:05:41 +02:00
jeromecoutant 5bcb02a013 DISCO_L072CZ_LRWAN1: wrong A1/A3/A4/A5 pin values 2020-09-10 10:05:41 +02:00
jeromecoutant e695db9944 NUCLEO_F207ZG: change default SPI_MOSI pin to match Arduino standard 2020-09-10 10:05:40 +02:00
jeromecoutant 3e653223d2 NUCLEO_F303ZE: wrong D1 pins 2020-09-10 10:05:40 +02:00
jeromecoutant 88fcd669d4 NUCLEO_L552ZE_Q: wrong D0 and D1 pins 2020-09-10 10:05:40 +02:00
Martin Kojtal 3b5ab54618
Merge pull request #13542 from jeromecoutant/PR_DISCO_L4S 
B_L4S5I_IOT01A: new ST target
 2020-09-09 15:54:27 +01:00
Martin Kojtal 1f6fe470e1
Merge pull request #13564 from More-Wrong/LSI-for-STM32Gx 
STM32Gx: LSI clock selection when LSE is not available
 2020-09-09 15:16:44 +01:00
jeromecoutant d804167816 STM32L4S5xI: B_L4S5I_IOT01A new target 2020-09-09 15:19:21 +02:00
jeromecoutant c65ad59ccd STM32L4S5xI introduction 2020-09-09 15:19:11 +02:00
jeromecoutant b65afe028e STM32H7 ADC: clock selection lost after deepsleep 2020-09-08 11:40:02 +02:00
talorion e117ef5c3c use descriptive variable names 2020-09-08 10:54:09 +02:00
Robert 14ac4064b7 STM32Gx: LSI clock selection when LSE is not available 2020-09-07 14:47:11 +01:00
jeromecoutant e650470206 STM32L4+ : SRAM3 is powered off in Stop 2 mode 
By default, SRAM3 content is then lost.
 2020-09-07 09:48:02 +02:00