Commit Graph

67 Commits (a5b15a75be11ef170b2d333147f433ea0a54373d)

Author SHA1 Message Date
jeromecoutant a1570f936f STM32WB : Add ReadMe file
Help on FW update procedure
2020-02-20 09:20:44 +01:00
jeromecoutant 9d016022b6 STM32WB clean SetSysClock 2020-02-20 09:20:44 +01:00
jeromecoutant ebae0e56d4 STM32WB align deepsleep functions with CubeFW 2020-02-20 09:20:43 +01:00
Martin Kojtal 7fd5119b89
Merge pull request #12341 from fkjagodzinski/fix-stm-hal_fpga
STM32L4: Fix the UART RX & TX data reg bitmasks
2020-02-10 13:21:31 +00:00
jeromecoutant 2368a07244 STM32: Fix the UART RX & TX data reg bitmasks 2020-02-07 16:23:50 +00:00
jeromecoutant 25da13bc18 STM32WB remove extra file 2020-01-23 10:53:09 +01:00
jeromecoutant 3657f902d3 STM32Cube_FW_WB_V1.4.0 - STM32WB55xx part 2020-01-20 17:24:46 +01:00
jeromecoutant 7a5da6109f STM32Cube_FW_WB_V1.4.0 - STM32WB50xx part 2020-01-20 17:24:46 +01:00
jeromecoutant c39a13d10c STM32Cube_FW_WB_V1.4.0 - template part 2020-01-20 17:24:45 +01:00
jeromecoutant b4f3b0799d STM32Cube_FW_WB_V1.4.0 - STM32_WPAN part 2020-01-20 17:24:45 +01:00
jeromecoutant 08184d7ac9 STM32Cube_FW_WB_V1.4.0 - HAL_DRIVER part 2020-01-20 17:24:44 +01:00
jeromecoutant d6e4b15c1a STM32Cube_FW_WB_V1.4.0 - CMSIS part 2020-01-20 17:24:43 +01:00
jeromecoutant 339846a1bb STM32WB cleanup
- BLE feature is mandatory
- remove clock source selection
- license alignment
- startup file from Cube delivery
- linker script alignement
2020-01-20 17:24:28 +01:00
jeromecoutant 8f6171f8b0 STM32WB - BLE restructure 2020-01-20 16:10:55 +01:00
jeromecoutant 8c76a43d3c STM32WB - New directory structure 2020-01-20 16:10:55 +01:00
Alexandre Bourdiol 9e3ad13d5e TARGET_STM: fix flash api 64bit address alignment on L4 and WB 2019-12-11 18:32:42 +01:00
Kevin Bracey fe22bc023e Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-12-02 14:45:37 +02:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
Martin Kojtal a1cddbae5f
Merge pull request #11938 from LMESTM/stm32_serial_clear_rxne
STM32: Update and align serial_clear implementations
2019-11-27 16:30:11 +01:00
Alexandre Bourdiol 41b038a028 TARGET_STM: rework hal_sleep management to be compatible with all STM32 families 2019-11-27 14:25:30 +01:00
Martin Kojtal 5f7ecea00b
Revert "MbedCRC and CRC HAL revisions" 2019-11-26 13:45:37 +00:00
Laurent Meunier f20529f9e6 STM32: Update and align serial_clear implementations
Clear RXNE flag by reading the RX register and align this implementation
on all families.
2019-11-25 14:55:32 +01:00
Kevin Bracey 1f94428a56 Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-11-13 14:31:49 +02:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 0e1a04b64a STM32WB USB pins addition 2019-10-21 17:11:57 +02:00
Laurent Meunier e862438fad Clearing UART TC Flag prevents deep sleep, so do not clear it
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.

The impact is that it may prevent deep sleep to be entered.

Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
2019-10-15 15:59:51 +02:00
jeromecoutant 8c1f94f7cb STM32WB : LSI clock selection when LSE is not available 2019-09-19 13:07:54 +02:00
Martin Kojtal f51bbe01c8
Merge pull request #11471 from jeromecoutant/PR_WB_ADC
STM32WB ADC : consecutive VBAT reading
2019-09-16 13:19:09 +02:00
jeromecoutant ee8489f4e9 STM32WB ADC : Consecutive VBAT values reading was not possible
Add Stop after read
2019-09-12 12:55:41 +02:00
jeromecoutant db7efabfd5 STM license file update
Some code have been copied from ST Cube deliveries.
ST copyright is then needed.
2019-09-10 14:24:48 +02:00
Martin Kojtal de84004be1
Merge pull request #11189 from LMESTM/pwmout_cpp_guard
__cplusplus guard fixed pwmout_device.h for STM32 families
2019-08-13 11:19:24 +02:00
Laurent Meunier 319223ac16 __cplusplus guard fixed pwmout_device.h for STM32 families
This bug prevented using this header in cpp code directly.
2019-08-09 09:51:39 +02:00
Yuan Cao 6ed21ee1c0 Fixed serial_device IRQ infinite loop bug due to uint8_t overflowing 2019-07-13 00:05:25 -04:00
Martin Kojtal 61c4d05ce9
Merge pull request #10824 from ABOSTM/PRSTM32_PWMWRTIE_GLITCH_10734
STM32: pwmout_write: configure channel only when not already enabled
2019-06-28 14:24:14 +01:00
Martin Kojtal 924af9481e
Merge pull request #10841 from VVESTM/vve_10827_spi_count
TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
2019-06-26 09:09:38 +01:00
Martin Kojtal b0073bb70d
Merge pull request #10774 from fkjagodzinski/fix-uart_irq
Fix serial IRQ handling
2019-06-25 15:49:41 +01:00
Alexandre Bourdiol a339084684 STM32: pwmout_write: configure channel only when not already enabled
Fix PWM glitch on write(), TARGET_STM/pwmout_api.c, #10734
2019-06-20 17:49:16 +02:00
Vincent Veron 31eb49b918 TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
Extend to all STM targets the work done on PR10752.

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-06-14 14:15:56 +02:00
jeromecoutant 5ac7c8c77e STM32WB warning compilation
[-Wparentheses-equality]
2019-06-07 18:11:16 +02:00
Filip Jagodzinski 14b83e7fdf STM32WB: Fix serial IRQ handling
Check that the RX or TX interrupt is enabled before calling
a registered handler with RxIrq or TxIrq arg.
2019-06-07 15:36:21 +02:00
jeromecoutant d919498745 STM32: common cmsis.h and device.h 2019-05-27 16:27:41 +02:00
Martin Kojtal a2cde2e24e
Merge pull request #10570 from jeromecoutant/PR_ASTYLE
STM32 astyle updates
2019-05-14 09:22:18 +01:00
jeromecoutant 0352bbbd5b STM32 astyle updates 2019-05-10 15:32:05 +02:00
Laurent Meunier e3a72eac9e Typo fix for MBED_APP_SIZE 2019-05-09 10:28:20 +02:00
Laurent Meunier fcc375f5c9 Update FLASH_SIZE backup value
By default, FLASH_SIZE should be read from HW.
In case this is not the case, we define it here, as the size of FLASH
that is available to the application running on M4.
2019-05-06 11:31:37 +02:00
Laurent Meunier 89eef1b490 STM32WB: Update Flash size
the flash is shared and split between cortex-M4 that
runs (mbed-os) application and the cortex-M0+ that
runs the BLE firmware.

The 512K allocated to the application was a
conservative that can now be updated.

With recent up-to-date BLE firmware flashed @ 0x080CB000,
there should be 812K available to application.

But there are boards out there that don't have an up-to-date
firmware, so we're keeping an intermediate, safer,
application size of 768K.
2019-05-06 11:31:37 +02:00
Laurent Meunier b0f4815261 STM32WB: ADC INTERNAL CHANNEL reset after read
Internal channels use is enabling ADC "internal path" which needs
to be disabled after measurement.

Same applied here for WB family as was done for others in #10143.
2019-03-29 16:21:46 +01:00
Laurent Meunier c6277988c6 STM32WB: Only configure default peripherals in SetSysClock
Typically the RTC clock is configured by RTC driver itself.

RNG on the other hand is shared with M0+ core and it is expected that
M4 turns it on at boot time.
2019-03-29 16:21:46 +01:00
Laurent Meunier a744343931 STM32WB: disable debug lines when not needed
When doing so, do not disbale GPIO clocks as they may be used by other
drivers !

As a result, debug will be disabled by default, but can be enabled by
either modifying code or selecting MBED debug profile.
2019-03-29 16:21:46 +01:00