The NRF52_DK and DELTA_DFBM_NQ620 have the SWO pin (p0_18) mapped to
LED2. This means that on startup LED2 turns on after the ITM is
initialized which is confusing. Since most users want LED2 usage
instead of SWO we remove the ITM for these targets.
The nRF52 readme is updated to instruct users how to get SWO support
if they need it.
Add the functions qspi_master_sclk_pinmap, qspi_master_ssel_pinmap and
qspi_master_data0_pinmap-qspi_master_data3_pinmap to all targets with
qspi support.
Use new atomics (exchange, load, store and bool types) to simplify
and improve the atomics in the nRF52 serial HAL.
* Ensure mutexes are released last and atomically when done
done inside a critical section.
* Compare-and-swap is not required for the spinlock - exchange is
sufficient. (Not clear a spinlock is needed anyway, but left in).
* Remove unneeded volatile, and make mutexes bool.
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
When using UARTSerial sending data over the uart follows the sequence
below:
<-TX done ISR runs and sets a software interrupt to pending
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler which sends bytes until the uart
buffer filled (writeable returns false). Sending a byte
re-enables the TX done interrupt continuing the cycle
Due to this sequence, if the UARTSerial TX handler does not send a byte
then the transmit state machine mentioned above will get stuck with
the TX done interrupt disabled. The events causing this failure:
<-TX done ISR runs and sets a software interrupt to pending
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler:
-checks writeable which is true and sends a byte
<- interrupted by a higher priority interrrupt
<- TX done ISR runs, setting software interrupt to
pending again
-checks writeable which is true and sends a second byte
-Software interrupt finishes
<-Software interrupt fires:
-disables TX done interrupt
-calls UARTSerial TX handler:
-checks writeable which is false and DOES NOT SEND A BYTE
-Software interrupt finishes, the TX interrupt is still disabled
*-Byte gets sent but TX done ISR does not fire
This patch prevents the TX lockup by removing the code in the
software interrupt which disables the TX done interrupt. Disabling the
TX done interrupt at this point is not necessary so this code is safe
to remove.
When initializing serial disable all interrupts as some of these may
have been enabled by a bootloader. This ensures that the NRF52
serial driver remains compatible with any bootloader version.
Make the following enhancement:
-Support serial port use without flow control
-Prevent dropped bytes by updating flow control handling
-Remove dead code
Serial port use without flow control:
In the prior implementation there was a window of time between
reloading DMA buffers after a timeout where bytes could be dropped.
This is because the uart needed to be turned off in order to flush the
bytes in the DMA buffer.
This change configures the DMA buffer to only receive one byte at a
time so there is no need to disable the uart to flush it. After each
byte is received the DMA transfer will be over so the transfer will
never be partially complete and need flushing. Since the uart is
always on it is safe to use it even without flow control.
Prevent dropped bytes by updating flow control handling:
To prevent dropped bytes due to high latency the flow control handling
of the RTS line was configured to be asserted automatically by
hardware after each byte. Once the CPU has read the byte and setup
the next receive buffer the RTS line is deasserted to the transfer can
continue. This ensure that when flow control is enabled data won't be
lost due to interrupt latency.
Remove dead code:
With the above changes there is a lot of dead code, such as the timer
handling code. This patch removes the code that is no longer used.
Busy-wait before sending a charecter instead of after. If
serial_writeable has been called first, the busy-wait loop will
be skipped.
Added initialization code to ensure NRF_UARTE_EVENT_TXDRDY is
armed correctly.
In nordic_nrf5_uart_event_handler if the events NRF_UARTE_EVENT_ENDRX
and NRF_UARTE_EVENT_RXSTARTED become pending after the check for
NRF_UARTE_EVENT_ENDRX but before the check for
NRF_UARTE_EVENT_RXSTARTED the RX DMA buffers will be setup incorrectly
by nordic_nrf5_uart_event_handler_rxstarted because active_bank hasn't
been updated. This cause dropped and incorrect data.
This patch fixes that problem by adding a second check for
NRF_UARTE_EVENT_ENDRX after checking for NRF_UARTE_EVENT_RXSTARTED
and skipping processing if NRF_UARTE_EVENT_ENDRX is set. The
subsequent interrupt will process both in the correct order. This
ensures that these events cannot be handled out of order and thus fixes
the corruption.
Due to buggy flow control logic in the UARTE, the stop signal
is not being set as it is supposed to when the the module is
not ready to receive data.
This commit signals the sender to halt transmitting when a DMA
buffer is full and only continue again when the atomic FIFO
buffer has been emptied. This allows platforms with hardware
flow control to minimize all buffers and rely on flow control
instead.
The preprocessor based macro check #if evaluates all
enums as 0 and hence the code does not get compiled.
Since move this to a runtime check where the pin variable
can be correctly evaluated.
Delete mbed_overrides.c as it has a target specific mbed_sdk_init() to
resolve linking problem.
This is a follow on patch to:
https://github.com/ARMmbed/mbed-os/pull/8046
While investigating the RX issue on NRF52_DK after SDK 14 updates,
it is observed that the RX FIFO doesn't get filled up, when the
flow control is disabled. Hence the readable never returns true.
If using Serial interface, the stdio file handles (0, 1, 2) get opened.
This results in configuring the flow control for STDIO, and it is observed
that the RX FIFO gets filled.
However, if RawSerial is used, the STDIO file handles
don't get opened. During the debug process it was observed that if the
flow control is configured once and then set to disabled, RX worked
as expected.
Alternative to this approach is that user application specifically
enables flow control as done in mbed's Greentea test suite. See https://goo.gl/r8nBYH
See https://goo.gl/8VB2qg step 14 for _initio's description.
See test code to reproduce the issue and test fix here: https://goo.gl/AQU1xG
Description
The change in behavior with NRF52's UART RX is documented here. #6891
This change is a fix for the above issue.
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
While investigating the RX issue on NRF52_DK after SDK 14 updates,
it is observed that the RX FIFO doesn't get filled up, when the
flow control is disabled. Hence the readable never returns true.
If using Serial interface, the stdio file handles (0, 1, 2) get opened.
This results in configuring the flow control for STDIO, and it is observed
that the RX FIFO gets filled.
However, if RawSerial is used, the STDIO file handles
don't get opened. During the debug process it was observed that if the
flow control is configured once and then set to disabled, RX worked
as expected.
Alternative to this approach is that user application specifically
enables flow control as done in mbed's Greentea test suite. See https://goo.gl/r8nBYH
See https://goo.gl/8VB2qg step 14 for _initio's description.
See test code to reproduce the issue and test fix here: https://goo.gl/AQU1xG
Description
The change in behavior with NRF52's UART RX is documented here. #6891
This change is a fix for the above issue.
There are scenarios where putc is called within a critical section, e.g
to log ASSERTs in early initialization code. The interrupts being
disabled here prevents the handlers for the UARTE from executing.
This breaks the tx_in_progress flag based approach. The tx_in_progress
never gets reset. Poll on the TXDRDY instead.
It can be recreated with a simple program as shown here:
*************** Current Behavior ****************
++ MbedOS Error Info ++
Error Status: 0x80FF0100 Code: 256 Module: 255
Error Message: F
************** With Fix *************************
++ MbedOS Error Info ++
Error Status: 0x80FF0100 Code: 256 Module: 255
Error Message: Fatal Run-time error
Location: 0x2C0A9
Error Value: 0x0
Current Thread: Id: 0x20005520 Entry: 0x30EBF StackSize: 0x1000 StackMem: 0x20004520 SP: 0x20005490
For more info, visit: https://armmbed.github.io/mbedos-error/?error=0x80FF0100
-- MbedOS Error Info --
nrf failure at .\main.cpp:22
***************************************************
Deleted lines that caused the problem. Note that, in nrf_drv_pwm_init there are lines that check if pwm instance is already running, so we don't even need to check it in nordic_pwm_init.
nrf_drv_uninit should be used in nordic_pwm_restart.
This PR provides implementation of ticker_free() function for the following boards:
ARCH_PRO
EV_COG_AD3029LZ
EV_COG_AD4050LZ
K22F
K64F
K82F
KW24D
KW41Z
LPC546XX
NRF51_DK
NRF52_DK
NUCLEO_F207ZG
NUCLEO_F401RE
NUCLEO_F429ZI
NUCLEO_F746ZG
REALTEK_RTL8195AM
i2c_api implementation for NRF52 does a disable() followed by uninit().
The uniinit() implementation in NRF drivers layer makes another call to
disable. This throws off the state of the I2C instance leading to an
assert. Since the disable is only invoked from the I2C API layer for
Nordic, remove this redundant call.
Signed-off-by: Naveen Kaje <Naveen.Kaje@arm.com>
The ITM must be initialized before the SoftDevice, but due to the
lazy initialization in C++ on (at least) GCC the ITM init call
might happen too late.
This commit moves the initialization code into the NRF52 system
startup file.
Senthil Ramakrishnan
j3hill
Cruz Monrreal
deepikabhavnani
RFulchiero
Russ Butler
Kevin Bracey
Przemyslaw Stekiel
Martin Kojtal
Alastair D'Silva
Wilfried Chauveau
Russ Butler
Marcus Chang
Ashok Rao
David Saada
Naveen Kaje
Andrew Leech
Yossi Levy
Jammu Kekkonen
Maciej Bocianski
Martin Kojtal
MateuszM
Jiwon Yune
Jiwon Yune