This commit solves issue related to i2c driver performance.
With this commit delay in read write when using i2c timing
algorithm is solved. Used flag mechanism which will check
tim reg value and hz passed.
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
This commit solves excess usage of RAM. User can now enable/disable
I2C timing algorithm. Disabling of I2C timing algorithm would
reduce RAM usage.
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
Modified HAL_I2C_ErrorCallback function to solve bug reported in I2C Driver.
This commit solves compilation error occured when DEVICE_I2CSLAVE is not defined.
fix#14696
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
This commit adds I2C timing value automatic calculation algorithm
for all supported families added. This patch improves I2C timing calculation
according to I2C input clock and I2C bus speed.
This commit also allows user to change the system clock and I2C input clock.
Related issue: #12907
Pull request type:
[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)
Test results:
[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
This commit fixes the i2c driver issue reported in the below link:
https://github.com/ARMmbed/mbed-os/issues/13967 on STM32F4xx platform.
The data type of XferOperation has been changed from uint8_t to uint32_t
so that it can hold a 32bit value (for example: I2C_OTHER_FRAME or
I2C_OTHER_AND_LAST_FRAME).
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Summary of changes:
Impact of changes
Migration actions required
Pull request type
[x] Patch update (Bug fix / Target update / Docs update / Test update / Refactor)
[] Feature update (New feature / Functionality change / New API)
[] Major update (Breaking change E.g. Return code change / API behaviour change)
Test results
[] No Tests required for this change (E.g docs only update)
[x] Covered by existing mbed-os tests (Greentea or Unittest)
[] Tests / results supplied as part of this PR
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I -> for CM7 core
* DISCO_H747I_CM4 -> for CM4 core
Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)
Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.
Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
In order to flash CM4, one can use STM32 CubeProgrammer tool.
Keep former behaviour for I2C V1.
For I2C V2:
Use only I2C_FIRST_FRAME, I2C_FIRST_AND_LAST_FRAME and I2C_LAST_FRAME,
thus we avoid using reload bit.
Reload suppose the next frame would be in the same direction,
but we have no guarranty about this. So we cannot use reload bit.
Note: in case of 2 consecutive I2C_FIRST_FRAME,
a restart is automatically generated only if there is direction change in the direction.
Need to ensure the transmission has been started before sending a STOP condition.
Issue found on the NUCLEO_H743ZI due certainly to the high-speed clock used.
But this is normally needed also on all STM32 devices using the I2C peripheral version 2.
As reported by MBED user Fran6Jack:
I2C bus are usually 5V tolerant on all STM32 processor.
If an external device on the I2C bus requires 5V operation,
we usually acheive it by using 5V external pull-ups on the bus.
Since signaling uses open-drain output on I2C for both signal SCL and SDA
any 5V tolerant MCU will work on a 5V I2C bus. Having pull-up activated on a 5V externally pull bus, cause the pin to clamp on the STM32 die diode and could damage the IC (There is a note in STM32 datasheet specifying this issue).
It is understood by all the community that I2C bus should always be
externally pulled by physical resistor. I2C initialization should then
be ALWAYS OpenDrainNoPull by default.
Up to now, this I2C driver was setting pull up by default as it helps
basic testing, like 1 master and 1 slave, conencted with 2 wires without
any external pull ups. This will not work anymore after this commit and
applications tests or examples needs to be modified to explicitely
configure pull ups ... But it is safer to follow reference manual
guidelines.
Jamie Smith
Jamie Smith
Charles
Martin Kojtal
Jerome Coutant
pennam
Affrin Pinhero
Anna Bridge
Krishna Mohan Dani
reme
Maciej Bocianski
Przemyslaw Stekiel
Alexandre Bourdiol
Michael Coulter
Russ Butler
bcostm
Laurent MEUNIER