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372 Commits (7095b82126b51ea4bde6df7760f694dd851a47b9)

Author SHA1 Message Date
jeromecoutant 9790f67acc STM32L4 QSPI: correct register address 2018-12-13 10:56:39 +01:00
jeromecoutant 40f6d58b89 STM32 QSPI: remove QUADSPI_BK2 as dual bank feature is not supported 2018-12-13 10:56:37 +01:00
jeromecoutant b5bc128e36 STM32L496 : add QSPI definition 2018-12-13 10:56:31 +01:00
jeromecoutant 7c8de3c4e1 STM32 : removed unused QSPI pin names 2018-12-13 10:56:25 +01:00
jeromecoutant 6b226ffcef STM32 RTC update for easy maintenance 2018-12-04 11:08:30 +01:00
Senthil Ramakrishnan ef8c1c3cb6 Linker script modifications for crash data region 2018-11-16 13:59:59 -06:00
Teppo Järvelin 1b3db96634 Cellular: Added missing MDMRTS and MDMCTS for TARGET_MTB_ADV_WISE_1570. 2018-11-13 09:06:40 +02:00
Cruz Monrreal II 6b386f5237 Merge branch 'update_peripheral_pins' of ssh://github.com/MultiTechSystems/mbed into rollup 2018-11-08 13:24:07 -06:00
David Saada 542744d03c Support erase value in Flash HAL drivers, FlashIAP and block devices 2018-11-07 14:23:07 +02:00
Leon Lindenfelser a360b0012f Update peripheral pins 
1. Add missing SPI and I2C pins.
2. Remove pin definitions for pins that are no connects.
 2018-11-06 08:46:38 -06:00
bcostm 66ab546200 NUCLEO_L4R5ZI: fix 8-bytes data alignment 2018-10-26 10:58:00 +02:00
micgur01 6c191c0241 code review for Update linker scripts for bootloader target L496GZ 2018-10-24 11:17:56 +00:00
micgur01 2215a9ab5e code review for Update linker scripts for bootloader target L496GZ 2018-10-24 09:48:05 +00:00
micgur01 534883046d change mode to 664 2018-10-23 12:58:52 +00:00
micgur01 ff4b567537 Update linker scripts for bootloader for L496GZ 2018-10-23 12:57:05 +00:00
Cruz Monrreal 4903f324a1
Merge pull request #8013 from deepikabhavnani/stm_fix_align 
STM32: Fix alignment of execute region to 8byte boundary
 2018-10-10 08:40:55 -05:00
Deepika bf1a2c8485 [ST]: Fix alignment of execute region to 8-byte boundary in ARM linker files 
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
 2018-10-09 14:47:14 -05:00
Martin Kojtal 17762b4998
Merge pull request #8263 from juhoeskeli/flash_api_stm32l4 
STM32L4: clear error programming flags before erase & program operations
 2018-10-09 10:33:50 -05:00
Cruz Monrreal 5a1c49fa6d
Merge pull request #8168 from jeromecoutant/PR_ADC_DISCOL496 
DISCO_L496AG : enable ADC
 2018-10-08 10:10:44 -05:00
Martin Kojtal 365d61e4a9
Merge pull request #7304 from cedrickkukela-cd/MTS_DRAGONFLY_L471QG_pull_request_feature_changes 
Add MTS dragonfly, MTS dragonfly l471
 2018-10-08 11:06:23 +02:00
Martin Kojtal 72fa1e0e8f
Merge pull request #8119 from jeromecoutant/PR_L4_ADC 
STM32L496 : wrong ADC init
 2018-10-05 19:53:25 +02:00
Martin Kojtal f7f6d4d2d8
Merge pull request #7585 from bcostm/dev_NUCLEO_L4R5ZI 
NUCLEO_L4R5ZI: add new platform
 2018-10-05 14:53:11 +02:00
Martin Kojtal 7a057d7ec8
Merge pull request #8085 from jeromecoutant/PR_RTC_LSI 
STM32 RTC : start LSI clock (for targets without LSE)
 2018-10-04 13:37:53 +02:00
Leon Lindenfelser 9f9a85830f Configure IAR stack size to 1KB 2018-10-02 13:34:16 -05:00
Juho Eskeli f7a030ef7c Remove redundant error flag clearing operation 2018-10-02 09:18:03 +03:00
bcostm 909ce3590a NUCLEO_L4R5ZI: set IAR linker stack size to 1KB 2018-09-27 12:03:08 +02:00
bcostm 5b4ff94bff NUCLEO_L4R5ZI: change _ALTx pins 2018-09-27 12:03:07 +02:00
bcostm ee5aff7e18 NUCLEO_L4R5ZI: remove PWM_5 pins as already used by us_ticker 2018-09-27 12:03:07 +02:00
bcostm a644ddd2e7 NUCLEO_L4R5ZI: enable bootloader 2018-09-27 12:03:07 +02:00
bcostm 3a722358b1 NUCLEO_L4R5ZI: add missing timer freeze macro 2018-09-27 12:03:07 +02:00
bcostm ef33ff5524 NUCLEO_L4R5ZI: add all board files 2018-09-27 12:03:07 +02:00
Leon Lindenfelser a80b2369c3 Decrease heap size in IAR linker so tests compile and use SRAM2 for IAR and GCC 2018-09-26 15:39:42 -05:00
Leon Lindenfelser 5ff0eb9d92 Rebase and changes for Dragonfly nano support 2018-09-26 15:39:42 -05:00
Leon Lindenfelser 31d04b05b7 Rebased on master mbed-os 9/7/18 
This required replacing hal_tick.h with us_ticker_data.h
 2018-09-26 15:37:33 -05:00
Leon Lindenfelser 3bb8543e5b Remove commented out code 2018-09-26 15:37:33 -05:00
Leon Lindenfelser 55bcf93574 Fixed spacing/tabs and clean up targets.json 2018-09-26 15:37:33 -05:00
Leon Lindenfelser fad95e9a7d Fix rev D radio init/power/reset and add back bootloader capability 2018-09-26 15:37:33 -05:00
cedrick kukela 463182d372 REV D change for modem on 2018-09-26 15:37:33 -05:00
cedrick kukela 1064994095 Rev c pin name fix 2018-09-26 15:37:33 -05:00
cedrick kukela 7f29f837d1 remove blanks 2018-09-26 15:37:33 -05:00
cedrick kukela 56fa71cbd3 delete file 2018-09-26 15:37:33 -05:00
cedrick kukela 50254bcc61 change startup and s file names to match target 2018-09-26 15:37:33 -05:00
cedrick kukela 5e1bb381cd fixing onboard modem init bug on mts dragonfly l471 2018-09-26 15:37:32 -05:00
cedrick kukela e2e5d9ed43 Ublox and PinName fixes 2018-09-26 15:37:32 -05:00
cedrick kukela c18eef804e adding TARGET MTS_DRAGONFLY_L471QG 2018-09-26 15:37:32 -05:00
Juho Eskeli 3a6b52fd15 Clear error programming flags before erase & program operations 2018-09-26 22:58:49 +03:00
jeromecoutant f510efff38 DISCO_L496AG : enable ADC 
See User Manual, VREF+ is not connected by default

NB: Use 2.5V as reference (instead of 3.3V)
for internal channels calculation
 2018-09-18 16:11:13 +02:00
Martin Kojtal b97ac0c353
Merge pull request #7787 from jeromecoutant/PR_MSI_LSE 
STM32L4 : code cleanup in MSI SetSysClock
 2018-09-17 14:22:29 +02:00
jeromecoutant 2a70879ffa STM32L496 : wrong ADC init 2018-09-13 16:31:49 +02:00
jeromecoutant 827c8bd486 STM32 RTC : remove not necessary macro 
__HAL_RCC_RTC_CLKPRESCALER is called in __HAL_RCC_RTC_CONFIG
 2018-09-11 14:14:19 +02:00