b225a5ca97
STM32F1xx : GCC_ARM remove zero bss done at startup.
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Zero bss is done after the call to _start.
2016-10-27 10:40:17 +02:00
702f64a6f2
STM32F0xx: GCC_ARM remove zero bss, in startup.
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zero bss is done in libc init after call to _start.
2016-10-27 10:40:02 +02:00
9f20c4641d
STM32F0xx : GCC_ARM use a call to _start which performs
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zero bss, C++ init and the call to main.
Remove direct call to __libc_init_array and main not needed
as _start is beeing called.
2016-10-27 10:39:02 +02:00
af090e3e6e
STM32L0xx : GCC_ARM remove zero bss, in startup.
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zero bss is done in libc init after call to _start.
2016-10-27 10:38:56 +02:00
479a1a2715
STM32L1xx : GCC_ARM remove zero bss, in startup.
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zero bss is done in libc init after call to _start.
2016-10-27 10:38:52 +02:00
f3b1c0a0c8
STM32L1xx : GCC_ARM a call to _start which performs
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zero bss, C++ init and the call to main.
Remove direct call to __libc_init_array and main not needed
as _start is beeing called.
2016-10-27 10:38:35 +02:00
8c4e6a42aa
Targets- NUMAKER_PFM_NUC47216 remove mbed 2
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crypto failures due to mbedtls dependency
2016-10-27 10:36:28 +02:00
6889c1368b
replace tab by 4 space char
2016-10-27 16:31:29 +08:00
da377aa5d8
Merge pull request #3121 from monkiineko/master
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STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH
2016-10-27 10:12:13 +02:00
b826d1bb1a
Merge pull request #3022 from hasnainvirk/ncs36510_fixes
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OnSemi RAM usage fix
2016-10-27 10:04:31 +02:00
c9c6428598
Merge pull request #3122 from SiliconLabs/SiliconLabs-cleanup-rebase
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[Silicon Labs] Update of Silicon Labs HAL
2016-10-27 09:56:16 +02:00
a7a53b7b6c
Merge pull request #3046 from mmorenobarm/master
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[BEETLE] Update BLE stack on Beetle board
2016-10-26 15:08:55 +02:00
a711ff360b
STM32F7xx : GCC_ARM remove zero bss, in startup.
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zero bss is done in libc init after call to _start.
2016-10-26 14:42:47 +02:00
93a0b9ce60
STM32L4xx : GCC_ARM remove zero bss, in startup.
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zero bss is done in libc init after call to _start.
2016-10-26 14:42:24 +02:00
ee22d0a054
STM32F4xx: GCC_ARM remove zero bss, in startup.
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zero bss is done in libc init after call to _start.
2016-10-26 14:41:45 +02:00
69a7481f26
Merge pull request #3085 from jeromecoutant/PR_LP_F303ZE
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Add LOWPOWERTIMER capability for NUCLEO_F303ZE
2016-10-26 13:55:57 +02:00
7499177a5b
Merge pull request #3076 from bcostm/fix_issue-2910_nucleo-f103rb
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STM32F1: Correct timer master value reading
2016-10-26 13:55:29 +02:00
bb824c6f91
mbed-os-tests-mbedtls-selftest issue fixed
2016-10-26 16:49:29 +05:30
5c89e1f07a
Merge pull request #3108 from pan-/nrf52_sleep_clean_fpu_irq
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Fix sleep function for NRF52.
2016-10-26 12:51:49 +02:00
99bd584070
Conflict resolved
2016-10-26 15:07:52 +05:30
4e4823053a
To resolve conflict
2016-10-26 15:00:19 +05:30
739ff674fc
Folder re-org to fit new MCU K22F variances
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This is a simple re-structure of the K22F folder to allow other MCU
variances to land here.
Created the MCU_K22F512 device but left the 'K22F' as a target for
the FRDM-K22F board.
Rebased to master
2016-10-26 10:29:15 +01:00
b6e06bd04b
LOAD_ADDRESS added
2016-10-26 14:43:21 +05:30
a9fe108266
[EFM32] NVIC virtualization was not committed for CM0
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This is a workaround to fix the breaking build until someone adds NVIC virtualization to the CM0plus CMSIS header
2016-10-25 09:51:25 -07:00
97eaed7b0a
STM32F3: Eliminate two unused variable warnings
2016-10-25 10:59:19 -04:00
4f9bdf5ee0
STM32F3: Correct UART4 and UART5 defines when using DEVICE_SERIAL_ASYNCH
2016-10-25 10:58:38 -04:00
ecff4225d4
Fixed the issue about push/pop of VFP register.
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When the floating-point calculation is executed into the processing which is called from IRQ handlers, VFP register is overwritten.
Therefore, we fixed the issue. we added the process to execute the saving (Push) and the returning (Pop) of VFP register in before and after the appropriate processing.
2016-10-25 19:31:38 +09:00
2175009bc5
Merge pull request #2938 from radhika-raghavendran/master
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InterruptIn changes in NCS36510 HAL.
2016-10-25 11:58:39 +02:00
4ec2f2e3ec
Merge pull request #2943 from nvlsianpu/nrf_nvic_set_vector_func_trzy
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[NRF5] NVIC_SetVector functionality
2016-10-25 11:10:03 +02:00
26bf6eb599
Merge pull request #3089 from NXPmicro/Remove_Clock_Init
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Kinetis HAL: Remove clock initialization code from serial and ticker …
2016-10-25 11:02:31 +02:00
4d1d1c5b69
Merge pull request #3068 from MultiTechSystems/mdot-pin-updates
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MultiTech mDot - clean up PeripheralPins.c and add new pin names
2016-10-25 10:47:59 +02:00
e7829cd617
[BEETLE] Update BLE Cordio libraries
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This patch updates the BLE Cordio libraries.
Signed-off-by: Marc Moreno <marc.morenoberengue@arm.com>
2016-10-24 17:41:23 +01:00
a3eacfd8d1
[BEETLE] Update disable dualtimer irq function
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This patch updates DualTimer_DisableInterrupt to
disable the interrupt timers individually.
In addition, it updates lp_ticker accordingly.
Signed-off-by: Marc Moreno <marc.morenoberengue@arm.com>
2016-10-24 17:39:19 +01:00
e2efb35723
Merge pull request #3011 from RobMeades/master
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Add u-blox Sara-N target.
2016-10-24 18:33:22 +02:00
220363b099
This one slipped through
2016-10-24 18:30:03 +02:00
eb86d12aee
EFM32: Add support for uVisor
2016-10-24 18:29:51 +02:00
371d652a04
EFM32: Use SECURE_ACCESS to access the ROM table
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To allow enabling of uVisor on EFM32, the ROM table must be accessed
through the CMSIS-provided SECURE_ACCESS macro.
2016-10-24 18:29:37 +02:00
0b6ed71626
[EFM32] Move clock configuration to target settings
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Moving the per-board clock configuration (which oscillators are available on the board, their frequencies, and which ones to use) as config options to the target database. This way, they're more easily overridable when third parties start creating boards with EFM32 MCUs
2016-10-24 18:29:25 +02:00
758d160384
[EFM32] Collapse NVIC relocation handling
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Gecko SDK 5.0.0 provides a convenient define for the amount of vectors wired on the chip, so we can use that to collapse the cmsis_nvic.h header
2016-10-24 18:29:00 +02:00
4fa5a80c84
Merge pull request #3084 from nvlsianpu/fix_gpioe_uninit
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[nrf5] fix in Digital I/O : a gpioe pin was uninitialized badly
2016-10-24 18:27:28 +02:00
3c450f1b37
[EFM32] Update emlib to version 5.0.0 in preparation for new targets
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* Updated cmsis headers to match emlib 5.0.0
* Updated GPIO handling to match new header guards in use
* Updated linker scripts to match emlib 5.0.0
2016-10-24 18:26:02 +02:00
c60dacfccf
[EFM32] Fix typo to targets.json
2016-10-24 18:25:34 +02:00
bb03e8c9e4
[EFM32] More condensation
2016-10-24 18:25:21 +02:00
6315147faf
[EFM32] Use serial configuration from platform
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mbed added configuration options for default serial baud rate and stdio baud rate, so we can get rid of the workaround in the HAL
2016-10-24 18:25:11 +02:00
1f3003fb22
[EFM32] Small fixes
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* Use mbed_error
* Include cmsis headers by default when grabbing device.h
* Get rid of enum to uint casting in pinmap
2016-10-24 18:24:59 +02:00
4df6986100
[EFM32] Use targets.json to improve directory structure
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Now that we have targets.json, we get target inheritance and can use it to clean up the EFM32 folder structure.
* In the top-level EFM32 folder, there are now folders per MCU family (Giant, Leopard, ...)
* Those family folders contain the CMSIS headers in the 'device' subfolder, as well as global family headers (i.e. mapping of pins to peripherals)
* Inside of the family folder, there is a per-target folder containing target settings. In the future, we'll want to get rid of those by using the config system provided by targets.json
2016-10-24 18:24:49 +02:00
6574f4d0a4
[EFM32] Clean up per-target Modules.h
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Removed deprecated defines MODULES_SIZE_* and moved the setting for the SPI asynch transfer queue size to targets.json, where it apparently belongs
2016-10-24 18:24:33 +02:00
b766c48744
[EFM32] Condense common header files
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First wave of squashing header files in order to get to a more sensible folder tree.
* Moved header files with 100% similarity to common folder
* Created a CommonPinNames.h header containing the base pin names P[A-F][0-15] and NC
2016-10-24 18:23:51 +02:00
501a00b1ac
Add define for FPU_EXCEPTION_MASK
2016-10-24 14:15:34 +01:00
bd1ad99452
Fix sleep function for NRF52.
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An active IRQ from the FPU can prevent the micro to go to sleep, even if this
IRQ is not enabled and not implemented. As a workaround, the FPU IRQ is cleared
before enterring sleep.
2016-10-21 14:47:44 +01:00
85c45a5174
[NUC472] Fix SetBaudRate 5% inaccuracy issue
2016-10-21 14:01:17 +08:00
eb812a1887
Add LOWPOWERTIMER capability for NUCLEO_F303ZE
2016-10-20 15:02:06 +02:00
ea2f0df821
Kinetis HAL: Remove clock initialization code from serial and ticker HAL drivers
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after updates to the mbed startup code
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-10-20 07:59:41 -05:00
93c67fbd73
nrf5 fix - gpioe pin was uninitialzied for new mode, should been uninitailzed for mode.
2016-10-20 14:10:32 +02:00
5b67832959
Merge pull request #3054 from andreaslarssonublox/ublox_fix_odin_mbedtls_config
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Moved mbedtls config for u-blox ODIN-W2 to macros in target.json
2016-10-20 10:59:05 +01:00
ae12346b8e
[M453] Support CAN
2016-10-20 15:12:36 +08:00
6e64d730b5
support NUC472 CAN
2016-10-20 15:12:35 +08:00
4ec07510b3
[NUC472] Fix PWM1 clock source setting error
2016-10-20 15:12:35 +08:00
005f032cae
[NUC472] Rename SD_0/SD_1 SD_0_0/SD_0_1 to match real SD H/W
2016-10-20 15:12:31 +08:00
8a570cce93
STM32F1: correct the read of timer master value
2016-10-19 16:46:51 +02:00
26f3352f83
STM32F3xxx : GCC_ARM remove zero bss, in startup.
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zero bss is done in libc init after call _start.
2016-10-19 14:54:43 +02:00
759837aff4
STM32F207: GCC_ARM remove zero bss, in startup.
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zero bss is done in libc init after call to _start.
2016-10-19 14:54:41 +02:00
fc39f6b736
Merge pull request #3064 from c1728p9/f429_heap
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NUCLEO_F429 - Increase IAR heap size
2016-10-19 05:51:20 -05:00
f1d678f8a4
Merge pull request #3056 from LMESTM/fix_stm32_pull_overwrite
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Fix stm32 pull overwrite
2016-10-19 05:50:30 -05:00
725892e147
Merge pull request #3055 from toyowata/master
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[TARGET_RENESAS] Add cmsis.h inclusion
2016-10-19 05:50:05 -05:00
d58bfa711d
Merge pull request #3041 from nvlsianpu/nrf5_serial_fc
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[nRF5] - added implementation of API of serial port flow control configuration.
2016-10-19 05:48:20 -05:00
44eca95c3d
Merge pull request #3028 from maclobdell/ncs36510_exporter_definitions
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add ncs36510 exporter support for IAR
2016-10-19 05:47:13 -05:00
2ae71777aa
Merge pull request #3013 from bcostm/check_adcintch_pins
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STM32xx - Change how the ADC internal pins are checked before pinmap_…
2016-10-19 05:43:15 -05:00
5eee95b7f5
Merge pull request #3008 from bcostm/fix_pwm_nucleo-f072rb
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NUCLEO_F072RB: Fix wrong timer channel number on pwm PB_5 pin
2016-10-19 05:42:57 -05:00
06509880d9
Merge pull request #2966 from NXPmicro/Add_KW24_Support
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Add kw24 support
2016-10-19 05:40:23 -05:00
7598b0572b
Enable not checking against 0 or 1.
2016-10-19 14:11:49 +05:30
1573405135
IRQ enable code moved out.
2016-10-19 13:44:10 +05:30
17ed9e9777
Reverting Clock GPIO code to previous implementation of the gpio_api.c and gpio_irq_api.c
2016-10-19 09:52:12 +05:30
d854547b0c
NUCLEO_F429 - Increase IAR heap size
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Increase the IAR heap size from 48KiB to 64KiB. This give enough heap
space to run the TLS encryption examples.
2016-10-18 16:43:28 -05:00
7e26876baf
Sleep API Update. Call Board RUN function as some platforms need more than setting the clock mode.
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-10-18 12:47:28 -05:00
020ace1424
Add support for FRDM KW24D
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-10-18 12:47:23 -05:00
c6fde7cfce
[MTS_MDOT_F411RE] remove duplicate PWMs, fix swapped pins
2016-10-18 09:34:46 -05:00
24d82d10ba
[STM32F1] Fix pull overwrite
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This fix addresses issue #2638 for STM32F1.
The STM32F1 family has a diffeerent register set for pull-up and pull-down
settings.
The same principle to read HW state is applied, as in commit:
[STM32] Fix pull over write to all families
except registers are different.
Also in this patch we make code a bit more linear.
Depending on pin_index, different register and shift index must be used.
Instead of checking this in several place, let's make a check at the
beginning of the function and use local register and shift variables.
2016-10-18 12:16:58 +02:00
af51027f61
[STM32] Fix pull over write to all families
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This applies the same fix as was done for F4 to solve issue #2638 .
The fix applies ell to all other families excpet STM32F1.
Basically, to avoid over-writing the pull-up/-down settings, we read the
current state from HW.
2016-10-18 12:16:58 +02:00
74cd326e35
Add cmsis.h inclusion
2016-10-18 11:27:52 +09:00
cb113d738e
Moved mbedtls config for u-blox ODIN-W2 to macros in target.json
2016-10-18 01:07:48 +02:00
b8355c2073
Fixed the emac_interface_t struct so that the struct constructor is not used.
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We can not rely on the struct constructor to be run since wifi_emac_get_interface can be run from the OdinWiFiInterface constructor before that.
2016-10-18 00:36:30 +02:00
b6f7b8c463
[MTS_MDOT_F411RE] clean up peripheral pins & add new pin names
2016-10-17 15:36:28 -05:00
fe3a8b04bf
nRF5 - added serial flow control configure API implementation
2016-10-17 13:44:15 +02:00
a3bccfdda7
gpio is connected API
2016-10-17 14:18:38 +05:30
1b6f3cdbf6
OnSemi RAM usage fix
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Previous code base had been wasting almost 4K of precious RAM.
* Main stack allocation reduced from 4K to 1K
* Un-necessary breakdown of RAM regions is removed. This gives us back 2K of RAM.
2016-10-17 11:37:53 +03:00
4e808139d3
Add u-blox Sara-N target.
2016-10-15 12:06:29 +01:00
e1657f13a0
add macros for NCS36510 IAR IDE building
2016-10-14 15:38:36 -05:00
7bcc63b202
Merge pull request #2977 from andreaslarssonublox/ublox_drivers
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Ublox drivers
2016-10-14 14:56:06 -05:00
014df32625
add ncs36510 exporter support
2016-10-14 11:45:24 -05:00
e2c6b8d9e3
Odin: Disable WiFi by default
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Currently only one network interface can be compiled in at a given time,
to avoid failing automated test on this target WiFi will be disabled by default.
2016-10-14 10:40:40 -05:00
b0265244a4
Fixed automerge problems.
2016-10-14 18:16:23 +05:30
394796f47e
Added guard for DEVICE_EMAC in wifi_emac_api.cpp
2016-10-14 02:42:53 +02:00
62bc6869e8
Added u-blox ODIN-W2 drivers for all toolchains
2016-10-13 23:37:42 +02:00
08ff689afa
Merge pull request #2979 from adustm/STM_F429_F439
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New platforms: NUCLEO_F439ZI, NUCLEO_F756ZG, NUCLEO_L486RG
2016-10-13 16:22:36 -05:00
5d344e9548
Remove shared spi_s struct from XDOT_L151CC
2016-10-13 12:43:27 -05:00
e410157557
Merge pull request #2865 from anangl/hal_fixes
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TARGET_NRF5: A few corrections in HAL implementation.
2016-10-13 11:40:10 -05:00
ff4fca6747
ADD NEW TARGET : NUCLEO_F756ZG, based on existing NUCLEO_F746ZG
2016-10-13 18:29:09 +02:00
78fd559d11
ADD NEW TARGET : NUCLEO_L486RG, based on existing NUCLEO_L476RG
2016-10-13 18:29:09 +02:00
a07a271fe5
ADD NEW TARGET : NUCLEO_F439ZI, based on existing NUCLEO_F429ZI
2016-10-13 18:29:09 +02:00
Michel Jaouen
0xc0170
cyliangtw
Martin Kojtal
pradeep-gr
Marcelo Salazar
Steven Cooreman
Bradley Scott
tomoyuki yamanaka
Marc Moreno Berengue
Alessandro Angelino
Vincent Coubard
jeromecoutant
Mahadevan Mahesh
Andrzej Puzdrowski
ccli8
bcostm
Sam Grove
Radhika
Russ Butler
Mike Fiore
Laurent MEUNIER
Toyomasa Watarai
andreas.larsson
Hasnain Virk
Rob Meades
maclobdell
Russ Butler
Bartek Szatkowski
Brian Daniels
adustm