ARMmbed
/
mbed-os
mirror of https://github.com/ARMmbed/mbed-os.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity
32,677 Commits
52 Branches
336 Tags
624 MiB
Commit Graph

250 Commits (10e0759372f1e04c8fcd182c382d31d7ca8534d4)

Author SHA1 Message Date
Mahesh Mahadevan e50583459f LPC54114: Fix compile warnings 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-07-16 12:29:32 -05:00
Mahesh Mahadevan 55a2eddf8a MCUXpresso: Update LPC SPI HAL driver 
Add support for different slave selects

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-07-16 12:10:34 -05:00
Mahesh Mahadevan 9b8a859883 MCUXpresso: Update the Analogin driver for LPC devices 
1. Update the clock divider setting
2. ADC resolution is 12-bits, update the API return value
   to return 16-bit result
3. Update IOMUX setup

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-07-15 14:40:55 -05:00
Mahesh Mahadevan f4648673cf LPC54114: Update the ADC SDK driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-07-15 14:40:55 -05:00
Mahesh Mahadevan 7b011e9fe2 LPC546XX: Update the ADC SDK driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-07-15 14:40:55 -05:00
Arto Kinnunen 5c45fa72a9
Merge pull request #11003 from NXPmicro/Fix_LPC_I2C 
LPC MCUXpresso: Remove extra I2C transaction on byte write
 2019-07-15 15:32:02 +03:00
Mahesh Mahadevan aef60d7edf LPC MCUXpresso: Remove extra I2C transaction on byte write 
An extra start signal was observed on the bus which was
discovered by the FPGA test shield.
This is because the hardware sends out a transaction as soon
as a write to the START bit. Hence the write to the START
bit is delayed by using a flag.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-07-09 16:05:28 -05:00
Mahesh Mahadevan 58ba83b6e4 LPC546XX: Add pins to LPCXpresso restricted list 
FPGA GPIO tests cannot be run on certain pins

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-07-09 15:40:55 -05:00
Martin Kojtal 279925b6fc
Merge pull request #10869 from mathias-arm/master 
LPC55S69: fix cosFactor data size in header file
 2019-07-01 09:27:57 +01:00
Hugues Kamba b0804c4a0d bootloader: Fix LPC55S69 bootloader segmentation 
As the build tool in mbed-os 5.13 cannot appropriately deal with a segmented
bootloader when combining it with an application, this commit adjusts the
size reserved for interrupts (via the linker file) to avoid a bootloader
segmentation due to an unpopulated ROM area.

The microcontroller has a total of 60 vector interrupts + 16 exception
handlers. The allocated ROM flash for interrupts should be (60 + 16) x word
size in bytes = 76 x 4 = 304 = 0x130.

This commit changes the interrupt reserved space from 0x140 to 0x130.
 2019-06-26 13:55:07 +01:00
Mathias Brossard ccbb26e2f3 LPC55S69: fix cosFactor data size in header file 
The file 'fsl_powerquad_data.h' declares several dctXXX_cosFactor
arrays with sizes twice larger compared to the actual definitions in
'fsl_powerquad_data.c'.
 2019-06-19 15:17:18 -05:00
Martin Kojtal 3ea1c56124
Merge pull request #10147 from kjbracey-arm/atomic_bitwise 
Assembler atomics
 2019-05-13 14:18:05 +01:00
Mahesh Mahadevan 39975b818d LPC55S69: Add support for UART hardware flow control 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-04-29 14:18:35 -05:00
Kevin Bracey 87396e0bf6 Assembler atomics 
Reimplement atomic code in inline assembly. This can improve
optimisation, and avoids potential architectural problems with using
LDREX/STREX intrinsics.

API further extended:
* Bitwise operations (fetch_and/fetch_or/fetch_xor)
* fetch_add and fetch_sub (like incr/decr, but returning old value -
  aligning with C++11)
* compare_exchange_weak
* Explicit memory order specification
* Basic freestanding template overloads for C++

This gives our existing C implementation essentially all the functionality
needed by C++11.

An actual Atomic<T> template based upon these C functions could follow.
 2019-04-26 13:12:35 +03:00
Martin Kojtal 3ec9c190d0
Merge pull request #10314 from kjbracey-arm/rt1050_dcache 
i.MX RT1050: Reactivate data cache
 2019-04-18 09:49:13 +01:00
Martin Kojtal 93dc5514f2
Merge pull request #10334 from NXPmicro/MXRT1050_FixTestFailure 
MXRT1050_EVK: Fixes test failure seen with ARM & IAR toolchain
 2019-04-16 08:45:46 +01:00
Kevin Bracey b1ba4fe7ec LPC55S69: Cast to cope with const mismatch 2019-04-11 14:57:20 +03:00
Kevin Bracey c89c2809ea LPC55S69: Fix APB bridge security programming 
Spotted in compiler warnings - code was trying to access a non-existent
second security control block, rather than access the settings for the
second APB bridge in the first and only security control block.
 2019-04-11 14:49:54 +03:00
Mahesh Mahadevan 5f7f71e7e5 MXRT1050_EVK: Fixes test failure seen with IAR and ARM toolchains 
Fixes test failure seen with tests-mbed_hal-stack_size_unification
under IAR and ARM toolchain

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-04-08 13:42:46 -05:00
Kevin Bracey 6fe50763f3 i.MX RT1050: Reactivate data cache 
Since commit 12c6b1bd8, the i.MX RT1050 has effectively had its data
cache disabled, as the SDRAM was marked Shareable; for the Cortex-M7,
shareable memory is not cached.

This was done to make the Ethernet driver work without any cache
maintenance code. This commit adds cache maintenance and memory barriers
to the Ethernet driver, and removes the Shareable attribute from the
SDRAM, so the data cache is used again.

Cache code in the base fsl_enet.c driver has not been activated - the
bulk of it is in higher-level Read and Write calls that we're not using,
and there is one flawed invalidate in its initialisation. Instead
imx_emac.cpp takes full cache responsibility.

This commit also marks the SDRAM as read/write-allocate. As the
Cortex-M7 has its "Dynamic read allocate mode" to automatically switch
back to read-allocate in cases where write allocate is working poorly
(eg large memset), this should result in a performance boost with no
downside.

Activating write-allocate is also an attempt to provoke any flaws in
cache maintenance - the Ethernet transmit buffers for example will be
more likely to have a little data in the cache that needs cleaning.
 2019-04-04 12:06:24 +03:00
Mahesh Mahadevan 1b9531d1af LPC55S69: Update Flash driver to set clock frequency 
This is to ensure the flash access time is set correctly

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-04-01 12:10:24 -05:00
Michael Schwarcz a91f17e824 LPC targets: Compile us_ticker.c only if USTICKER defined 2019-03-26 09:52:18 +02:00
David Saada eb5cef84fd Add bootloader support for the LPC55S69 board 
bla
 2019-03-16 00:13:40 +02:00
Oren Cohen 2ea13e6149 "Update secure binaries for LPC55S69_S" 2019-03-14 17:03:06 +02:00
Michael Schwarcz dca3ebe9f6 LPC55S69_S: reduce ITS size to 32KB 
- Reduce LPC55S69 secure side ITS from 64KB to 32KB
 2019-03-14 15:49:44 +02:00
Michael Schwarcz 546e33df7b Update NS IAR icf file 2019-03-13 18:21:37 +02:00
Michael Schwarcz f6ab217892 Reduce 32KB from LPC55S69_S binary size 2019-03-13 18:21:37 +02:00
Alexander Zilberkant 661613c998 Rename psa_system_reset to mbed_psa_system_reset 
add noreturn attributes
update lifecycle service to use psa/error.h
fix doxygen
 2019-03-11 10:43:19 +02:00
Mahesh Mahadevan 862961ced5 Updated the binaries 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:33:49 -06:00
Mahesh Mahadevan 4a2dbba7a1 Reduce the number of flash operation related veneer table entries 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:33:48 -06:00
Michael Schwarcz 401580f364 LPC55S69: Change post-build hook to create HEX 2019-03-08 07:33:48 -06:00
Michael Schwarcz ebd9dc83f7 LPC55S69: Use find_secure_image in post-build and add prebuilt secure images 2019-03-08 07:33:48 -06:00
Mahesh Mahadevan 2e9bb17596 MCUXpresso: Update Analogin support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:59 -06:00
Mahesh Mahadevan 616fa49890 LPC55S69: Add a ctimer for usticker to be used in the secure domain 
CTIMER 0 is used for the secure domain and CTIMER 1 is used for
the non-secure domain

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:59 -06:00
Mahesh Mahadevan 66eb3deca8 LPC55S69: Fix the I2C SDK driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:59 -06:00
Mahesh Mahadevan 3d82af0afe LPC55S69: Remove FPU_PRESENT and DSP_PRESENT defines 
These are defined by mbed during compile

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:58 -06:00
Mahesh Mahadevan 98c8aa1ddd MCUXpresso: Update the sleep implementation for LPC55S69 differences 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:58 -06:00
Mahesh Mahadevan b4aaad0f14 Add support for LPC55S69 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:58 -06:00
Mahesh Mahadevan bb2a155ae5 MCUXpresso: Update LPC HAL flash driver 
The flash driver for the LPC55S69 is different from
prior LPC family. Move the Flash HAL driver to SoC
specific folder

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan 5853af76ee MCUXpresso: Update LPC TRNG driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan dd21e6dc5a MCUXpresso: Update SPI driver 
Move the clock setup and peripheral reset to the init function

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan 783c02d0a2 MCUXpresso: Update LPC I2C, SPI, UART HAL drivers 
Use the individual IP count and not the FlexComm count

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan a934ba0b5a MCUXpresso: In pin_function() use mask macro instead of a hard-coded value 
The mask size can vary based on the platform

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan a64b192081 MCUXpresso: Update the LPC GPIO drivers 
Update to the latest SDK GPIO driver

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:57 -06:00
Mahesh Mahadevan c05a893111 MCUXpresso: Update usticker driver 
Move clock frequency to a target specific function

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-03-08 07:28:56 -06:00
deepikabhavnani 60e7a7da98 Add heap section to linker file 2019-02-19 15:49:49 -06:00
Deepika 57b9ccc517 Target_NXP: Setup heap limit and size 2019-02-19 15:49:49 -06:00
Russ Butler 8669417e7b Add HAL API for spi pinmap 
Add the functions to get spi pinmaps to all targets.
 2019-02-08 09:10:37 -06:00
Russ Butler 34c176654d Add HAL API for serial pinmap 
Add the functions serial_tx_pinmap, serial_rx_pinmap, serial_cts_pinmap
and serial_rts_pinmap to all targets.
 2019-02-08 09:10:28 -06:00
Russ Butler 2ed1dc2bfa Add HAL API for qspi pinmap 
Add the functions qspi_master_sclk_pinmap, qspi_master_ssel_pinmap and
qspi_master_data0_pinmap-qspi_master_data3_pinmap to all targets with
qspi support.
 2019-02-08 09:10:25 -06:00
Russ Butler be492fe07a Add HAL API for pwmout pinmap 
Add the function pwm_pinmap to all targets.
 2019-02-08 09:10:19 -06:00
Russ Butler 22a89773fa Add HAL API for i2c pinmap 
Add the functions i2c_master_sda_pinmap, i2c_master_scl_pinmap,
i2c_slave_sda_pinmap and i2c_slave_scl_pinmap to all targets.
 2019-02-08 09:10:12 -06:00
Russ Butler 4818f88d73 Add HAL API for analog in pinmap 
Add the function analogin_pinmap to all targets.
 2019-02-08 09:09:51 -06:00
Mahesh Mahadevan 00477ddf68 LPC546XX, MIMXRT1050: Update to fix ARMC6 build failures 
Fix for issue 9402

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-01-29 14:21:44 -06:00
Martin Kojtal a6509cf47f
Merge pull request #9438 from c1728p9/qspi_update 
Use dedicated PinMap for each QSPI data line
 2019-01-23 14:25:14 +01:00
Russ Butler 82b131aa59 Use dedicated PinMap for each QSPI data line 
Split PinMap_QSPI_DATA into PinMap_QSPI_DATA0 - PinMap_QSPI_DATA3.
This allows pins to be selected more accurately.
 2019-01-22 12:11:15 -06:00
Mahesh Mahadevan a11e201805 LPC546XX, LPC54114: Add README and LICENSE files for the power libraries 
This is a fix for Issue#9254

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2019-01-11 14:50:47 -06:00
Przemyslaw Stekiel 3b170118f3 [NXP] Support boot stack size configuration option 2019-01-08 15:32:04 +01:00
Martin Kojtal 63eca294a1
Merge pull request #9163 from InfernoEmbedded/fix-8913-partner 
Don't use define checks on DEVICE_FOO macros (partner code)
 2019-01-07 16:37:24 +00:00
Alastair D'Silva aa80b7c70a Don't use define checks on DEVICE_FOO macros (partner code) 
The DEVICE_FOO macros are always defined (either 0 or 1).

This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.

Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
 2018-12-20 20:02:29 +11:00
Derek Miller d1ae8b2604 Bug fix for UART issue on LPC54608 - issue #7398 2018-12-03 16:17:49 -06:00
Mahesh Mahadevan 49c9f7f73d LPC546XX: Fix build failure due to incorrect merge 
Commit ab84d2bf33 missed including
qspi_device.h file

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-27 09:42:52 -06:00
Jimmy Brisson ab84d2bf33 *LPC546XX: Finish MCU Refactoring 
### Description

The Mbed 2 release was broken for FF_LPC546XX as it would include
the entire mbed 2 build of the LPC546XX. This PR seperates these 2
builds completely by:

 * Removing non-shared extra labels from the MCU_LPC546XX target
 * Moving the target implementation to a shared target directory

### Pull request type

    [x] Fix
    [ ] Refactor
    [ ] Target update
    [ ] Functionality change
    [ ] Breaking change
 2018-11-19 09:37:17 -06:00
Martin Kojtal 00c5b56e32
Merge pull request #8683 from NXPmicro/feature-qspi-lpc546xx 
Feature qspi lpc546xx
 2018-11-19 13:11:44 +00:00
Mahesh Mahadevan f8f9faa841 LPC566XX LPCXpresso: Update to add QSPI support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-16 07:56:29 -06:00
Mahesh Mahadevan 4bbf0025b8 LPC MCUXpresso: Add QSPI support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-16 07:56:28 -06:00
Mahesh Mahadevan fffb37534e LPC546XX: Update the SPIFI SDK driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-14 09:00:34 -06:00
Mahesh Mahadevan d5cf53aba1 MIMXRT1050_EVK: Update the SDK clock driver 
This fixes build failures seen with GCC_ARM

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-14 07:13:07 -06:00
Mahesh Mahadevan 12c6b1bd88 MIMXRT1050EVK: Add ENET support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-11-14 07:13:07 -06:00
Cruz Monrreal II b353136da1 Merge branch 'Fix_LPC_Flash_Driver' of ssh://github.com/NXPmicro/mbed into rollup 2018-11-08 13:24:26 -06:00
David Saada 542744d03c Support erase value in Flash HAL drivers, FlashIAP and block devices 2018-11-07 14:23:07 +02:00
Mahesh Mahadevan 48d4a45345 MCUXpresso: Update LPC Flash driver program page function 
Handle the case where the number of bytes to write is not aligned
to page size

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-10-24 08:20:00 -05:00
Mahesh Mahadevan 118bde5a14 LPC54608: Raise the core freq on LPC54608 targets 
This is incorrectly set to a lower value

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-10-19 12:49:28 -05:00
Cruz Monrreal 73f1d4cabd
Merge pull request #8186 from deepikabhavnani/freescale_align_fix 
Freescale/NXP: Fix alignment of execute region to 8byte boundary
 2018-10-10 08:43:51 -05:00
Martin Kojtal c48c2ec89f
Merge pull request #7998 from NXPmicro/MIMXRT1050_Add_RTC 
MIMXRT1050_EVK: Add RTC support
 2018-10-01 11:47:10 +02:00
Martin Kojtal b1011bf12e
Merge pull request #7896 from alrodlim/master 
Fix pin names of MIMXRT1050 I2C pins
 2018-10-01 11:43:43 +02:00
alrodlim 7d9263d2ef Move I2C pins definition so that A4 and A5 are defined before using them 2018-09-24 09:46:11 -05:00
Deepika c673d5344c NXP: Fix alignment of execute region to 8-byte boundary 
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
 2018-09-19 09:45:46 -05:00
Mahesh Mahadevan 3661dc7e71 MIMXRT1050_EVK: Fix the PWM Hal driver 
1. Add Pin defines for missing PWM pins
2. Update the hal to account for the number of PWM instances
3. Fix the register reload policy
4. Configure the XBAR to put the PWM fault inputs in inactive state

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-09-12 08:52:39 -05:00
Cruz Monrreal ff1a0ede1f
Merge pull request #7995 from yossi2le/revert-pinnames-files 
Reverting PinNames.h after PR #7774 changes
 2018-09-06 13:20:43 -05:00
Cruz Monrreal dc45990a58
Merge pull request #7904 from NXPmicro/MIMXRT1050_Fix_Spi 
MIMXRT1050_EVK: Update SPI HAL driver
 2018-09-05 09:18:58 -05:00
Mahesh Mahadevan a8fca70fa9 MIMXRT1050_EVK: Add RTC support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-09-05 08:29:37 -05:00
Yossi Levy acfda5895e Changes in PR #7774 of PinNames.h should be reverted. This commit reverts those files excpet for K82F and K64F which are left as an example 2018-09-05 14:13:05 +03:00
Yossi Levy ed8e170d15 Moving SD, SPIF and FLASHIAP into mbedos and refactoring features storage directory structure. 2018-08-29 12:01:11 +03:00
Mahesh Mahadevan 2bc140e978 MIMXRT1050_EVK: Update SPI HAL driver 
Use a different SDK API to write to the SPI Bus

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-27 14:20:49 -05:00
alrodlim 90689c3191 fixed pin names of I2C pins 2018-08-27 07:29:07 -05:00
Mahesh Mahadevan f71004cf89 MIMXRT1050: Fix I2C Byte transfer functions 
1. Added a flag to issue START command
2. Do not send START command inside i2c_start function as
   the LPI2C hardware will issue a STOP on reception
   of a NACK
3. Remove the i2c_address global variable, this is not
   required

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-21 10:25:00 -05:00
Mahesh Mahadevan 64e5eb01d2 MIMXRT1050_EVK: Update the I2C driver 
1. Remove the repeated_start flag and code as this is not needed
   for the LPI2C module
2. Enable the SION bit on the I2C pins
3. Enable 22K Pullup option of the I2C pins
4. Update the 0 byte write implementation to ensure the START
   command gets flushed out of the FIFO

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-17 15:03:35 -05:00
Mahesh Mahadevan 74c96b6359 MXRT1050_EVK: Sleep: add pre/post processing steps 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 11:55:32 -05:00
Mahesh Mahadevan e18e0f12f4 MXRT1050_EVK: Ensure certain low power function are linked to internal memory 
Low power functions related to powering off FLEXSPI and SDRAM needs
to be copied to internal memory

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 11:55:13 -05:00
Mahesh Mahadevan a1d8298057 MIMXRT1050_EVK: Add Low Power Manager files 
This is needed to support different Low-Power modes available
in MXRT1050

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-08-06 10:36:16 -05:00
Przemyslaw Stekiel ace821017f Add implementation of ticker_free() function to CI boards. 
This PR provides implementation of ticker_free() function for the following boards:
ARCH_PRO
EV_COG_AD3029LZ
EV_COG_AD4050LZ
K22F
K64F
K82F
KW24D
KW41Z
LPC546XX
NRF51_DK
NRF52_DK
NUCLEO_F207ZG
NUCLEO_F401RE
NUCLEO_F429ZI
NUCLEO_F746ZG
REALTEK_RTL8195AM
 2018-08-02 09:48:10 +02:00
Przemyslaw Stekiel c0ee843d63 Add lp/us ticker_free() functions stub. 
This patch adds only empty stubs of `us_ticker_free()` and `lp_ticker_free()` for all boards where these functions are not implemented.
 2018-07-25 08:58:38 +02:00
Cruz Monrreal 69d8c0bac3
Merge pull request #7429 from codeauroraforum/MXRT_Fix_AnalogIn 
MXRT1050: Ensure the pins are in input mode for analogin
 2018-07-06 11:24:40 -05:00
Mahesh Mahadevan 19b6ef2e87 MXRT1050: Ensure the pins are in input mode for analogin 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-05 17:23:07 -05:00
Mahesh Mahadevan c24d158fb4 MIMXRT1050_EVK: Move clock enable after check of pin 
Enable clock could return an error if pin is NC

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-05 10:59:00 -05:00
Mahesh Mahadevan 9b48f3978a MIMXRT1050_EVK: Fix the GPIO IRQ number assignements 
Use the GPIO_Combined IRQ array

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-04 11:53:47 -05:00
Mahesh Mahadevan 34dab4a4d9 LPC546XX: Fix UART mux setting in the LPCXpresso board 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-07-02 15:16:57 -05:00
Mahesh Mahadevan 632892d355 MIMXRT1050: Update to EVK Rev B 
1. Add the IVT header to the binary as this is required for boot up
   This was earlier added by the DAPLink firmware. As it is no longer
   handled in DAPLink, the header needs to be added inside mbed.
2. Update drivers

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-21 13:34:12 -05:00
Cruz Monrreal 31df3d2865
Merge pull request #7242 from davidsaada/david_uniform_text_region 
Rename text region in ARM linker file for a few NXP CPUs
 2018-06-19 09:45:23 -05:00
Cruz Monrreal f2b72b9914
Merge pull request #7201 from codeauroraforum/Fix_ADC_LPC54628 
LPC54628: Update the ADC clock divider based on the input clock source
 2018-06-18 10:08:38 -05:00
David Saada 714d025f6c Rename text region in ARM linker file for a few NXP CPUs 2018-06-18 17:32:01 +03:00
Mahesh Mahadevan 8c6098229b LPC54628: Update the ADC clock divider based on the input clock source 
1. Problems were seen on the LPC54628 as the ADC clock source was too
   high
2. Moved the pin configuration to set Analog mode to the end of the
   function

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-06-12 12:57:31 -05:00
David Saada 9e5efbcfd5 Fix flash_program_page API in LPC boards. 
This API allocates a program buffer of 256 on the stack to ensure alignment.
However, FlashIAP driver already ensures this alignment of the user data.
 2018-06-12 15:09:05 +03:00
Bartek Szatkowski a305d849a8 Rename LOWPOWERTIMER to LPTICKER 2018-05-25 13:06:56 -05:00
Mahesh Mahadevan f7c6e555f3 MCUXpresso: Enable RTC on LPC54114 and LPC546XX 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 13:03:46 -05:00
Mahesh Mahadevan fb622a2081 MIMXRT1050_EVK: Update lpticker implementation 
Use only the GPT module and avoid using RTC.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:33:41 -05:00
Mahesh Mahadevan 774de11d1f MCUXpresso: Enable usticker on MIMXRT1050_EVK 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:32:38 -05:00
Mahesh Mahadevan 659be61e4b MCUXpresso: Enable usticker for LPC546XX and LPC54114 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-05-25 12:32:38 -05:00
Bartek Szatkowski 6e9f04bf2f Rename DEVICE_LOWPOWERTIMER to DEVICE_LPTICKER 
That's to match DEVICE_USTICKER.
 2018-05-25 12:20:09 -05:00
Kevin Bracey 97b9980c8c LPC546XX: Correct Ethernet MAC address write 
Patch to LPC546XX SDK code - write the low Ethernet MAC address
register last, as that synchronises the update.

Without this change, the ENET_SetMacAddr call only seems to work prior
to MAC initialisation, causing problems for the new mbed OS EMAC system,
which expects it to be changable later.

Updated emac greentea tests #6851.
 2018-05-23 12:25:21 +03:00
Cruz Monrreal 4e1c04feba
Merge pull request #6734 from codeauroraforum/Fix_LPC54XXX_GPIO 
LPC54XXX: Set the pin function to Digital mode
 2018-04-26 20:17:07 -05:00
Mahesh Mahadevan 6513091173 LPC546XX: Add check for GPIO IRQ 
GPIO IRQ is available on pins for Ports 0 & 1. Add
a check to return error for other ports.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-24 14:26:20 -05:00
Mahesh Mahadevan 2670f790ce LPC546XX: Set the pin function to Digital mode 
We cannot rely on the default value as a pin could
be use for Analog purposes in which this bit is cleared

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-24 11:24:23 -05:00
Martin Kojtal cba28cc0ac
Merge pull request #6221 from codeauroraforum/Add_RNG_LPC54XXX 
LPC546XX: Add TRNG support
 2018-04-18 14:25:56 +02:00
Cruz Monrreal 1cc78f864c
Merge pull request #6647 from codeauroraforum/Fix_LPC54xxx_I2C 
Fix MCUXpresso LPC I2C driver
 2018-04-17 10:56:10 -05:00
Mahesh Mahadevan 6e9f99ca93 MCUXpresso: Fix LPC I2C driver for byte operations 
The ci-shield tests that manually generate the START, STOP
by calling the HAL functions were failing. The byte operation
HAL functions cannot use the MCUXpresso SDK driver API's.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-16 16:35:34 -05:00
Mahesh Mahadevan 69a950c6eb MCUXpresso: Fix SDK LPC driver 
Poll the Pending bit after START and STOP operations to ensure
operation completion.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-16 16:35:34 -05:00
Mahesh Mahadevan 9a1e749780 LPC546XX: Fix deepsleep implementation 
Add a check to return to 220MHz on LPC54628

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-04-10 08:16:41 -05:00
Mahesh Mahadevan 76c8a1bf7e LPC546XX: Add TRNG support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-30 14:12:39 -05:00
Cruz Monrreal 95fb33f041
Merge pull request #6198 from codeauroraforum/Add_LPC54XXX_Flash_Support 
Flash support: Add flash support for LPC54114 & LPC546XX
 2018-03-15 10:49:08 -05:00
Cruz Monrreal 5523d53f83
Merge pull request #6287 from codeauroraforum/Update_usticker 
MCUXpresso_MCUS: Apply K64F us_ticker fix across all MCU's
 2018-03-14 13:56:34 -05:00
Martin Kojtal 7917e12eb0 MIMXRT: define PullUp default value 
This target defines few PullUp values, one should be defined to be PullUp that
an application can use. We use the same value as PullDefault
 2018-03-12 09:21:24 +00:00
Mahesh Mahadevan 3f302961e1 Flash support: Add flash support for LPC54114 & LPC546XX 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-07 13:06:41 -06:00
Mahesh Mahadevan 7ed36e4986 MCUXpresso_MCUS: Apply K64F us_ticker fix across all MCU's 
Applied changes from commit b6a01de070
for other MCUXpresso MCUs

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-03-07 07:27:04 -06:00
gorazd c053b70a75 lpc546xx and lpc54114: fix clock 2018-02-28 13:23:38 +01:00
Mahesh Mahadevan eff848abea LPC546XX: Update SDK driver to version 2.3 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-23 07:31:13 -06:00
Mahesh Mahadevan 069c80b7a5 ff_lpc546xx: Add support for 220MHz core speed. 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-22 07:30:20 -06:00
Mahesh Mahadevan a9cd4705d8 LPC546XX: Add support for 220MHz core speed available on LPC54628 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-02-22 07:30:19 -06:00
Mahesh Mahadevan 060daa99c9 NXP: Add support for MIMXRT1050_EVK 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2018-01-26 07:46:43 -06:00
gorazd 676e56d6fe ff_lpc546xx: change led1 and led3 and p26 pins 2018-01-01 15:55:25 +01:00
gorazd f6283f5b03 ff_lpc546xx: add enet 
fsl_phy.c/.h move to ../drivers to reuse it
lwip: add hardware_init.c
 2018-01-01 15:55:24 +01:00
Mahadevan Mahesh f2d2ed44cd LPC546XX: Add ENET support 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-11-28 16:18:36 +00:00
gorazd 5c2f2c3cff lpc546xx: remove obsolete line 2017-11-18 10:44:33 +01:00
gorazd 8411134184 lpc546xx: correct register name (DIGIMODE) 2017-11-17 19:16:42 +01:00
gorazd d62b47393e lpc546xx: fix adc 
Resolve #5304
 2017-11-17 13:54:25 +01:00
gorazd b010223145 add new target L-Tek FF-LPC546XX 2017-10-18 23:56:12 +02:00
Mahadevan Mahesh 880f106740 Change LPC54608 to LPC546XX to include support for LPC54608/18/28 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-10-02 11:20:27 -05:00
Jimmy Brisson f5bb15f773 Merge pull request #5152 from NXPmicro/Update_RTC_HAL_driver 
Kinetis RTC HAL: Allow writing 0 to the seconds register
 2017-09-29 10:12:22 -05:00
Jimmy Brisson 3b224252ef Merge pull request #5141 from NXPmicro/Fix_LPC54608_LEDMap 
LPC54608: Swap LED pin connections to match naming on the board
 2017-09-29 10:12:04 -05:00
Russ Butler c32890294e Fix LPC54114 vector table size 
Correct the vector table size on the LPC54114. This fixes crashes
seen on boot when building with GCC.
 2017-09-25 18:49:38 -05:00
Mahadevan Mahesh 1dadb055f7 RTC HAL: Allow writing 0 to the seconds register 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-09-21 13:33:07 -05:00
Mahadevan Mahesh 82a37b0eb1 LPC54608: Swap LED pin connections to match naming on the board 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-09-19 15:37:22 -05:00
Jimmy Brisson cd4fd86f1f Correct Freescale + NXP compiler detection macros 
Also removes duplication of common files
 2017-09-11 13:20:32 -05:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets 
remove duplicate sys.cpp
 2017-09-11 13:20:32 -05:00
Martin Kojtal c8d43aeb2d LPC MCUXpresso: fix write_fill argument for block write function 
The latest HAL extension was not applied to the LPC MCUXpresso targets.
 2017-07-25 10:26:40 +01:00
Mahadevan Mahesh 316b859baf LPC: Move platform specific code out of the analog api file 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:16:06 -05:00
Mahadevan Mahesh 7d8b6d7684 LPC: Move platform specific code out of sleep api file 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:59 -05:00
Mahadevan Mahesh dfe2d3ba4c Add support for LPC54608 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:51 -05:00
Mahadevan Mahesh aee6f7b227 Add mbed support for LPCXpresso54114 board 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-07-20 13:15:36 -05:00