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585 Commits (mbed-os-5.3)

Author SHA1 Message Date
Laurent MEUNIER e736c4b2d1 HAL F1: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
 2016-12-30 12:41:25 +00:00
Laurent MEUNIER b62d237fde STM32 F1 HAL V1.0.5 
This is a partial update of HAL drivers, especially for I2C driver update
 2016-12-30 12:41:23 +00:00
Jared Szechy ca10f72bf7 Add alternative CAN pins to DISCO_F303VC 2016-12-30 12:41:19 +00:00
Jared Szechy 613d552a21 Enable CAN on DISCO_F303VC 2016-12-30 12:41:14 +00:00
jeromecoutant b8ddac0fbb STM32L4 : correct ST HAL API call 
- ll_utils: compilation issue
- GPIO: mode was not allowed by ST HAL API
 2016-12-30 12:41:12 +00:00
jeromecoutant 3a6edfe7f1 STM32L4 : refactor stm32l4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-30 12:41:10 +00:00
jeromecoutant fae4f10678 STM32F3 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- GPIO: mode was not allowed by ST HAL API
 2016-12-30 12:41:06 +00:00
jeromecoutant 218d9c61a7 STM32F3 : map ST HAL assert into MBED assert 2016-12-30 12:41:03 +00:00
jeromecoutant 7bce9c78d3 STM32F2 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
 2016-12-30 12:41:01 +00:00
jeromecoutant 23510b4152 STM32F2 : map ST HAL assert into MBED assert 2016-12-30 12:40:59 +00:00
jeromecoutant 605ceb5e1e STM32F1 : correct ST HAL API call 
- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
 2016-12-30 12:40:57 +00:00
jeromecoutant 765095e33c STM32F1 : map ST HAL assert into MBED assert 2016-12-30 12:40:55 +00:00
Laurent MEUNIER e69cbf70bf STM32 I2C: avoid timeout to be 0 
In continuation of previous IsDeviceReady case, let's
add 1 in case length is 0 (even though not recommended)
 2016-12-30 12:40:52 +00:00
Laurent MEUNIER 1fe00ca5c6 STM32 I2C manage STOP specific case 
In case the user applicaiton makes a mixed usage of unitary function
(start, stop, byte write & read) with SYNC operation (write and read of
data buffers with start and stop management), we need to reset the
STM32 HAL state as it is by-passed by a direct call to STOP
 2016-12-30 12:40:50 +00:00
Laurent MEUNIER 60aca8fdc0 STM I2C: manage Is Device Ready case 
Some device drivers use a data lenght of 0 to check if device is ready.
STM32 HAL provides a dedicated service for that, so let's use it.
 2016-12-30 12:40:48 +00:00
Laurent MEUNIER 4c56b1e24c STM I2C - move i2c_read in SYNC part 
just change the place of code to have i2c_read and i2c_write together
 2016-12-30 12:40:46 +00:00
Anna Bridge 137fb4aba3 Manually patch: DELTA_DFBM_NQ620 default configuration #3298 2016-12-19 14:54:55 +00:00
cyliangtw 9c5eb11087 Fix GCC warnings 2016-12-19 14:40:02 +00:00
ccli8 a6a2ecf0fa Fix stuck in lp_ticker_init() 2016-12-19 14:40:00 +00:00
cyliangtw e50c7af143 Resolve TRNG GCC warning 2016-12-19 14:39:59 +00:00
ccli8 db119c774c Fix compile error for SHA-256 alternative on some condition 
Also include non-issue refinement for SHA-1/SHA-256 alternatives.
 2016-12-19 14:39:57 +00:00
ccli8 4fcb5058fc Fix PWM clock error in BSP driver 2016-12-19 14:39:56 +00:00
ccli8 5510375dee Change UART RTS/CTS to low level active 2016-12-19 14:39:54 +00:00
ccli8 acafdf8304 Fix serial async transfer failed as data with is 16/32 2016-12-19 14:39:52 +00:00
Laurent MEUNIER cf1ea9cecc STM32 I2C: differentiate HW reset and driver reset 
Make a distinct i2c_reset function as defined in MBED HAL api,
from the i2C_hw_reset which simply drives the HW reset signals
 2016-12-19 14:39:51 +00:00
Laurent MEUNIER aec4f2dbb5 SMT32 I2C: initialize clock before configuring PINs 
This is needed especially for F1 family but can apply to all.
 2016-12-19 14:39:49 +00:00
Laurent MEUNIER 6906fbb4a6 STM32 I2C: Initialize hz parameter before reset 
The hz value is used to compute timeouts,
and timeout are used in reset function, so the parameter needs to be
initialized to its default value before being used.
 2016-12-19 14:39:48 +00:00
Laurent MEUNIER 151a9ef6c6 STM32 I2C: use higher IRQ priority for slave vs. master 2016-12-19 14:39:46 +00:00
Laurent MEUNIER 277503e4bb STM32 I2C: restore slave address in case of reset 2016-12-19 14:39:45 +00:00
bcostm 6e94ec7dbe FIX to add the update of hdma->State variable 2016-12-19 14:39:43 +00:00
jeromecoutant 4a7316e786 STM32L0 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- ADC: a parameter setting was missing
- GPIO: mode was not allowed by ST HAL API
- tick: init value was too high for 16b
 2016-12-19 14:39:27 +00:00
jeromecoutant 0eb0121ba3 STM32L0 : refactor stm32l0xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-19 14:39:26 +00:00
jeromecoutant 9fb2a1820d STM32F7 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
 2016-12-19 14:39:24 +00:00
jeromecoutant ebda4649d8 STM32F7 : refactor stm32f7xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-19 14:39:23 +00:00
andreas.larsson d40c1837c9 Added tmpisr = regs->ISR; at the end of the while loop to re-evaluate the ISR value 2016-12-19 14:39:21 +00:00
jeromecoutant dc3252b61a STM32F0 : correct ST HAL API call 
- CAN: compilation issue with assert enabled
- ADC: init parameter was not allowed by ST HAL API
- GPIO: mode was not allowed by ST HAL API
 2016-12-19 14:39:18 +00:00
jeromecoutant 35ccdab0cc STM32F0 : map ST HAL assert into MBED assert 2016-12-19 14:39:16 +00:00
bcostm 01c120894b Correct A3, A4, A5 pins definitions 2016-12-19 14:39:11 +00:00
bcostm d2bbadfec8 Add platform in other python and json files 2016-12-19 14:39:10 +00:00
bcostm 3541878896 Correct SDIO_UART pins configuration 2016-12-19 14:39:08 +00:00
bcostm 3b838d28ec Add this platform in mbed_rtx.h file 2016-12-19 14:39:07 +00:00
bcostm 035c8d3770 Correct system clock configuration 2016-12-19 14:39:05 +00:00
bcostm 51000a3a1e Update hal_tick files 2016-12-19 14:39:03 +00:00
bcostm 702320acd7 Add startup and linker files for ARM_STD, ARM_MICRO, IAR 2016-12-19 14:39:02 +00:00
bcostm e22bbbaee6 Add GCC_ARM files and fix errors during GCC build 2016-12-19 14:39:00 +00:00
bcostm c279154a6b Add cmsis, hal_tick, system files 2016-12-19 14:38:58 +00:00
bcostm b64f0870a4 Add first pin, port and objects files 2016-12-19 14:38:57 +00:00
tomoyuki yamanaka c01027b2b4 Fix frequency function of CAN driver. 
Until now, when the frequency function of CAN driver was executed, signal no output, and the frequency could not be changed.
Since there was an error in the frequency changing procedure I modified it.
 2016-12-19 14:38:55 +00:00
Brian Daniels ddf1de5152 Renames i2c_api.c for STM32F1 targets to fix IAR exporter. 
The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
 2016-12-19 14:38:52 +00:00
jeromecoutant 00d58f0fa3 STM32L1 : correct ST HAL API call 
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
 2016-12-19 14:38:50 +00:00
jeromecoutant 888c52429c STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-19 14:38:49 +00:00
bcostm deecd6e5ac Add SERIAL_FC in targets.json/device_has field for NUCLEO_F103RB 2016-12-19 14:38:47 +00:00
bcostm 09cf02e0ba Add external declaration of PinMap_UART_RTS/CTS[] const tables 2016-12-19 14:38:46 +00:00
Kevin Gillespie 95ccd4d6df Fixing serial readable function. 2016-12-19 14:38:44 +00:00
Mahadevan Mahesh bbdcae3c0a K66F: Enable LWIP feature 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-19 14:38:42 +00:00
Laurent MEUNIER 43854b7365 STM32 NUCLEO-L152RE Update system core clock to 32MHz 
Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz

And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz

This allows to take full benefit of the CPU capability.
 2016-12-19 14:38:41 +00:00
adustm f114ccf94f Add CAN2 missing pins for connector CN12 2016-12-19 14:38:39 +00:00
Laurent MEUNIER 2ac3196496 STM32 I2C - 1MHZ frequency is allowed 
So make the assert to cover all possible values
Also assert applies only for I2C_IP_VERSION_V2.
Also in case of I2C_IP_VERSION_V1, the HAL makes the proper
checks and can dynamically scale the frequency in case of
intermediate value.
 2016-12-19 14:38:30 +00:00
Laurent MEUNIER ca12282118 enable I2C ASYNCH 
the I2C_ASYNCH feature is  added to all STM32 except
F1 family for now. Will be added when HAL update is done.
 2016-12-19 14:38:28 +00:00
Laurent MEUNIER 77576190c6 HAL I2C (V2) sequential transmit / receive 
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
 2016-12-19 14:38:27 +00:00
Laurent MEUNIER a8454a2766 HAL F2: I2C fix btf / rxne cases 
Applying the same fix as in L1 and F4
 2016-12-19 14:38:25 +00:00
Laurent MEUNIER 645d44e2eb HAL L1: I2C fix btf / rxne cases 
This is an alignement to F4 HAL as the same IP is used.
Next official HAL delivery update hall will include the same alignement.
 2016-12-19 14:38:22 +00:00
Laurent MEUNIER 934a8cfb05 HAL L0: I2C / DMA updates 
This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
 2016-12-19 14:38:20 +00:00
Laurent MEUNIER 300c0b266e Make most of the I2C code into a common file 
Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.

The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.

F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
 2016-12-19 14:38:19 +00:00
Mahadevan Mahesh c54fd786e6 K64F DSPI Driver: Fix errors where DSPI state is incorrectly kept busy 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-19 14:38:17 +00:00
Mahadevan Mahesh 7ad3026e76 K64F SPI Update: Implement Asynch API's for SPI 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-19 14:38:16 +00:00
jeromecoutant 58be2d4b67 NUCLEO_F429ZI has integrated LSE 2016-12-19 14:38:14 +00:00
Radhika bf52a8d939 Formatting changes as per guidelines 2016-12-19 14:38:06 +00:00
Radhika aad54b90c3 Register map changes for RevG 2016-12-19 14:38:04 +00:00
jeromecoutant 8e54880eab STM32L476: comments update 2016-12-19 14:38:03 +00:00
jeromecoutant 6a101b4021 STM32L476: no HSE is present in NUCLEO and DISCO boards 2016-12-19 14:38:01 +00:00
adustm 4496908a96 fix #2956. Add HAL_DeInit function if gpio_irq destructor This allows ci-test-shield tests-api-interruptin to pass 2016-12-19 14:38:00 +00:00
Steven Cooreman ec29f2e3f2 Revert "[EFR32] Adding hardware acceleration for mbed TLS" 
This reverts commit c0301b15d2.
 2016-12-19 14:37:57 +00:00
Steven Cooreman cb69b98fcd Revert "[EFR32] Move the mbedTLS hardware acceleration code to EFR32 family" 
This reverts commit a0f62b1e4f.
 2016-12-19 14:37:25 +00:00
Steven Cooreman cf461c504f Move Nanostack driver to Nanostack folder 
mbed compile doesn't support two different FEATURE_X folders being merged, so we'll have to move our nanostack driver into the Nanostack folder for the time being.
 2016-12-19 14:37:23 +00:00
Steven Cooreman 8486cb67cf Make RTX using ARMCC aware of reserved stack and heap 2016-12-19 14:37:20 +00:00
Steven Cooreman 4ea645abcc Fix linker script for ARMCC 
Updated available RAM size and increased reserved heap to 4K
 2016-12-19 14:37:18 +00:00
Steven Cooreman 90e967b1e4 Prevent compiling Nanostack driver without Nanostack 2016-12-19 14:37:16 +00:00
Steven Cooreman 1661a8ac21 fix typo in targets.json 2016-12-19 14:37:15 +00:00
Steven Cooreman 47c4f5c46f Move the mbedTLS hardware acceleration code to EFR32 family 2016-12-19 14:37:10 +00:00
Steven Cooreman 008de9d39f Initial radio driver 
First check-in of the EFR32 radio driver for Nanostack
 2016-12-19 14:37:08 +00:00
Steven Cooreman 24c01c2a7b Adding hardware acceleration for mbed TLS 
Initial check-in of hardware acceleration support on EFR32 for mbed TLS (AES, SHA and ECC).
 2016-12-19 14:37:07 +00:00
Steven Cooreman f2982dd276 Add initial support for EFR32 
Adding target definitions and the HAL implementation for EFR32 Mighty Gecko
 2016-12-19 14:35:07 +00:00
Steven Cooreman 29e1e7af2f Move board controller pin setting to config system 2016-12-19 14:35:05 +00:00
Steven Cooreman 162801ecac Move board controller pin setting to config system 2016-12-19 14:35:03 +00:00
ccli8 1458c54f6b Fix spi_master_transfer failed as bit width is 32 2016-12-19 14:35:02 +00:00
ccli8 e1899bc111 Fix button naming error 2016-12-19 14:35:00 +00:00
ccli8 c0e59ab9d2 Correct return of i2c_byte_write() on NAK 2016-12-19 14:34:58 +00:00
ccli8 659cf338c5 Fix CI I2C EEPROM failed 2016-12-19 14:34:57 +00:00
ccli8 dd8ab407fa Remove SPI MOSI1 and MISO1 pins from pinmap 
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
 2016-12-19 14:34:55 +00:00
ccli8 d9501be829 Remove SPI MOSI1 and MISO1 pins from pinmap 
These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
 2016-12-19 14:34:54 +00:00
ccli8 b76f2bf587 Rename variable name in analog-in 2016-12-19 14:34:52 +00:00
ccli8 342f776bb5 Fix EADC module is initialized multiple times 
Also fix EADC module name EADC is hardcoded.
 2016-12-19 14:34:50 +00:00
ccli8 9466da4c24 Fix CI tests-api-analogin failed 
1. Fix UNO pins A5-A7 don't support analog-in by replacing ADC with EADC to implement analog-in HAL.
2. Update CLK driver to fix EADC clock divider setting error. Also fix CLK_Idle() together.
 2016-12-19 14:34:49 +00:00
ccli8 619c54c54b Fix CI tests-api-analogin failed 
1. Fix ADC convert finish check error.
2. Set ADC Vref to internal by default.
 2016-12-19 14:34:47 +00:00
ccli8 2336b59f0a Support separate enable of GPIO IRQ de-bounce 2016-12-19 14:34:46 +00:00
ccli8 4b7432ffd1 Fix I2C issues 
1. Fix error on return of i2c_byte_write().
2. Fix error in zero-length transfer corner case.
 2016-12-19 14:34:44 +00:00
bcostm 2a7271debe Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions to make LPT tests pass. 2016-12-19 14:34:42 +00:00
jeromecoutant 1a6d35510e DISCO_L053C8 doesn't support LSE 2016-12-19 14:34:41 +00:00
jeromecoutant 2b67bbf348 no HSE available by default for NUCLEO_L432KC 2016-12-19 14:34:38 +00:00
bcostm 9d8c9229f0 Add ADC_VREF label 2016-12-19 14:34:36 +00:00
bcostm 2af84bc0d3 Add more comment on the modified line 2016-12-19 14:34:33 +00:00
bcostm 41b8eda589 STM32F4 - Clear VBATE and TSVREFE bits before configuring ADC channels 2016-12-19 14:34:31 +00:00
Michael Ammann 65fc32fe11 Update PinNames.h 2016-12-19 14:34:30 +00:00
Michael Ammann b32859764a Add files via upload 2016-12-19 14:34:28 +00:00
Michael Ammann 10e8732b23 Create device.h 2016-12-19 14:34:26 +00:00
Michael Ammann 86514eebb6 Update targets.json 2016-12-19 14:34:25 +00:00
tomoyuki yamanaka 48dfc48c9c Bug fix of initial value of interrupt edge in "gpio_irq_init" function. 
Renesas modified the  initial value of interrupt edge in "gpio_irq_init" function.
The value was "both egde(rise and fall)".So we modified it to "low revel".
 2016-12-19 14:34:23 +00:00
Laurent MEUNIER 982595b876 stm32 spi - IRQ management 
Disable IRQ when transfer is finished.
Also clear pending IRQ after they have been disabled.
 2016-12-19 14:34:22 +00:00
Laurent MEUNIER e18854fff6 stm32 spi : IRQ handler light optimization 
This commit contains a few optimizations to get a better performance
in SPI Asynch mode
 2016-12-19 14:33:53 +00:00
Laurent MEUNIER 362aaefedf STM32L0 - update spi HAL driver 
This is a temporary update waiting for the next official release
 2016-12-19 14:32:46 +00:00
Laurent MEUNIER ad14e4f122 STM32L1 - update spi HAL driver 
This is a temporary update waiting for the next official release
 2016-12-19 14:32:44 +00:00
Laurent MEUNIER c4cfa34a63 remove unused module member in spi_s struct 2016-12-19 14:32:42 +00:00
Laurent MEUNIER 6c179ad52d Enable SPI_ASYNCH for L0 and L1 families 2016-12-19 14:32:41 +00:00
Mahadevan Mahesh 4f6fb36d3e Add support for FRDM-KW41 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2016-12-19 14:32:36 +00:00
bcostm 716d8f2cba Update license + date (same license as in mbed.h file) 2016-12-19 14:32:34 +00:00
bcostm 222b2a25ff Typo corrections (functions declaration) 2016-12-19 14:32:32 +00:00
bcostm f526060be5 Timer 16bit: Remove volatile variables. This solved many fails with MBED_24 test. 2016-12-19 14:32:30 +00:00
bcostm b1e558c5b4 Change TimMasterHandle variable declaration + typo corrections 2016-12-19 14:32:29 +00:00
bcostm 0ad561ee86 Add initialization of timer instance in all functions 2016-12-19 14:32:27 +00:00
bcostm 06322d86cd Rename files (remove stm_ prefix) 2016-12-19 14:32:25 +00:00
bcostm c24c950407 STM32L0 - Add patch done previously on these devices. This solves MBED_24 test. 2016-12-19 14:32:24 +00:00
bcostm 0e8196e5b8 Add volatile on one variable (alignment with 16bit file) 2016-12-19 14:32:22 +00:00
bcostm ddbcad4f4a Replace TIM_MST_GET_PCLK_FREQ macro with TIM_MST_PCLK macro 2016-12-19 14:32:20 +00:00
bcostm e0049e5abe STM32L1 - Don't use RepetitionCounter field in timer init 2016-12-19 14:32:19 +00:00
bcostm 731e4c8dce STM32xx - Remove hal_tick.c files and update hal_tick.h with new macro 2016-12-19 14:32:17 +00:00
bcostm cfb155a91f Minor changes 2016-12-19 14:32:15 +00:00
bcostm b209cc9db9 STM32L0 - Remove special treatment for reading the counter 2016-12-19 14:32:14 +00:00
bcostm 2252ca9b48 STM32F0/F1/L0 - Update TIM_MST_GET_PCLK_FREQ macro 2016-12-19 14:32:12 +00:00
bcostm d1055bed49 STM32L0 - Remove devices hal_tick.c files 2016-12-19 14:32:10 +00:00
bcostm e459f4e928 STM21L0 - Remove devices hal_tick.c file and update hal_tick.h 2016-12-19 14:32:09 +00:00
bcostm fb066c9df5 STM32F1 - Remove devices hal-tick files and update hal_tick.h 2016-12-19 14:32:07 +00:00
bcostm a3249fda13 STM32F0 - Add the timer type used (16b or 32b) + periph clock in hal_tick.h 2016-12-19 14:32:05 +00:00
bcostm 47112d1010 Replace all devices hal_tick files with a common 16b and 32b version 2016-12-19 14:32:03 +00:00
bcostm 96b11c1b04 Replace all devices us_ticker files with a common 16b and 32b file 2016-12-19 14:32:02 +00:00
Michel Jaouen 408e92139c TARGET_STM32F4: USB with STM HAL for NUCLEO_F401RE, NUCLEO_F429ZI, NUCLEO_F446ZE, DISCO_F407VG, NUCLEO_F411RE 2016-12-19 14:31:52 +00:00
Michel Jaouen 5fafb73a29 TARGET_STM : USB FS STM HAL changes 2016-12-19 14:31:49 +00:00
Michel Jaouen 98d8acb6c8 DISCO_L476VG : align memory mapping with ARM 2016-12-19 14:31:47 +00:00
Michel Jaouen e566f711a6 DISCO_L476VG: modify clock for USB support 2016-12-19 14:31:46 +00:00
andreas.larsson 9abb7c3777 Updated ARM binary 2016-11-23 17:39:28 +01:00
andreas.larsson 4648ec606b Added updated drivers for GCC, IAR 2016-11-23 15:18:17 +01:00
andreas.larsson c2d09bd6a2 Fixed wrong start params to cbMAIN_startWlan 2016-11-23 11:38:35 +01:00
Martin Kojtal d60f424a7e Merge pull request #3256 from NXPmicro/Include_stddef 
Kinetis SDK: Include stddef.h to fix build errors seen when including…
 2016-11-22 22:20:29 +00:00
Martin Kojtal 905a173a7a Merge pull request #3268 from NXPmicro/Coding_Convention_Changes 
Coding convention changes
 2016-11-22 22:18:41 +00:00
Martin Kojtal 7f44dee6d1 Merge pull request #3278 from bcostm/nucleo-f103rb_ctsrts_pins 
NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control
 2016-11-21 23:22:41 +00:00
Martin Kojtal a987cc0bee Merge pull request #3271 from ARMmbed/odin_wifi_default_on 
WiFi: Make WiFi default networking interface on Odin board
 2016-11-21 23:19:02 +00:00
bcostm 6f12eca4a6 NUCLEO_F103RB - Add RTS/CTS pins for Serial Flow Control 2016-11-17 10:15:21 +01:00
Martin Kojtal 5cea44c755 Merge pull request #3252 from pan-/fix_nrf51_rtc 
[NORDIC - NRF51 - MBED 2] Fix non handled RTC IRQ
 2016-11-16 17:43:31 +00:00
Martin Kojtal 6eb33e5f3c Merge pull request #3251 from LMESTM/dev_stm32l0_cube_v1.7.0 
Dev stm32l0 cube v1.7.0
 2016-11-16 17:43:16 +00:00
Martin Kojtal 5750f31d6d Merge pull request #3238 from LMESTM/dev_i2c_stm32f4hal 
Dev i2c stm32f4hal
 2016-11-16 17:42:12 +00:00