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Remove SPI MOSI1 and MISO1 pins from pinmap 

These pins are for SPI 2-bit mode (not dual mode) and cannot be for SPI standard use.
pull/3467/head
ccli8 2016-11-18 14:33:33 +08:00 committed by Anna Bridge
parent d9501be829
commit dd8ab407fa
1 changed files with 0 additions and 18 deletions
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18
targets/TARGET_NUVOTON/TARGET_NUC472/TARGET_NUMAKER_PFM_NUC472/PeripheralPins.c
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@ -371,25 +371,16 @@ const PinMap PinMap_UART_CTS[] = {
const PinMap PinMap_SPI_MOSI[] = {
{PA_10, SPI_3, SYS_GPA_MFPH_PA10MFP_SPI3_MOSI0},
{PA_12, SPI_3, SYS_GPA_MFPH_PA12MFP_SPI3_MOSI1},
{PB_5, SPI_2, SYS_GPB_MFPL_PB5MFP_SPI2_MOSI0},
{PB_13, SPI_2, SYS_GPB_MFPH_PB13MFP_SPI2_MOSI1},
{PC_4, SPI_0, SYS_GPC_MFPL_PC4MFP_SPI0_MOSI1},
{PC_7, SPI_0, SYS_GPC_MFPL_PC7MFP_SPI0_MOSI0},
{PC_13, SPI_1, SYS_GPC_MFPH_PC13MFP_SPI1_MOSI1},
{PC_15, SPI_1, SYS_GPC_MFPH_PC15MFP_SPI1_MOSI0},
{PD_9, SPI_3, SYS_GPD_MFPH_PD9MFP_SPI3_MOSI1},
{PE_3, SPI_0, SYS_GPE_MFPL_PE3MFP_SPI0_MOSI0},
{PE_7, SPI_0, SYS_GPE_MFPL_PE7MFP_SPI0_MOSI0},
{PE_11, SPI_0, SYS_GPE_MFPH_PE11MFP_SPI0_MOSI1},
{PF_0, SPI_1, SYS_GPF_MFPL_PF0MFP_SPI1_MOSI0},
{PF_1, SPI_2, SYS_GPF_MFPL_PF1MFP_SPI2_MOSI1},
{PF_5, SPI_3, SYS_GPF_MFPL_PF5MFP_SPI3_MOSI0},
{PG_8, SPI_2, SYS_GPG_MFPH_PG8MFP_SPI2_MOSI0},
{PH_8, SPI_2, SYS_GPH_MFPH_PH8MFP_SPI2_MOSI0},
{PH_10, SPI_2, SYS_GPH_MFPH_PH10MFP_SPI2_MOSI1},
{PI_6, SPI_3, SYS_GPI_MFPL_PI6MFP_SPI3_MOSI0},
{PI_8, SPI_3, SYS_GPI_MFPH_PI8MFP_SPI3_MOSI1},
{NC, NC, 0}
};
@ -397,25 +388,16 @@ const PinMap PinMap_SPI_MOSI[] = {
const PinMap PinMap_SPI_MISO[] = {
{PA_2, SPI_3, SYS_GPA_MFPL_PA2MFP_SPI3_MISO0},
{PA_9, SPI_3, SYS_GPA_MFPH_PA9MFP_SPI3_MISO0},
{PA_11, SPI_3, SYS_GPA_MFPH_PA11MFP_SPI3_MISO1},
{PB_4, SPI_2, SYS_GPB_MFPL_PB4MFP_SPI2_MISO0},
{PB_12, SPI_2, SYS_GPB_MFPH_PB12MFP_SPI2_MISO1},
{PC_3, SPI_0, SYS_GPC_MFPL_PC3MFP_SPI0_MISO1},
{PC_6, SPI_0, SYS_GPC_MFPL_PC6MFP_SPI0_MISO0},
{PC_14, SPI_1, SYS_GPC_MFPH_PC14MFP_SPI1_MISO1},
{PD_0, SPI_1, SYS_GPD_MFPL_PD0MFP_SPI1_MISO0},
{PD_8, SPI_3, SYS_GPD_MFPH_PD8MFP_SPI3_MISO1},
{PD_15, SPI_1, SYS_GPD_MFPH_PD15MFP_SPI1_MISO0},
{PE_2, SPI_0, SYS_GPE_MFPL_PE2MFP_SPI0_MISO0},
{PE_6, SPI_0, SYS_GPE_MFPL_PE6MFP_SPI0_MISO0},
{PE_10, SPI_0, SYS_GPE_MFPH_PE10MFP_SPI0_MISO1},
{PF_4, SPI_3, SYS_GPF_MFPL_PF4MFP_SPI3_MISO0},
{PG_7, SPI_2, SYS_GPG_MFPL_PG7MFP_SPI2_MISO0},
{PH_7, SPI_2, SYS_GPH_MFPL_PH7MFP_SPI2_MISO0},
{PH_9, SPI_2, SYS_GPH_MFPH_PH9MFP_SPI2_MISO1},
{PI_5, SPI_3, SYS_GPI_MFPL_PI5MFP_SPI3_MISO0},
{PI_7, SPI_3, SYS_GPI_MFPL_PI7MFP_SPI3_MISO1},
{PI_12, SPI_2, SYS_GPI_MFPH_PI12MFP_SPI2_MISO1},
{NC, NC, 0}
};