Move the mbedTLS hardware acceleration code to EFR32 family

2016-10-28 11:11:58 -07:00 · 2016-10-28 11:11:58 -07:00 · 47c4f5c46f
parent 008de9d39f
commit 47c4f5c46f
44 changed files with 2 additions and 2 deletions
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/Changes_sl_mbedtls.txt
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/Changes_sl_mbedtls.txt
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/README.txt
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/README.txt
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/.gitignore
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/.gitignore
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/aes_alt.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/aes_alt.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/aesdrv.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/aesdrv.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/ccm_alt.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/ccm_alt.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/cmac.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/cmac.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/cmac_alt.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/cmac_alt.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/cryptodrv.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/cryptodrv.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/ecode.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/ecode.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/ecp_alt.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/ecp_alt.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/mbedtls_ecode.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/mbedtls_ecode.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/sha1_alt.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/sha1_alt.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/sha256_alt.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/sha256_alt.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/sl_crypto.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/sl_crypto.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/timing_alt.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/include/timing_alt.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/.gitignore
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/.gitignore
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_authencr.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_authencr.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_authencr_aes.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_authencr_aes.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_authencr_crypto.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_authencr_crypto.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_blockcipher_aes.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_blockcipher_aes.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_blockcipher_crypto.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_blockcipher_crypto.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common_aes.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common_aes.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common_aes.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common_aes.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common_crypto.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common_crypto.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common_crypto.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_common_crypto.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_internal.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/aesdrv_internal.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/cryptodrv.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/cryptodrv.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/cryptodrv_internal.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/cryptodrv_internal.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/em_bufc.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/em_bufc.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/em_bufc.h
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/em_bufc.h
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_aes.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_aes.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_ecp.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_ecp.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_sha1.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_sha1.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_sha256.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_sha256.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_timing.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/sl_timing.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_aes.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_aes.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_ccm.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_ccm.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_cmac.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_cmac.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_ecp.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_ecp.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_sha1.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_sha1.c
--- a/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_sha256.c
+++ b/targets/TARGET_Silicon_Labs/TARGET_EFM32/sl_crypto/TARGET_EFR32/src/slcl_sha256.c
--- a/targets/targets.json
+++ b/targets/targets.json
@ -2192,7 +2192,7 @@
    },
    "EFR32MG1P132f256GM48": {
        "inherits": ["EFM32"],
-        "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL"],
+        "extra_labels_add": ["EFR32", "EFR32MG1", "256K", "SL_RAIL"],
        "core": "Cortex-M4F",
        "macros": ["EFR32MG1P132f256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
        "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],
@ -2202,7 +2202,7 @@
    },
    "EFR32MG1P233F256GM48": {
        "inherits": ["EFM32"],
-        "extra_labels_add": ["EFR32MG1", "256K", "SL_RAIL"],
+        "extra_labels_add": ["EFR32", "EFR32MG1", "256K", "SL_RAIL"],
        "core": "Cortex-M4F",
        "macros": ["EFR32MG1P233F256GM48", "TRANSACTION_QUEUE_SIZE_SPI=4"],
        "supported_toolchains": ["GCC_ARM", "ARM", "uARM", "IAR"],