Laurent Meunier
319223ac16
__cplusplus guard fixed pwmout_device.h for STM32 families
...
This bug prevented using this header in cpp code directly.
2019-08-09 09:51:39 +02:00
Ireneusz Gaicki
b9c4076741
STM32F7: Do not generate redundant IN tokens
...
When STM32F746-DISCO board was being used in (unsupported) USBHost mode,
the communication was unreliable. Our investigation revealed that the
problem lied in redundant IN tokens that the host generated even though
it shouldn't. This could lead to endless high-frequency NAKs being
received from device, which caused watchdog reset as USBHost spent all
time in interrupt handlers.
In our application the clocks frequencies are:
* HCLK = 48 MHz
* APB1 = 6 MHz
* APB2 = 12 MHz
We have captured the raw USB High-Speed traffic using OpenVizsla.
Without this change, when USB MSD device connected to the system
responded to IN with NAK, there were excessive IN tokens generated about
667 ns after the NAK. With this commit the IN tokens are generated no
sooner than 10 us after the NAK.
The high frequency of the IN/NAK pairs is not the biggest problem.
The biggest problem is that the USB Host did continue to send the IN token
after DATA and ACK packets were received from device - *without* any request
from upper layer (USB MSD).
The USB MSD devices won't have extra data available on Bulk IN endpoint
after the expected data was received by Host. In such case IN/NAK cycle
time is only houndreds of nanoseconds, the MCU has no time for anything else.
The problem manifested not only on Bulk endpoints, but also during
Control transfers. Example correct scenario (when this fix is applied):
* SETUP stage
* SETUP [host -> address 0 endpoint 0]
* DATA0 [80 06 00 01 00 00 08 00] [CRC16: EB 94]
* ACK
* DATA stage
* IN
* NAK
... the IN/NAK repeated multiple time until device was ready
* IN
* DATA1 [12 01 10 02 00 00 00 40] [CRC16: 55 41]
* ACK
* STATUS stage
* OUT
* DATA1 ZLP
* ACK
Without this commit, in DATA stage, after the ACK was received, the host
did send extra IN to which device responded with STALL. On bus it was:
* DATA stage
...
* IN
* DATA1 [12 01 10 02 00 00 00 40] [CRC16: 55 41]
* IN
* STALL
* IN
* STALL
* STATUS stage
* OUT
* DATA1 ZLP
* STALL
In the fault case the next SETUP was sent only after 510 ms, which
indicates timeout in upper layer.
With this commit the next SETUP is sent 120 us after the STATUS stage ACK.
2019-07-24 11:40:49 +02:00
Yuan Cao
6ed21ee1c0
Fixed serial_device IRQ infinite loop bug due to uint8_t overflowing
2019-07-13 00:05:25 -04:00
Martin Kojtal
ccb63d771e
Merge pull request #10857 from ARMmbed/feature-watchdog
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Add Watchdog and ResetReason
2019-07-03 11:43:52 +01:00
Martin Kojtal
61c4d05ce9
Merge pull request #10824 from ABOSTM/PRSTM32_PWMWRTIE_GLITCH_10734
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STM32: pwmout_write: configure channel only when not already enabled
2019-06-28 14:24:14 +01:00
Martin Kojtal
924af9481e
Merge pull request #10841 from VVESTM/vve_10827_spi_count
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TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
2019-06-26 09:09:38 +01:00
Martin Kojtal
b0073bb70d
Merge pull request #10774 from fkjagodzinski/fix-uart_irq
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Fix serial IRQ handling
2019-06-25 15:49:41 +01:00
Alexandre Bourdiol
a339084684
STM32: pwmout_write: configure channel only when not already enabled
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Fix PWM glitch on write(), TARGET_STM/pwmout_api.c, #10734
2019-06-20 17:49:16 +02:00
Vincent Veron
31eb49b918
TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
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Extend to all STM targets the work done on PR10752.
Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-06-14 14:15:56 +02:00
jeromecoutant
7d05f22b31
STM32F7 warning compilation
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[-Wparentheses-equality]
[-Wsign-compare]
2019-06-07 18:10:03 +02:00
Filip Jagodzinski
84384162bb
STM32F7: Fix serial IRQ handling
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Check that the RX or TX interrupt is enabled before calling
a registered handler with RxIrq or TxIrq arg.
2019-06-07 15:17:07 +02:00
jeromecoutant
d919498745
STM32: common cmsis.h and device.h
2019-05-27 16:27:41 +02:00
jeromecoutant
570e9b0bf4
STM32 WATCHDOG : increase timeout value
2019-05-24 11:35:42 +02:00
jeromecoutant
0352bbbd5b
STM32 astyle updates
2019-05-10 15:32:05 +02:00
Vincent Veron
9856e86897
TARGET_STM32F7: Reset QSPI in default mode on abort for all versions.
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This patch is missing in F7 HAL.
Fix #10049
Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-04-08 11:47:15 +02:00
Martin Kojtal
6081727cbf
Merge pull request #10115 from enebular/raven
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Uhuru RAVEN: Adding platform HAL
2019-04-04 11:05:23 +02:00
Martin Kojtal
2a694cf1d9
Merge pull request #10143 from jeromecoutant/PR_ADC_RESETINTERNAL
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STM32 ADC INTERNAL CHANNEL reset after read
2019-04-02 13:02:14 +02:00
jeromecoutant
ec00ea5655
STM32 ADC INTERNAL CHANNEL reset after read
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Internal channels use is enabling ADC "internal path"
which needs to be disabled after measurement
2019-03-29 14:30:49 +01:00
Vincent Veron
5765c4d0e0
TARGET_STM32F7: Refresh cache when erasing or programming flash
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The cache must be refreshed when we erase or program flash memory.
It fix 2 issues :
Fix #9934
Fix #6380
This solution was initially proposed in #6380 .
Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-03-28 14:48:12 +01:00
jk
e44aa056c0
added SPDX identifier and
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added the description of uhuru_raven_init function
2019-03-27 17:02:56 +09:00
jk
23cb826314
Add definition of RAVEN
2019-03-27 17:02:55 +09:00
Deepika
122549910e
Add Crash report section to all uARM files
2019-02-28 19:54:38 -06:00
deepikabhavnani
0dc5561991
Guard RAM start and size defines
2019-02-28 19:54:38 -06:00
deepikabhavnani
b598dc1f46
Target_STM: Add ARM_LIB_STACK and ARM_LIB_HEAP section
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Instead of user defined symbols in assembly files or C files,
use linker scripts to add heap and stack - this is inconsistent
with ARM std linker scripts
2019-02-28 19:54:28 -06:00
Cruz Monrreal
e1736cd06f
Merge pull request #9571 from mprse/fix_9523_rtos_less_issue
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Update to 2-region model for HEAP and Stack Memory
2019-02-26 22:50:19 -06:00
bcostm
28462d476a
STM32F7 USB: add patch in CubeF7 hal driver
2019-02-22 10:53:22 -06:00
Deepika
e522c4691e
Target_STM:_sbrk updated to use limits from linker files no need to set defines
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_sbrk uses the exports from linker file __end and __HeapLimit to allocate memory
in heap. Linker scripts were updated accordingly to set the limits.
2019-02-19 15:49:49 -06:00
Martin Kojtal
723236f855
Merge pull request #9307 from mtomczykmobica/ONME-3949
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Configuration options for STM_EMAC buffer counts
2019-02-19 14:09:24 +01:00
Marcin Tomczyk
a5f93e0b07
ONME-3949 Configuration options for STM_EMAC buffer counts
2019-02-19 08:18:18 +01:00
Russ Butler
3bd3aca6db
Add HAL API for analog out pinmap
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Add the function analogout_pinmap to all targets.
2019-02-08 09:10:05 -06:00
Russ Butler
4818f88d73
Add HAL API for analog in pinmap
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Add the function analogin_pinmap to all targets.
2019-02-08 09:09:51 -06:00
Martin Kojtal
ed53fe1ed4
Merge pull request #9534 from jeromecoutant/PR_FLOW
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STM32 Serial Flow Control
2019-02-04 14:35:47 +01:00
jeromecoutant
eec7126d37
STM32 Serial Flow Control
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Crash occured when RTS=CTS=NC
Now we chek if used pins are the same UART as TX and RX
2019-01-31 17:11:23 +01:00
Martin Kojtal
9265c19e2e
Merge pull request #9394 from jeromecoutant/PR_PERIPH
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STM32: PeripheralPins files update from lastest CubeMX tool version
2019-01-31 11:21:09 +01:00
Martin Kojtal
489e52e428
Merge pull request #9410 from jeromecoutant/PR_F756_L486
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STM32F756 and STM32L486 alignment with STM32F746 and STM32L476
2019-01-28 10:22:48 +01:00
jeromecoutant
a5ef971402
STM32: PeripheralPins files minor update
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Script version 1.4
CubeMX DB version DB.5.0.1
2019-01-24 10:51:30 +01:00
Russ Butler
82b131aa59
Use dedicated PinMap for each QSPI data line
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Split PinMap_QSPI_DATA into PinMap_QSPI_DATA0 - PinMap_QSPI_DATA3.
This allows pins to be selected more accurately.
2019-01-22 12:11:15 -06:00
jeromecoutant
5ae13f9c7b
STM32F756 / STM32F746 alignment
2019-01-17 11:15:39 -06:00
Przemyslaw Stekiel
58f6bf7292
[STM] Support boot stack size configuration option
2019-01-08 15:32:06 +01:00
Alastair D'Silva
aa80b7c70a
Don't use define checks on DEVICE_FOO macros (partner code)
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The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
2018-12-20 20:02:29 +11:00
jeromecoutant
40f6d58b89
STM32 QSPI: remove QUADSPI_BK2 as dual bank feature is not supported
2018-12-13 10:56:37 +01:00
jeromecoutant
4a6bc96345
STM32F769 : add QSPI definition
2018-12-13 10:56:29 +01:00
jeromecoutant
64f8cc472c
NUCLEO_F746ZG : no embedded QSPI
2018-12-13 10:56:26 +01:00
jeromecoutant
7c8de3c4e1
STM32 : removed unused QSPI pin names
2018-12-13 10:56:25 +01:00
jeromecoutant
6b226ffcef
STM32 RTC update for easy maintenance
2018-12-04 11:08:30 +01:00
Cruz Monrreal
3cc7530039
Merge pull request #8844 from jeromecoutant/PR_HTML
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STM32 : Remove html release notes files
2018-11-30 19:20:44 -06:00
Martin Kojtal
e1b60b1e58
Merge branch 'disco_f746ng_bootloader' of https://github.com/bcostm/mbed-os into dev_rollup
2018-11-24 20:49:55 +00:00
bcostm
a35deac578
DISCO_F746NG: add bootloader support
2018-11-23 10:52:13 +01:00
jeromecoutant
baec3b9e90
STM32 remove html release notes files
2018-11-22 16:27:59 +01:00
Senthil Ramakrishnan
ef8c1c3cb6
Linker script modifications for crash data region
2018-11-16 13:59:59 -06:00
Cruz Monrreal II
0803c04d7d
Merge branch 'PR_LL_GPIO' of ssh://github.com/jeromecoutant/mbed into rollup
2018-11-09 11:40:29 -06:00
jeromecoutant
4cf4cf1375
STM32 GPIO : code cleaning
2018-11-08 17:26:17 +01:00
David Saada
542744d03c
Support erase value in Flash HAL drivers, FlashIAP and block devices
2018-11-07 14:23:07 +02:00
bcostm
3e547e2101
DISCO_F769NI: add definitions for bootloader
2018-10-31 10:15:17 +01:00
Deepika
bf1a2c8485
[ST]: Fix alignment of execute region to 8-byte boundary in ARM linker files
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--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
2018-10-09 14:47:14 -05:00
Maciej Bocianski
5195c820e6
standardise QSPI pin names
2018-08-24 12:09:51 +02:00
adustm
7dda4e4fc6
Implement qspi_free function
2018-08-22 15:02:10 +02:00
jeromecoutant
43258a8ff4
STM32 : add all QSPI pins in available targets
2018-08-22 15:02:08 +02:00
adustm
c00e49fcf2
Enable QSPI for DISCO_F746NG
2018-08-22 15:01:54 +02:00
jeromecoutant
749343f695
STM32F7 assert in SetSysClock replaced
2018-08-13 15:55:17 +02:00
Laurent Meunier
402f3f1c3f
STM32: check for UART ongoing transfers before entering deepsleep
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As suggested by Russ Butler in mbed-os issue #7328 , and until there is an
implementation of mbed-os issue #4408 , we are implementing a workaround
at HAL level to check if there is any ongoing serial transfer (which happens
if HW FIFO is not yet empty).
In case a transfer is ongoing, we're not entering deep sleep and
return immediately.
2018-08-07 11:30:53 +02:00
bcostm
2c96c5d270
STM32F7: remove HAL_InitTick() declaration in us_ticker_data.h files
2018-08-01 09:56:39 +02:00
jeromecoutant
59fd0c0cce
STM32F2/F4/F7 : LL API is now available
2018-07-18 15:17:46 +02:00
bcostm
7097e07b62
stm32 ticker: typo corrections
2018-07-11 14:43:36 +02:00
bcostm
d8e839a789
stm32 ticker: change license
2018-07-11 14:43:16 +02:00
bcostm
32031cbab3
stm32 ticker: rename hal_tick.h in us_ticker_data.h
2018-07-11 14:42:44 +02:00
bcostm
fbd7a97e19
stm32 ticker: rename macro and update ST HAL Tick functions
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- rename TIM_MST_16BIT in TIM_MST_BIT_WIDTH in order to use it directly in ticker info structure
- change HAL_InitTick() and HAL_GetTick()
2018-07-11 14:39:42 +02:00
jeromecoutant
3721ac44d2
STM32 serial RX/TX active patch
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In serial_tx_active and serial_rx_active functions,
we check the internal state value with
HAL_UART_STATE_BUSY_TX = 0x21U,
HAL_UART_STATE_BUSY_RX = 0x22U,
It seems that value can also be :
HAL_UART_STATE_BUSY_TX_RX = 0x23U,
2018-06-28 18:05:52 +02:00
jeromecoutant
e9d7128485
TARGET_STM32F7 astyle
2018-06-27 14:42:56 +02:00
bcostm
b5a8dc513c
fix hash alignment of F2, F7, L4
2018-06-13 11:51:24 +02:00
Cruz Monrreal
3d61cb59ab
Merge pull request #6948 from jeromecoutant/PR_ETHER
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STM32 ETH : remove TX RX locking interrupt perforation
2018-06-11 09:02:21 -05:00
Cruz Monrreal
23bc4e0fe2
Merge pull request #7088 from bcostm/dev_F7_flash_dual_bank
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STM32F76x: Add support of dual bank flash mode
2018-06-11 08:58:55 -05:00
bcostm
b087390a1a
Remove HAL_TICK_DELAY (no more used)
2018-06-05 16:53:40 +02:00
jeromecoutant
b79be416c8
Dual Bank Flash support update
2018-06-04 13:37:59 +02:00
bcostm
cc14540140
Add support of Flash dual bank mode on DISCO_F769NI
2018-06-04 13:37:59 +02:00
bcostm
b647ecf80c
Add support of Flash dual bank mode on NUCLEO_767ZI
2018-06-04 13:37:59 +02:00
Cruz Monrreal
07fb7c1adc
Merge pull request #6987 from jeromecoutant/PR_ADC
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STM32 ADC update
2018-06-02 19:52:51 -05:00
jeromecoutant
06bca28268
STM32F7 ADC internal channels update
2018-05-22 13:16:37 +02:00
jeromecoutant
c31554f618
STM32 ETH : remove TX RX locking interrupt perforation
2018-05-18 10:53:02 +02:00
jeromecoutant
b30f3abf11
STM32 PeripheralPins.c second update after review
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genpinmap script version 1.1
2018-05-17 17:58:09 +02:00
jeromecoutant
b928439ef7
STM32F7 DISCO : PeripheralPins.c and PinNames.h files alignment
2018-05-16 17:05:06 +02:00
jeromecoutant
d0da6dd34e
STM32F7 NUCLEO : PeripheralPins.c and PinNames.h files alignment
2018-05-16 17:04:27 +02:00
Cruz Monrreal
0f51ea031e
Merge pull request #6610 from pauluap/stm32_eth_remove_tx_rx_locking_interrupt_perforation
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Stm32 eth remove tx rx locking interrupt perforation
2018-05-07 10:51:03 -05:00
Cruz Monrreal
e2567e5dad
Merge pull request #6599 from jeromecoutant/PR_WARNING
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STM32 compilation warning issues
2018-04-16 10:41:36 -05:00
Paul Thompson
b45d4233e1
Make the atomic_clr_u32 conditional use raw values rather than computed, remove need for guards
2018-04-13 04:44:43 -07:00
Paul Thompson
2211a27f53
Drop usage of ilen, just use len and cast it to int32_t as appropriate
2018-04-13 00:27:00 -07:00
Paul Thompson
8f4a5e2093
Revert to original fix concentrating on type correctness
2018-04-12 10:09:53 -07:00
Paul Thompson
430784b084
Initial work was for unsigned-signed comparison fix. Current work fixes negative number issues
...
Compile: stm32f7xx_hal_pcd.c
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c: In function 'PCD_WriteEmptyTxFifo':
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1310:11: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (len > ep->maxpacket)
^
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1325:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (len > ep->maxpacket)
^
2018-04-12 09:43:18 -07:00
Paul Thompson
c67f535fb3
Drop locking around TX and RX. The DMA channels are independent of each other
2018-04-12 09:42:28 -07:00
jeromecoutant
2d0dce1db5
STM32F7 : correct compilation warnings
2018-04-12 10:55:02 +02:00
Cruz Monrreal
5648b156e6
Merge pull request #6063 from bcostm/PULL_REQUEST_CUBE_UPDATE_F7_V1.10.0
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STM32F7: Update ST HAL driver with CubeF7 v1.10.0
2018-02-14 12:41:37 -06:00
Wilfried Chauveau
d1a0ff9964
remove magic calibration value for HSI in ST's targets
2018-02-12 16:47:35 +00:00
bcostm
118073a9c5
Add missing can legacy file
2018-02-12 10:37:03 +01:00
bcostm
58c4a5f83e
F7 ST CUBE V1.10.0
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F7 HAL driver V1.2.5
2018-02-12 10:37:03 +01:00
Cruz Monrreal
6a8a818ebf
Merge pull request #6012 from jeromecoutant/PR_SPI_FLUSH
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STM32 SPI ASYNC - Add FIFO flush before transfer
2018-02-05 10:11:03 -06:00
jeromecoutant
703df3b6f9
STM32F7 SPI - add missing HAL files
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ST_INTERNAL_REF 43358
2018-02-05 11:06:14 +01:00
Cruz Monrreal
1e794393e5
Merge pull request #5972 from bcostm/dev_BL_STM32F7
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STM32F7: Add bootloader support (new trial)
2018-02-02 10:05:49 -06:00
Cruz Monrreal
f907012e55
Merge pull request #5962 from bcostm/fix_usart_irq_index
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STM32: Fix usart irq index
2018-01-31 12:16:17 -06:00
bcostm
689e15cf29
STM32 serial: improve irq index management for F7 devices
2018-01-29 17:23:21 +01:00
bcostm
5ad0887d7e
NUCLEO_F767ZI: Add bootloader support
2018-01-29 15:53:44 +01:00