Commit Graph

616 Commits (f5385e7a1474efc122bd9cdbb36c70a115a8f209)

Author SHA1 Message Date
Cruz Monrreal c8bd08f60e
Merge pull request #6043 from ithinuel/add-rak811
add support for the RAK811
2018-03-30 01:54:19 -05:00
Jimmy Brisson eaa31dd66e
Merge pull request #6475 from SiliconLabs/feature/new/tickless
Enable tickless mode on Silicon Labs targets
2018-03-29 11:59:49 -05:00
Jimmy Brisson 0615111785
Merge pull request #5902 from ganesh-ramachandran/master
Added Support for Toshiba TMPM46B
2018-03-29 11:58:14 -05:00
Wilfried Chauveau 85af9f96ea add IAR to the supported toolchain 2018-03-28 10:03:23 +01:00
Wilfried Chauveau 88a2df72e2 fix device name (an mixed tab/space) 2018-03-27 13:35:35 +01:00
Steven Cooreman cbba94b2f4 Enable tickless mode on Silicon Labs targets 2018-03-27 12:44:53 +02:00
Wilfried Chauveau c31676306a switch to stm32l151cb-a & work around flash size field width. 2018-03-26 18:00:18 +01:00
Ganesh Ramachandran 4e7e9e95a1 Added Support for Toshiba TMPM46B 2018-03-26 15:39:05 +05:30
Jimmy Brisson bac1f00e2e Remove supertarget 2018-03-23 09:52:24 -05:00
Wilfried Chauveau 758f3b2dbd add support for the RAK811 2018-03-23 10:19:49 +00:00
Martin Kojtal 7b325f30a0
Merge pull request #6168 from hug-dev/cm3ds-memory
CM3DS Maintenance Pull Request: Memory changes (2/4)
2018-03-21 14:16:16 +01:00
Cruz Monrreal 2c7f909eea
Merge pull request #6245 from mbedNoobNinja/Sync_PR
Update for VK_RZ_A1H
2018-03-20 15:21:01 -05:00
mbedNoobNinja cf8fd20f9b Enabled os5 support for VK_RZ_A1H & synced with rest Renesas targets !
Mbed-os 5.4.7 was the last unofficial working support for this target.
Since Mbed-os 5.6.0, the support is now official and VK_RZ_A1H is now "codebase aligned" with GR_PEACH (RZ_A1H) & GR_LYCHEE (RZ_A1LU) !
2018-03-20 11:49:03 +02:00
Cruz Monrreal 0adef8a959
Merge pull request #6379 from bcostm/dev_DISCO_L496AG
DISCO_L496AG: Add new platform
2018-03-19 11:18:27 -05:00
Cruz Monrreal 02130a282e
Merge pull request #6346 from 0xc0170/fix_6252
Fix for #6252
2018-03-16 11:43:31 -05:00
bcostm 974917809d DISCO_L496AG: remove morpho connector in targets.json 2018-03-16 10:02:12 +01:00
bcostm 5c484aaf3d DISCO_L496AG: add platform in targets.json file 2018-03-16 10:02:12 +01:00
Cruz Monrreal 95fb33f041
Merge pull request #6198 from codeauroraforum/Add_LPC54XXX_Flash_Support
Flash support: Add flash support for LPC54114 & LPC546XX
2018-03-15 10:49:08 -05:00
Martin Kojtal d6a0a94010 WISE_1570: use hex as output
Fixes #6252. Use hex rather than binary - use the hex format validation.
2018-03-13 13:52:11 +00:00
Martin Kojtal dd84f32043 STM32L486: fix two ram region define for GCC ARM
Based on the changes for other targets, these 2 were left.
2018-03-13 13:51:59 +00:00
Hugues de Valon a453faa4e9 CM3DS: switch to larger memories for code and data
This patch changes the linker files and defines to use the ZBT SSRAM
instead of the FPGA Block RAM for code and data.
The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and
testbench user guide explains the available memories.
This switch improves code memory from 256 kB to 4 MB and data memory
from 128 kB to 4 MB.

However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the
processor can only boot at address 0x00000000 which means that it
expects the vector table to be at that address. That is why we have to
create 2 load regions in the linker scripts: one with only the vector
table at address 0x0 and one with code + data at address 0x00400000.
Because of these two load regions, linker will produce different
behaviours:
    * GCC_ARM and IAR will only create 1 binary with both load regions
padding with 0 in between. The binary will then be very large (at least
4 MB) and the flash process will take longer.
    * ARM and ARMC6 will create 2 binaries for the two load regions. The
load addresses of the two binaries can be written in the images.txt file
on the MPS2 board. You can also use the --bincombined option of fromelf
utility to produce only 1 large binary.

This patch also adds the memory_zones.h file to try to put in common all
the memory addresses that were previously hard coded in the linker
scripts / startup files.

With that patch in, the simplest option is to directly use the .elf file
with the MPS2, which is only possible with mbb_v225.ebf and more recent
firmwares. It will now be the default for CM3DS.

This commit works with greentea thanks to the now merged pull request
ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board.

Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-03-12 16:25:05 +00:00
Martin Kojtal cf4c7a5d35
Merge pull request #6164 from ashok-rao/br-BL652
Adding Laird BL652 as new target
2018-03-08 17:45:01 +01:00
Mahesh Mahadevan 3f302961e1 Flash support: Add flash support for LPC54114 & LPC546XX
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-03-07 13:06:41 -06:00
Cruz Monrreal fb0eba4cd2
Merge pull request #6235 from gorazdko/lpc546xx-fixes
mcu_lpc546xx: move "release_versions" to children and fix clock
2018-03-06 20:41:56 -06:00
Ashok Rao 008e937524 Incorporating review comments 2018-03-06 15:38:02 +00:00
gorazd 2f8b6dcaa9 mcu_lpc546xx: move "release_versions" to children 2018-02-28 13:16:01 +01:00
daid 62599a97f7 Add support for STEVAL-3DP001V1 board, which has an STM32F401VE chip. This support is based on the NUCLEO-F401RE board. Which has the same amount of flash/ram but less pins available on the chip. 2018-02-28 09:37:39 +01:00
Cruz Monrreal 153fa05bea
Merge pull request #6172 from adustm/l4_linkergcc
Use SRAM2 32Kbytes on STM32L475 / L476 and L486 devices
2018-02-27 13:46:26 -06:00
Cruz Monrreal 4139f13e31
Merge pull request #6170 from hug-dev/cm3ds-update-drivers
CM3DS Maintenance Pull Request: Driver updates (4/4)
2018-02-27 00:36:34 -06:00
Cruz Monrreal 80263eaa41
Merge pull request #5957 from u-blox/R410M_Changes
C030 R410M Target Added
2018-02-26 15:02:12 -06:00
Cruz Monrreal c9cefccbdc
Merge pull request #6116 from marcuschangarm/fix_trng_nrf52
Add TRNG for NRF52832
2018-02-26 12:09:43 -06:00
adustm 98657449b8 Use the TWO_RAM_REGIONS in targets.json for STM32L475 / STM32L476 and STM32L486 devices 2018-02-22 17:38:30 +01:00
Mahesh Mahadevan a9cd4705d8 LPC546XX: Add support for 220MHz core speed available on LPC54628
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2018-02-22 07:30:19 -06:00
Ashok Rao 65f210288c Adding Laird BL652 as new target 2018-02-22 11:49:58 +00:00
Marcus Chang 9439c191de Add TRNG for NRF52832
Use SoftDevice API to get random numbers when present and active,
otherwise read random numbers directly from TRNG peripheral.
2018-02-21 12:06:12 -08:00
Galanakis, Minos ffc7b91128 CM3DS: update tickers implementation
The HAL implementation (us_ticker.c and lp_ticker.c) now calls function
in cmsdk_ticker.c file. This file contains the necessary logic to be
able to only use one hardware timer (CMSDK timer) per mbed ticker.

This commit also updates the timer driver and removes legacy definition.

Change-Id: If40413822832117f9b78f38d2cdda7847284b035
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
2018-02-21 18:12:55 +00:00
Cruz Monrreal 80082278b8
Merge pull request #6124 from marcuschangarm/nrf52_flash_fix
Make NRF52 flash work with SoftDevice
2018-02-20 13:31:45 -06:00
Cruz Monrreal 0368a8463f
Merge pull request #6041 from jeromecoutant/PR_STDIO_bug
STM32 STDIO pin redefinition
2018-02-20 13:13:44 -06:00
Fahim Alavi 192250af87 Support added for R410M Changes
target added r410m

Spaces removed

Trace updated
2018-02-20 10:32:14 +05:00
Cruz Monrreal 0ceecb946d
Merge pull request #5956 from marcuschangarm/feature-hal-swo
[feature-hal-itm] Instrumented Trace Macrocell HAL API for SWO debug output
2018-02-16 16:08:12 -06:00
Marcus Chang 0a1cae9352 Make NRF52 flash work with SoftDevice
How you write and ersae the flash on the NRF52 changes depending on
whether the SoftDevice is enabled or not.

This change does a runtime check before erasing and writing, and
then chooses the correct function to perform the action.
2018-02-16 13:54:27 -08:00
Cruz Monrreal 659bcc3fb3
Merge pull request #6088 from pilotak/master
STM32F429ZI add SERIAL_ASYNCH
2018-02-16 11:52:15 -06:00
Marcus Chang 954ae4a52a itm_api.c implementation for Silicon Labs EFM32 series
SWO frequency: 875 kHz
2018-02-16 08:24:42 -08:00
Marcus Chang 6aa0975d71 itm_api.c implementation for Nordic NRF52 series
SWO frequency: 4000 kHz
2018-02-16 08:24:42 -08:00
Cruz Monrreal ee52f9044a
Merge pull request #5892 from OSHChip/master
add OSHChip as an mbed target
2018-02-14 15:19:26 -06:00
Pavel Slama e5885f6a87
STM32F429ZI add SERIAL_ASYNCH 2018-02-13 22:47:56 +01:00
Senthil Ramakrishnan 96d900c99f Fixes for targets with invalid HardFault_Handler implementation and review/other fixes 2018-02-12 11:50:33 -06:00
Cruz Monrreal 75e6d97735
Merge pull request #6042 from jeromecoutant/PR_DISCO_F303
DISCO_F303VC : STDIO pins correction and alignment with STM32 family
2018-02-12 10:24:57 -06:00
jeromecoutant be90983ca8 STM32 STDIO pin redefinition
wiki page https://os.mbed.com/teams/ST/wiki/STDIO updated
2018-02-12 13:01:33 +01:00
Martin Kojtal 9f6eb14ae2
Merge pull request #5996 from ashok-rao/br-BL600
Adding LAIRD_BL600 MTB
2018-02-08 15:23:07 +00:00