On some targets like STM family boards with LPTIM enabled an interrupt is triggered on counter rollover.
We need special handling for cases when next_match_timestamp < start_timestamp (interrupt is to be fired after rollover).
In such case after first wake-up we need to reset interrupt and go back to sleep waiting for the valid one.
On some targets like STM family boards with LPTIM enabled there is a required delay (~100 us) before we are able to reprogram LPTIM_COMPARE register back to back.
This is handled by the low level lp ticker wrapper which uses LPTIM_CMPOK interrupt. CMPOK fires when LPTIM_COMPARE register can be safely reprogrammed again.
This means that on these platforms we have additional interrupt (CMPOK) fired always ~100 us after programming lp ticker.
Since this interrupt wake-ups the board from the sleep we need to go to sleep after CMPOK is handled.
Background:
There is an errata in LPTIM specification that explains that CMP Flag
condition is not an exact match (COUNTER = MATCH) but rather a
comparison (COUNTER >= MATCH).
As a consequence the interrupt is firing early than expected when
programing a timestamp after the 0xFFFF wrap-around.
In order to
work-around this issue, we implement the below work-around.
In case timestamp is after the work-around, let's decide to program the
CMP value to 0xFFFF, which is the wrap-around value. There would anyway be
a wake-up at the time of wrap-around to let the OS update the system time.
When the wrap-around interrupt happen, OS will check the current time and
program again the timestamp to the proper value.
Deprecate wait() in favour of acquire(), try_acquire(),
try_acquire_for() and try_acquire_until().
Brings Semaphore more into line with CMSIS-RTOS 2 (which uses "acquire"),
itself (as it has "release"), and other classes having "try", "try for"
and "try until".
Also steps away from vague "wait" term - the primary operation here is
to acquire the semaphore, and this will of course sleep.
* capitalize driver class name,
* reword test docs for the driver & HAL,
* capitalize Mbed name,
* reword the comments explaining the SERIAL_FLUSH_TIME_MS macro.
Change the config parameter used as a delay before sending the sync
packet after the device reset in watchdog and reset_reason tests. Use
'forced_reset_timeout' instead of 'program_cycle_s'.
The latest rebase of the watchdog feature branch introduced errors in compiling
watchdog tests due to missing headers.
- Watchdog HAL API test
Include missing header files to main.cpp (mbed_wait_api.h, stdlib.h).
- Watchdog HAL API timing test
Include missing header files to main.cpp (us_ticker_api.h).
- Watchdog Driver API test
Include missing header files to main.cpp (mbed_wait_api.h, stdlib.h).
Inject mbed namespace into main.cpp to fix Watchdog name resolution.
On NUMAKER_PFM_NANO130 target, WDT's clock source is fixed to LIRC, which is much
less accurate than other targets. Enlarge delta define to pass this test.
due to partial implementation. Having FUTURE_SEQUANA_M0 and
FUTURE_SEQUANA PSA targets is misleading.
Signed-off-by: Devaraj Ranganna <devaraj.ranganna@arm.com>
Reason for needing greater timeout could be this test's performance.
UDPSOCKET_ECHOTEST_BURST_NONBLOCK is implementing the receiving
differently and is passing with 1 second timeout.
Get rid of a volatile, and use atomics to synchronise with the interrupt
routine instead.
Useful as a non-RTOS basic compilation check for the atomics - the
fuller atomic test relies on the RTOS.
These are platform tests, but rely on the RTOS to run multiple threads
to exercise it.
(The atomics are still useful in non-RTOS, to protect against interrupt
handlers, but testing versus other threads is easier. The implementation
is the same either way, so doesn't seem worth testing non-RTOS
specifically).
The loop was wrongly incrementing the index of the array after assiging
the value. Thus the first array element was used twice and the last one
was never user. The issue is fixed and the loops are refactored and
simplified to avoid such confusion in the future.
This test case uses `hidapi` -- a cross-platform Python module.
To keep the initial Mbed setup as simple as possible, the `hidapi`
module is skipped on Linux hosts because of its external dependancies
for this platform.
The module can be easily installed following instructions from the
README file.
The test case is skipped if the host machine lacks `hidapi` module.
Wait for the host driver to finish setup before sending any HID reports
from the device.
USBHID::wait_ready() blocks until the device reaches 'configured' state,
but the state of the host HID driver remains unknown to the device.
To successfully use pyusb on Windows hosts, a Zadig configuration has to
be performed. Since config for basic tests has already been provided,
use it again.
FastModels are a software simulator for Arm platform/cores.
They mean to be used as a tool for testing or early prototype stage development.
Due to the nature of software simulator can't grantee the timing accuracy like HW.
So time drifting test is skipped for software models.
Reason for needing greater timeout could be this test's performance.
UDPSOCKET_ECHOTEST_BURST_NONBLOCK is implementing the receiving
differently and is passing with 1 second timeout.
Added WiFi_Bt CM4 PSA target in mbedos json
Added SPE-NSPE mailbox initialization for CM4 SystemInit
Made similar to FUTURE_SEQUANA configurations
Copied FUTURE_SEQUANA CM0 SPM part for WiFi_Bt smoke test
Added CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Sorted files for new CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Copied files for CY8CKIT_062_WIFI_BT_M0_PSA from FUTURE_SEQUANA
Copied and updated cm0p start files
Corrected according to FUTURE_SEQUANA
Changes to M0 startup files to have SPM started
Fixed implicit declaration warning
Commented interrupts enabling according to FUTURE_SEQUANA flow
Updated prebuild spm_smore CM0 hex for CM4 target
Turned on greentea environment
Used special memory region for common CM0/CM4 data
Updated prebuild CM0 SPM hex
Placed shared memory region for flash operations into SPM shared memory region
Updated cyprotection code and configuration
Start address of protected regions is set by a defined number from target.json
Added masters pcMask configuration
Added support for PSA target to WIFI_BT board
Enabled resources protection for SPM
Aligned RAM usage according to Cypress FlashBoot and CyBootloader
alligned protection config
Added CYW943012P6EVB_01_M0 target
Enlarged heap size, remobed nv_seed
Added heap reservation in linker script from mbed-os
Removed heap size definition
turned on nv_seed config
Removed nv_seed macros
Enabled protection for PSoC6 CM0
Added PSoC6 CM0 PSA readme
Enabled mbed_hal-spm test
Enabled nv_seed and removed unneeded ipc config define
Added SPDX string to feature_ble cypress target files
Removed unneeded supported_toolchains lines for Cypress targets
Disabled protection settings
Corrected flash initialization for PSoC6 CM0 PSA
Changed PSoC6 IPC6 protection for flash
Enabled special flash initialization and enabled protection settings
Updated and added new prebuild PSoC6 CM0 PSA hex files
Disabled HW TRNG and CRC for PSoC6 CM4 PSA target
Added missing const to allow types to match
Updated PSoC6 WIFI_BT_PSA prebuilt directory
Moved PSoC6 shared section usage area definition to begin of ld
Added initial ARM_STD linker and startup files for PSoC6 CM0
Added initial IAR linker and startup files for PSoC6 CM0
Added defines to disable some SPM protection settings for PSoC64
Moved Flash function variables into separate memory region
Added defines for new Public area definition
Updated PSoC6 CM0_PSA hex-files
On platforms using coretx m33 accessing the secure memory will cause SecureFault instead of Hardfault.
SecureFault is implemented in the secure image and cannot be changed in runtime.
-Add bug fix for psa_security_lifecycle_state function - PR #9745
-Remove lifecycle data from temp boot status data
-Update attesttation_partition_json file to use
PSA_PLATFORM_LC_GET and generate partition
code - auto generated files update