For enhanced security ARMv8-M firmware doesn't allow the hardfault
handler to be hooked by non-secure code. Because of this there is no
way to recover from the MPU fault tests. This PR disables those tests
until hardfault recovery is supported by secure firmware.
Ensure that code written to ram is flushed and that caches are cleared
before attempting to executing from ram. This fixes CI failures on the
MPU test when it is built for Cotex-M7 devices such as the
NUCLEO-F746ZG.
Make the following changes:
-Allow a vector specific ARM MPU driver by defining MBED_MPU_CUSTOM
-Allow ROM address to be configured for ARMv7-M devices by
setting the define MBED_MPU_ROM_END
-Add ROM write protection
-Add new functions and lock
-enable at boot
-disable during flash programming
Create a dedicated MPU directory for standard Arm MPU implementations
in preparation for the Arm v8m MPU. Replace MBED_MPU_ENABLED with
DEVICE_MPU to align with the porting layer of other HAL APIs.
When programming flash using the FlashIAP API allow execution from
ram. Many devices require flashing to be done from RAM.
Also allow execution from ram when running the low level flash tests.
Test that the MPU correctly stops execution of memory in the stack
region, heap region, data region and bss region. Also check that the
MPU can be enabled, disabled and freed.
When DEVICE_LPTICKER is defined set_time() only works correctly on
the first call. This test calls set_time() twice and ensures the
time set by both calls is correct. This test only runs if
DEVICE_RTC or DEVICE_LPTICKER is defined.
1. Add flash config files.
2. Flash used is MX25U3235F, include information for this
device in the flash config file
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Static Thread methods and signal methods have been deprecated. Remove
all references in the main code, and most of the tests. Some tests of
the deprecated APIs themselves remain.
This is fix for issue 8368.
Test is causing some problems on `REALTEK_RTL8195AM` and `ARM` compiler. There is some kind of memory issue. Probably there is not enough memory space for global data provided by the test. Data definitions have been moved into test function body so, they will land on stack. With this fix the test works on `REALTEK_RTL8195AM/ARM`.
Increase delta to 500 us. This value is still short enough to detect
incorrect behavior of the sleep_manager_can_deep_sleep_test_check() fun,
but allows the targets with low LP timer accuracy to pass, i.e.
NUCLEO_F429ZI.
There is no problem with this test during the morph, but some issue has been noticed while testing new Jenkins CI in Oulu on NRF52_DK.
I was able to reproduce the issue locally. The difference between morph and local run is that CPU statistics are enabled on morph. This makes the difference and test passes.
The sleep test case perform sleep for 100 us, 200 us, ... ,1000 us in loop (us ticker wakes the board) and verifies if sleep time matches the assumption.
I got the following results:
sleep wake-up after
100 us ~100 us ok
200 us ~200 us ok
300 us ~300 us ok
400 us ~400 us ok
500 us ~14 us (??)
When requested sleep time is equal to 500 us some unexpected interrupt occurs which wakeup the board and force the test to fail.
Register state just after exit from sleep:
Control and State Register: 0x00400000 (ISRPENDING - Interrupt pending flag is set).
NVIC Interrupt Set-pending Register[0]: 0x00000004 (UARTE0_UART0_IRQn) or 0x00000200 (TIMER1_IRQn - timer used by us ticker).
UART interrupt is generated because of green-tea transmission. We know that it is performed while test is executed since we need to wait before going into deep-sleep since otherwise the transmission will be broken. So to take care of UART interrupt we need to wait before sleep test in the same way like it is done in deep-sleep test.
Add a test to ensure that devices have at least 2K free ram
and 2K free heap. This test should be the first test that fails
due to running out of ram or heap.
- code refactoring and preparation for enabling DPI/QPI tests
- reduced multiple test count to 4
- use common flash config header for all MX25RXX35F chips
- fix sector erase max time on N25Q128A
Main idea of introduced changes is to ease adding support for new flash chips
Major changes:
- move implementation of all memory chip specific functions to memory config file (no weak functions)
- add support for 1-2-2 write
To handle timer rollovers the test tests-mbed_hal-common_tickers_freq
calls intf->set_interrupt(0). For this to work correctly the ticker
implementation must fire an interrupt on every rollover event though
intf->set_interrupt(0) was called only once. Whether an interrupt will
fire only once or multiple times is undefined behavior which
cannot be relied upon.
To avoid this undefined behavior this patch continually schedules an
interrupt and performs overflow detection on every read. This also
removes the possibility of race conditions due to overflowCounter
incrementing at the wrong time.
FastModels targets are simulator running on the x86 hosts.
As the nature of non-RealTime x86 OS and FastModels, timing accuracy is not guaranteed
So skipping the time drifting tests on FastModel targets
When the define LPTICKER_DELAY_TICKS is set deep sleep can be randomly
disallowed when using the low power ticker. This is because a Timer
object, which locks deep sleep, is used to protect from back-to-back
writes to lp tickers which can't support that. This causes tests which
assert that deep sleep is allowed to intermittently fail.
To fix this intermittent failure this patch adds the function
sleep_manager_can_deep_sleep_test_check() which checks if deep sleep
is allowed over a duration. It updates all the tests to use
sleep_manager_can_deep_sleep_test_check() rather
than sleep_manager_can_deep_sleep() so the tests work even if deep
sleep is spuriously blocked.
This is solution to issue #7724.
Ticker free tests have been removed since ticker free function has been implemented only for CI boards.
Implementation for the remaining platforms will be done on feature branch feature-hal-ticker-free.
In `ticker speed` test case execution time of ticker API functions is measured using Timer object. Test replaces original ticker handler for testing purposes, so test should not relay on higher level ticker based features(like Timer).
Use low level ticker API for time measuring.
In mbed-os-tests-mbed_hal-common_tickers/Microsecond ticker overflow test, some targets
would fail to catch specified ticker value near overflow in time and so fail. This commit
alleviates the issue by checking ticker value range rather than one exact ticker value near
overflow.
Serial buffer must be flushed before entering deep sleep mode. In the test this is done by the additional delay which is implemented on the busy loop which decrements given value down to 0 (`void wait_cycles(volatile unsigned int cycles)`). This solution is not appropriate since it is very target specific and the cycles value has been already increased few times. Additionally very big number of loop cycles which is suitable for fast targets may take much longer on slower boards and results in test timeout.
It has been verified that 20ms is sufficient delay for the green-tea transmission. In this test we cannot simply use `wait_ms(20)` since this potentially may put board to sleep and wake up using lp ticker. The test re-initialzies the lp ticker(disables ticker interrupt) and this operation may break the schedule and time tracing by the upper layer. But we can use us ticker which is not affected by this test. The solution is to add a delay routine based on busy loop and us ticker only. This way are able to wait exactly 20 ms.
As we do not include rtx_lib header file anymore, these symbols are not available.
Use core util for if ISR is active. And for OS tick, pull in os_tick header file.
Mark mbed-os-tests-mbed_hal-common_tickers/time_cpu_cycles not in-lined.
Otherwise, time_cpu_cycles may be in-lined somewhere and takes different
CPU cycles on invocation.
Increases tolerance value for sleep_usticker_test to cover extra time needed
for cpu stats computation (for more details see MBED_CPU_STATS_ENABLED).
Prevent scheduling interrupt during ticker initialization (in lp_ticker_init)
while test execution.
In case when base tick count is different than next tick count check first if the difference is equal to 1 tick (this is what we are looking for) if not then decrease the tick count.
Repeat counting process few times before incrementing the number of cycles in case when base tick count is equal to next tick count.
RTC reset test was failing when board has been just powered and RTC reset test was executed for the first time (issue has been detected on CI). In such case RTC initialization takes more time than in futher rtc_init calls. This has impact on green-tea communication. Commands send by host immediately after init command (write, read) were not handled on the device side and no response to the host was provided.
To fix this problem test communication flow has been modified. Device sends ack to the host after RTC init is done. Host sends further RTC commands when ack from the device has been received.
Edit:
There are still some communication issues on the CI. Add ack from the device after each executed command. Increase test timeout and wait after reset.
Since some platforms use RTC for low power timer RTC may be already enabled.
Because of that we will only verify if rtc_isenabled() returns 1 in case when init is done and RTC time is set.
It is possible that the difference between base and next tick count on some platforms is greater than 1, in this case we need to repeat counting with the reduced number of cycles (for slower boards).
If number of cycles has been reduced than base tick count needs to be redefined. This operation is missing and is added by this patch.
It has been noticed on NRF51_DK board that occurrence of system tick have impact on test execution.
NRF51_DK is a slow board with fast us ticker and handling of system tick interrupt takes about 250 us ticker ticks which have huge influence on interrupt tests where interrupt is set to <current count> + 100, 200, 500 ticks.
For NR51_DK US_TICKER_OV_LIMIT needs to be increased since if test is run few times in row sometimes fails. This is because NR51_DK is a slow board (16 MHz) with fast and short us ticker counter 1 MHz/16 bits.
Update the ticker common test to clean up after each case by restoring
the ticker IRQ handler. This allows tickers to function normally after
each case has completed.
- count_ticks: fix counter overflow handling,
- count_ticks: use reg_cycles variable in while loop,
- increment test: reduce number of cycles for slow cores if measure process needs to be repeated (difference is greater than 1).
On slow targets with fast high frequency tickers like NRF51_DK (16 Mhz CPU/1MHz ticker) time window for test case execution without overflow needs to be increased. Add parameter to `overflow_protect` function to be able to set different time window without overflow for us ticker and lp ticker.
Increment test proves that ticker counter is incremented by one.
This is done indirectly for high frequency counters where it is impossible to read 'value' and 'value + 1' in two successive ticker reads.
This check is done indirectly by counting ticker ticks elapsed during execution of N cycles of empty while loop. Unfortunately on slow boards with fast tickers like NRF51_DK(16 MHz CPU/1MHz hf ticker) it is possible that for the same N cycles measured number of elapsed ticks in two successive calls is greater than 1. This patch provides fix for such case - measure operation is repeated with the same number of cycles.
count_ticks() function counts ticker ticks elapsed during execution of N cycles of empty while loop.
In current version N value (cycles) is given as volatile paramater in order to disable possible compiler optimalisation.
There was a problem with measured time on different compilers and additionally results on ARM compiler were unexpected (the difference beetween measured elapsed ticks for the same number of cycles was to large). This might be caused by the memory access in order to store updated variable in memory. To fix this issue given numer of cycles has been stored into register and register is decremented (no memory access).
With this fix count_ticks(NUM_OF_CYCLES, 1) call returns 2500 +/-1 for us ticker ticks using each compiler (K64F).
On some platforms (e.g. K64F) different counters are used for time measurement and interrupt generation.
Because of that we should relax interrupt test case and give additional time before checking if interrupt handler has been executed.
Since according to the ticker requirements min acceptable counter size is 12 bits (low power timer) for which max count is 4095, then all test cases must be executed in this time window.
HAL ticker layer handles overflow and it is not handled in the target ticker drivers.
The intention was to use ticker_overflow_delta equal to 0 for low power ticker tests and ticker_overflow_delta equal to 50 for high frequency ticker tests. Current implementation is invalid since for devices which provide LOW_POWER_TIMER feature delta is equal to 0 and for devices without this feature delta is equal 50.
Since target specific ticker drivers are not ready also features which uses ticker in upper layers may not work correctly and tests for these features.
We need to disable also failing higher level ticker related tests (by adding check if DEVICE_USTICKER symbol is available and raise #error [NOT_SUPPORTED] if not).
Russ Butler
Oren Cohen
Alexander Zilberkant
Martin Kojtal
Mahesh Mahadevan
Cruz Monrreal
RFulchiero
Kevin Bracey
Vincent Coubard
Anna Bridge
Przemyslaw Stekiel
Filip Jagodzinski
Amir Cohen
ccli8
Yossi Levy
David Saada
Maciej Bocianski
Steven
Qinghao Shi
Ben Cooke
Marc Emmers
Bartek Szatkowski
jeromecoutant
Russ Butler