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1010 Commits (d5cf4a6a6ac7ac6e6e7198a78b83db42098d61b1)

Author SHA1 Message Date
Martin Kojtal dd5bd73a88
Merge pull request #5720 from kjbracey-arm/STM32F7_DMB 
Add memory barriers to STM32F7xx Ethernet
 2017-12-22 11:07:46 +00:00
Martin Kojtal 806b762473
Merge pull request #5677 from u-blox/c030_bq24295_voltage_fix 
C030 Battery Charger Voltage Fix
 2017-12-20 14:42:18 +00:00
Kevin Bracey 05e2ae7a70 Add memory barriers to STM32F7xx Ethernet 
Pending official update from STM, add memory barriers to the Ethernet
HAL code for the STM32F7xx family.

Cortex-M7 has a merging write buffer that is not automatically flushed
by accesses to devices, so without these DMBs, we sometimes lose synch
with the transmitter.

The DMBs are architecturally needed in every version of this HAL, but
adding just to the STM32F7 version for now to clear test, as the
problem has only been observed on Cortex-M7-based devices.

Fixes #5622.
 2017-12-20 15:05:29 +02:00
jeromecoutant 8bc92bdd22 STM32F4 : compilation issue 
Issue comes only when ST HAL macro USE_FULL_ASSERT is enabled
 2017-12-13 13:57:26 +01:00
jeromecoutant 4637279f51 STM32L4 : compilation issue 
Issue comes only when ST HAL macro USE_FULL_ASSERT is enabled
 2017-12-13 13:57:17 +01:00
jeromecoutant 75db24ff15 STM32F3 : compilation issue 
Issue comes only when ST HAL macro USE_FULL_ASSERT is enabled
 2017-12-13 13:56:42 +01:00
Bilal 0469dfb892 Bracket moved to next line 2017-12-13 16:37:19 +05:00
Martin Kojtal cee180f472
Merge pull request #5667 from productize/fix-stm32-can3 
STM32: Fix CAN3
 2017-12-12 17:39:41 +00:00
Martin Kojtal be52ba2156
Merge pull request #5363 from mprse/extended_rtc 
Add support and tests for extended RTC
 2017-12-12 17:36:44 +00:00
Martin Kojtal da43d655ff
Merge pull request #5459 from jeromecoutant/PR_LPT_RTC 
STM32 Low Power Timer feature updates
 2017-12-12 17:33:31 +00:00
Martin Kojtal 047455eee9
Merge pull request #5591 from helmut64/NUCLEO_STM32L433_NEW 
Support the STM NUCLEO_L433RC-P board
 2017-12-12 17:29:51 +00:00
Martin Kojtal 84192fe676
Merge pull request #5610 from garivetm/bugfix-STM32CAN 
STM32 - CAN - Fix RTR position bit in TX mailbox register
 2017-12-12 17:27:57 +00:00
Bilal 5c1623c9e1 Licenses added in header files 2017-12-08 19:51:25 +05:00
Bilal a40469e7c5 C030 Battery Charger Voltage Fix 2017-12-08 17:39:21 +05:00
bcostm f08c04d81f STM32 CAN3: add CAN_3 declaration for DISCO_F769NI 2017-12-07 18:12:54 +01:00
Adam Heinrich 9ee222a8e6 STM32: Set valid filter number for CAN3 
Filter numbers 14 to 27 are reserved for dual CAN configuration.
However, CAN3 operates in single CAN configuration according to the
reference manual).
 2017-12-07 18:06:05 +01:00
bcostm bfc4d68ae0 STM32 CAN3: remove test of CAN_2 and CAN_3 
CAN_2 and CAN_3 are enum and not #define and this causes compilation error with GCC_ARM

Instead put back the test of CAN_NUM (which are defined in can_device.h).
 2017-12-07 18:04:34 +01:00
Adam Heinrich d33c0a6fa5 STM32: Pass correct id to can_irq() for CAN3 2017-12-06 19:41:20 +01:00
jeromecoutant 17a54840c7 STM32 RTC : update and comment prescaler values 2017-12-05 12:52:52 +01:00
Przemyslaw Stekiel 106561669f Update RTC drivers for extended RTC. 2017-12-05 07:54:02 +01:00
jeromecoutant 01b2b1baf3 STM32: RTC_LSI macro is replaced by lse_available config 2017-12-04 17:35:31 +01:00
jeromecoutant 354ed44a65 STM32 LOW_POWER_TIMER update : use error 2017-12-04 17:35:30 +01:00
jeromecoutant 85c337d0b9 STM32 LOW_POWER_TIMER update : rtc_init procedure 2017-12-04 17:35:29 +01:00
jeromecoutant c13ffaf477 STM32 LOW_POWER_TIMER update : sleep 
RSF synchro after deepsleep is not specific to Low Power Timer feature
And we have to check if RTC is configured before synchro
 2017-12-04 17:35:29 +01:00
jeromecoutant 0bf364ea55 STM32 LOW_POWER_TIMER update : rtc_api.c 
Add RSF synchro during init
Set a better WakeUp clock for long wake up period in order to stay in sleep mode
Use rtc_isenabled function before init as rtc_init is called at each set_time call
 2017-12-04 17:35:28 +01:00
jeromecoutant b65e861b20 STM32 LOW_POWER_TIMER update : lp_ticker 
Removed unnecessary part
 2017-12-04 17:35:27 +01:00
Martin Kojtal c7e5eb2f97
Merge pull request #5397 from sakuraio/stm_sco-evb-01 
add target SAKURAIO_EVB_01.
 2017-11-30 18:16:09 +00:00
Martin Kojtal 45e9e4cab3
Merge pull request #5565 from LMESTM/fix_slave_3wires 
STM32: SPI 3 wires mode not supported in SPI slave
 2017-11-30 18:11:16 +00:00
Mathieu Garivet 6ee3d80b1c Fix RTR position bit in TX mailbox register 2017-11-28 18:44:28 +01:00
andreas.larsson f2de0956b4 Updated ODIN drivers to v2.3 RC1 2017-11-28 12:22:45 +01:00
Helmut Tschemernjak 63ad3aeae3 Added the proper defines for the STM32L432 bootloader support 2017-11-27 15:41:30 +01:00
Helmut Tschemernjak 4778a40643 Changed NVIC Flash base address to support the bootloader 2017-11-27 15:32:53 +01:00
Helmut Tschemernjak 632b2f1660 Updated wrongly defined UART3_BASE into USART3_BASE 2017-11-27 15:19:43 +01:00
Helmut Tschemernjak 66a1967fb4 Added TARGET_STM32L433RC stack size define into mbed_rtx.h 2017-11-27 15:15:17 +01:00
Helmut Tschemernjak fb914149dd Updated to toolchain startup/linker files to support the 433 devices 
Also added the symbolic MBED_APP_START/MBED_APP_END defines
 2017-11-27 15:03:43 +01:00
Helmut Tschemernjak 94c46b102b defined STM32L433xx 2017-11-27 14:52:37 +01:00
Helmut Tschemernjak e25dfc07f0 Added stm32l433xx.h defined STM32L433xx 2017-11-27 14:51:46 +01:00
Helmut Tschemernjak 6907b6d9e5 Updated PeripheralNames.h, PeripheralPins.c and PinNames.h for STM32L433 devices 2017-11-27 14:44:35 +01:00
Helmut Tschemernjak 90bb8fc368 Copied TARGET_STM32L432 to TARGET_STM32L433, renamed 432 files to 433 2017-11-27 14:36:47 +01:00
Laurent MEUNIER 839bd642d0 STM32: SPI 3 wires mode not supported in SPI slave 
This patch handles the case of SPI slave mode without MISO (NC).
In case MISO is not connected, we consider that SPI will be configured in
3 wires mode (CLK / MOSI / CS, but no MISO). In this case, the MOSI line
is bi-directional : SPI_DIRECTION_1LINE.

But as this is not supported yet in slave mode, we force it to
SPI_DIRECTION_2LINES. In this case slave SPI will receive data on MOSI
but nothing will be sent back to master as MISO is not connected.
 2017-11-23 10:10:05 +01:00
Jimmy Brisson 369187cadf
Merge pull request #5535 from MikeDK/nucleo_l432kc_async_serial_fix 
NUCLEO_L432KC: Fixed async serial
 2017-11-22 10:19:53 -06:00
Jimmy Brisson ced2f74f16
Merge pull request #5513 from bcostm/fix_adc_inited 
STM32: Initialize ADC peripheral for each AnalogIn object creation
 2017-11-22 10:16:14 -06:00
Jimmy Brisson 800be4e90d
Merge pull request #5512 from jeromecoutant/PR_L072 
DISCO_L072CZ_LRWAN1 can use LSE from LORA module
 2017-11-20 10:53:20 -06:00
Michael Kaplan 8a1c29c2e5 TARGET_STM32L4: added missing #ifdef in serial_device.c 2017-11-20 15:49:18 +01:00
bcostm c54e9079b8 STM32 ADC: replace flags type from int to bool 2017-11-17 13:50:59 +01:00
bcostm 1d3eb508bf STM32: fix linker error with adc_read() 2017-11-17 13:50:59 +01:00
bcostm 2bbedabf7d STM32: add analogin_api.c file in STM folder 2017-11-17 13:50:59 +01:00
bcostm 34fdcc926b STM32: move analogin_read functions in a common file 2017-11-17 13:50:59 +01:00
bcostm 4dbe95dded STM32: rename analogin_api.c in analogin_device.c 2017-11-17 13:50:59 +01:00
bcostm 072ec2e765 STM32L4 ADC: remove adc_inited flag 2017-11-17 13:50:59 +01:00